[coreboot] Re: search_isolinux usb

Hi Geert, On 2022/8/8 03:51, Geert Stappers wrote: Hello coreboot developers, An .iso is fetched from Internet and `dd` to USB-memory-stick. The USB-thumbdrive is then inserted in the X230, on the left side, in the USB-slot closest to user[1]. I use my tool liveusb-builder

[coreboot] Re: Master currently broken on Thinkpad X230 when using option table

the files in the cbfs cannot be loaded because of the mcache overflow, which results in failing to load the ramstage. On Mon, Dec 7, 2020 at 12:18 PM Iru Cai wrote: > Confirmed on qemu-i440fx. It's strange that it already has different > behavior in romstage between setting and not s

[coreboot] Re: Master currently broken on Thinkpad X230 when using option table

Confirmed on qemu-i440fx. It's strange that it already has different behavior in romstage between setting and not setting USE_OPTION_TABLE. I still don't know what is broken in this commit. On Sun, Dec 06, 2020 at 11:24:11PM +0100, Merlin Büge wrote: > > 9d0cc2aea9 cbfs: Introduce cbfs_ro_map()

[coreboot] Re: T440p Audio Out

Hi, On Sat, May 23, 2020 at 12:50:52PM -, acaleech...@gmail.com wrote: > > When docked the mic is enabled by default but headphone is not detected. > Strangely if i plug another headphone in the laptop headphone jack, the dock > headphones start working! > > Could it be that the file >

[coreboot] Re: Laptop EC questions

Have you turned off HP Sure Start in the BIOS setting when running the OEM firmware (in "Security->BIOS Integrity Checking")? There's a PEI and bootblock volume in the EC chip, which Sure Start may use to recover the BIOS. > The only thing I can think of would be the Embedded Controller. >

[coreboot] Re: Laptop EC questions

Hi Lomár, I'm currently trying to port coreboot to HP EliteBook 820 G1, which uses the same EC chip MEC1322 and may have the same kind of EC firmware. On Mon, Apr 06, 2020 at 07:12:24PM -0400, Lomár Berry wrote: > I have been looking at trying to port coreboot to my HP zBook 15 G2. > Everything

[coreboot] Re: Debug MRC.BIN, how to make ramstage CBMEM persistant across reboot ?

Hi Baylee4, On Fri, Apr 03, 2020 at 01:10:52AM -, None via coreboot wrote: > Hi, > > There is no serial port on the T440p, and the USB 2.0 debug port is not > exposed, so it seems that using CBMEM is the only option. > There is an EHCI debug port on the right side. You just need to enable

[coreboot] Re: HP Elitebook 8540w

On Mon, Sep 23, 2019 at 6:07 AM Dane Medic wrote: > Hi, > > is anyone working on porting HP Elitebook 8540w? > Reading on wikipedia , it has > different (older) chipset than those elitebooks already ported, > Yes, it's older than the Sandy/Ivy Bridge

[coreboot] Re: t420s USB 3.0 port

Hi Jason, On Fri, Mar 1, 2019 at 10:33 AM Jason Andryuk wrote: > Hi, > > I have a Lenovo Thinkpad t420s on which I've installed coreboot. > However, the USB 3.0 port is not active and the controller is not > listed under lspci. > > Under the original Lenovo bios, the xhci device was at pci

[coreboot] Re: Status on Dell OptiPlex 7010 support

在 2018/12/25 上午3:05, Kumonie Williams 写道: > Hello there, I have a question regarding coreboot. > > I was wondering if work was still being done to port coreboot to the > Dell OptiPlex 7010. I was looking at commit > 882d3c3574cc24f1bcf16b71c5090cc71ef725a6, but it seems the board > didn’t boot at

Re: [coreboot] coreboot on ASRock H81M-HDS cannot load a payload

:31 PM ron minnich wrote: > I don't know, but as a test, I'd be very interested to see what > happens with a linux payload. You probably don't have time for such a > thing but I had to ask :-) > > On Sun, Dec 16, 2018 at 8:15 PM Iru Cai wrote: > > > > Hi, > &g

Re: [coreboot] coreboot on ASRock H81M-HDS cannot load a payload

ing but I had to ask :-) >> >> On Sun, Dec 16, 2018 at 8:15 PM Iru Cai wrote: >> > >> > Hi, >> > >> > I'm trying to run coreboot on ASRock H81M-HDS with a Xeon E3 and 8G*2 >> RAM. I chose to use my GRUB payload, but coreboot cannot load it wi

[coreboot] coreboot on ASRock H81M-HDS cannot load a payload

Hi, I'm trying to run coreboot on ASRock H81M-HDS with a Xeon E3 and 8G*2 RAM. I chose to use my GRUB payload, but coreboot cannot load it with the following error (full log in attachment): CBFS: 'Master Header Locator' located CBFS at [1a:40) CBFS: Locating 'fallback/payload' CBFS:

Re: [coreboot] Matrix instead (or additionally to) IRC

Previously it works, but now #coreboot needs registered nicks. On Mon, Oct 29, 2018 at 3:43 AM Patrick Georgi via coreboot < coreboot@coreboot.org> wrote: > Not sure if that is still working but > https://matrix.org/blog/2015/06/22/the-matrix-org-irc-bridge-now-bridges-all-of-freenode/ > should

Re: [coreboot] T520 vs. T530

The iGPU T520 and dGPU T420 have stability problems when running coreboot. ( https://ticket.coreboot.org/issues/121) So get a T530/W530/W520/dGPU T520. I don't know the eGPU status of notebooks running coreboot. On Tue, Oct 23, 2018 at 3:01 PM wrote: > Hello guys, > > I am planning to buy a

Re: [coreboot] lower memory performance with coreboot on KGPE-D16

Hi Daniel, Thanks for your reply, but it's not the case with me. I'm not using DDR3L-RDIMMs. My dmidecode output of one DIMM is: Handle 0x0007, DMI type 17, 40 bytes Memory Device Array Handle: 0x0006 Error Information Handle: Not Provided Total Width: 72 bits Data Width: 64

[coreboot] lower memory performance with coreboot on KGPE-D16

Hi, I just found the memory performance on KGPE-D16 is lower when running with coreboot. I have two Opteron 6276 and 8 16GB DDR3-1600 RDIMM on all orange slots. I tested it with `hdparm -tT /dev/sda` and see the `Timing cached reads` result. With coreboot, this value is around 3000 MB/s, but with

Re: [coreboot] Fwd: Thinkpad W520 external monitor over Nvdia GPU

The coreboot port of Lenovo W520 is in the upstream code now, are you using the upstream code? On Sat, Sep 29, 2018 at 10:36 PM Kinky Nekoboi wrote: > Hello ! > > Thank to charlotteplusplus`s reddit post i have succesfully running > coreboot with a skrinked ME image on my W520. Everything works

Re: [coreboot] Build fails on Thinkpad W520

commit 9fe248fb removes the use of addr and reg variable in this function, that's why this code doesn't compile with CONFIG_DEBUG_RAM_SETUP. I've submitted a fix for this: https://review.coreboot.org/#/c/coreboot/+/28117/ or remove the printram statement? On Thu, Aug 16, 2018 at 4:27 PM, Andreas

Re: [coreboot] asrock-B75-pro3-m

Just ignore the CPU socket thing, it stands for a type of CPU which may not be using the socket. --ifd of flashrom means reading the IFD to get the layout, but coreboot.rom's fake IFD doesn't have the BIOS region, are you sure you're doing it correctly? If the firmware is executed, you can use the

Re: [coreboot] HP Elitebook 8770w Suspend-to-RAM

Hi, Rob SeaBIOS 1.11.0 has some bug which can make S3 resume failed [1], you can try to use SeaBIOS 1.10.3: Payload Add a payload (SeaBIOS) ---> SeaBIOS version (git revision) ---> (rel-1.10.3) Insert a commit's SHA-1 or a branch name [1]

Re: [coreboot] [RFC] Successful build with GCC 7.2 and IASL 20170831 for coreboot 4.7

Hi all, I found that ACPICA released version 20170929 yesterday, and it's more strict than previous versions. I can't even use it to build qemu-i440fx because many dsdt files have methods that are not used, which will make iasl warn about this. Iru On Tue, Oct 3, 2017 at 11:50 AM, Matt

Re: [coreboot] KGPE-D16 PCI passthrough

there exists some kernel oops in previous tests. On Fri, Sep 8, 2017 at 2:33 PM, taii...@gmx.com <taii...@gmx.com> wrote: > On 09/08/2017 02:12 AM, Iru Cai wrote: > > On Fri, Sep 8, 2017 at 2:02 PM, taii...@gmx.com <taii...@gmx.com> wrote: >> >> On 09/08/2017 12:44

Re: [coreboot] KGPE-D16 PCI passthrough

On Fri, Sep 8, 2017 at 2:02 PM, taii...@gmx.com <taii...@gmx.com> wrote: > On 09/08/2017 12:44 AM, Iru Cai wrote: > > On Fri, Sep 8, 2017 at 11:42 AM, taii...@gmx.com <taii...@gmx.com> wrote: >> >> On 09/07/2017 11:21 PM, Iru Cai wrote: >>> >>>

[coreboot] KGPE-D16 PCI passthrough

Hi, I have a problem about PCI passthrough on KGPE-D16. I plugged in a PCI to USB adapter to the PCI slot, and it's in IOMMU group 7 with the ASpeed video card and the LSI 1394a controller. I try to pass them all to a VM, but then kernel crashes. I tried in Linux 4.9.47 and Linux 4.12.10. Does

[coreboot] What GPU are you using on KGPE-D16

Hi, I've just flashed the most recent coreboot with Linux payload on my KGPE-D16. However, there're some problems with GPU. I have an RX550, but it seems that amdgpu has bug with AMD-Vi which I found in some mailing list ( https://lists.freedesktop.org/archives/amd-gfx/2017-March/006490.html),

Re: [coreboot] Boot from a M.2 NVMe ssd on an ASUS KGPE-D16

On Mon, Sep 4, 2017 at 3:47 PM, BogDan Vatra wrote: > Hi, > > Is it possible to boot from a M.2 NVMe ssd on KGPE-D16? > If not, how hard it will be to add such support, I'd like to give it a > try myself. > > I'm using Linux kernel payload with petitboot. Now SeaBIOS also

Re: [coreboot] qemu to launch coreboot

On Fri, Aug 04, 2017 at 04:17:29PM +, ron minnich wrote: > Sorry, don't know what sh4 is ... > Some kind of architecture... (https://en.wikipedia.org/wiki/SuperH#SH-4) > > > On Fri, Aug 4, 2017 at 9:09 AM ingegneriafore...@alice.it < > ingegneriafore...@alice.it> wrote: > > > Hello

Re: [coreboot] question on libgfxinit DP port number

Thanks, Nico On 2017年07月18日 16:20, Nico Huber wrote: > Hi Iru, > > On 18.07.2017 09:28, Iru Cai wrote: >> Hi, >> >> I found the mainboard DP port doesn't have output before kernel starts in >> hp/2570p (https://review.coreboot.org/c/20489/). After I added DP3

[coreboot] question on libgfxinit DP port number

Hi, I found the mainboard DP port doesn't have output before kernel starts in hp/2570p (https://review.coreboot.org/c/20489/). After I added DP3 and HDMI3 in port list, the DP port had output, and cbmem log said it's DP3. However, xrandr says this port is DP2. What is the problem? I also checked

Re: [coreboot] Wiki page for Lenovo Thinkpad W520

Hi Charlotte, On Tue, Jul 18, 2017 at 1:37 PM, Charlotte Plusplus < pluspluscharlo...@gmail.com> wrote: > Hello > > I would be very happy to help with pictures, source, binaries, info etc. > But since Denver, I have been just a bit behind. Too many side projects :-) > > Anyway, I will get back

Re: [coreboot] What do each of the letters B...? , L...? , O...? , B...? represent in the acronym BLOB ?

https://en.wikipedia.org/wiki/Binary_blob The term *blob * was first used in database management systems to describe a collection of binary data

[coreboot] What's the relationship between ACPI and SMM?

Hello, I'm trying to write some ACPI code to support an EC. I don't know if I need to write an smihandler.c for the boards. I saw some mainboard code. Older boards such as lenovo/x200 have no smihandler.c, but newer boards such as lenovo/x220 have. Also, I don't know much about things like GPE,

Re: [coreboot] How come the community meeting is hosted by proprietary software?

Have you tried the Matrix protocol (https://matrix.org) that I mentioned? It supports WebRTC as well as talk with text and files. If you are not satisfied with the existing public servers ( https://www.hello-matrix.net/public_servers.php), you can even host one. On Fri, Mar 17, 2017 at 11:05 PM,

Re: [coreboot] How come the community meeting is hosted by proprietary software?

I love Matrix (https://matrix.org) and there are already some public servers (https://www.hello-matrix.net/public_servers.php), including matrixim.cc hosted by me. On Tue, Mar 14, 2017 at 12:36 PM, taii...@gmx.com wrote: > Discord is proprietary software, why don't we use

Re: [coreboot] Improving KBC1126 support for HP laptops

On Fri, Feb 24, 2017 at 8:14 AM, Peter Stuge <pe...@stuge.se> wrote: > Iru Cai wrote: > > I have searched and downloaded two SMSC confidential document: a KBC1122 > > preliminary datasheet and a KBC1122 BIOS porting guide. Is there any > > problem if I use them to wri

[coreboot] Improving KBC1126 support for HP laptops

Hi, I'm now doing the port for HP Elitebook 2760p ( https://review.coreboot.org/#/c/18241/) and other HP laptops, but I'm now having trouble with the EC+SuperIO chip KBC1126. Now I can use superio/smsc/kbc1100 to enable keyboard support. However, I still cannot access the EC with ectool, which

Re: [coreboot] Coreboot on Thinkpad "X62" (i7-5600u)?

Hello, On Thu, Feb 23, 2017 at 3:46 PM, Rafael Send wrote: > Hello there- > I'm assuming this is the right way to ask a general question, but please > let me know if it isn't. > > I have an "X62" laptop, which is actually an old Thinkpad X61 with a > custom motherboard in

Re: [coreboot] T520 2630QM 16GB DIMM

Ivy Bridge doesn't support 16GB DIMMs either. I've opened a ticket before. https://ticket.coreboot.org/issues/56 On Thu, Feb 23, 2017 at 8:33 AM, wrote: > It would be really great if you could test out a Core i7-3840QM in the G2 > socket of the Thinkpad T520. Its the

Re: [coreboot] Using as default external monitor for booting in x230

Hi, I've just flashed my X230 using Linux payload with petitboot. It can light up the screen when the payload runs without any graphics init (native gfx or VGA BIOS) in coreboot. My petitboot payload is built with the buildroot project from Arthur Heymans[0]. I forked it and updated buildroot to

Re: [coreboot] "FCH SPI: Too much to write" on KGPE-D16

Hello Timothy, On 2017年01月06日 01:14, Timothy Pearson wrote: > On 01/05/2017 04:33 AM, Iru Cai wrote: > > Hello, > > > I've set up a computer with Asus KGPE-D16 recently. I use an Winbond > > W25Q64.V 8M flash chip and tested with this config with only ROM size &g

[coreboot] "FCH SPI: Too much to write" on KGPE-D16

Hello, I've set up a computer with Asus KGPE-D16 recently. I use an Winbond W25Q64.V 8M flash chip and tested with this config with only ROM size changed: https://review.coreboot.org/gitweb/cgit/board-status.git/tree/asus/kgpe-d16/4.5-759-gab8f7d3/2017-01-04T21_18_55Z/config.short.txt And it

[coreboot] commit 94f8699 bricks my Lenovo X230

Hi, The latest git code bricks my Lenovo X230. After a git bisect, I found the bad commit is 9438699[1] and reverting will work. The log from USB debug console says there's an exception after the ``erase MRC cache`` message. Lenovo X230 has two flash chips. I don't know if it's related to this.

Re: [coreboot] T430s or T430 (Was: latest greatest thinkpad with coreboot)

On 2016年12月04日 07:18, Nico Huber wrote: > On 03.12.2016 01:46, Sam Kuper wrote: >> On 02/12/2016, Nico Huber wrote: >>> The T430 seems to be unsupported. >>> Also I guess, it would only be one or two days of work >> One or two days of work for whom? E.g. did you have in mind a

Re: [coreboot] Powersavings: 8W of difference between bios and coreboot

Hi, On Fri, Nov 18, 2016 at 4:43 PM, Felix Held wrote: > Hi! > > > BIOS: 11W Coreboot: 19W [...] >> > Can you also measure the power consumption with the GPU enabled under the > vendor firmware? > > and no, the NVidia GPU was not enabled in corebooy. Both results

[coreboot] Need advice on modifying mainboard dsdt file

Hi, I've just dumped a stock ACPI DSDT table of a Lenovo ThinkPad. I need to update the device section of the machine. Currently the acpi/superio.asl file of the mainboard is a line ``#include ``, in which I hope to modify a device section to add the mouse hardware ID to it instead of using the

[coreboot] EC problem in X200s?

Hi, Recently, I flashed libreboot to my X200s (with L9300 CPU). But it seems that there are some EC problems in X200s, which I haven't found in a X200. 1. With a third party battery, when I put the X200s on dock, it'll shut down. 2. With a third party battery, the battery will not charge, but it

Re: [coreboot] Diassemble i946GZ ?

It's in SerialICE project, not in coreboot project. On 2016年10月17日 10:23, Antonius Riko wrote: I can not see D946GZIS on my src/mainboard/intel where is it ? -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] Does anyone know about SMSC KBC1126?

Hi, I'm trying to work with some HP machines. I disassembled these machines and saw they the EC chip SMSC KBC1126-NU. I read the backup firmware and can see strings like `8051 RESET`, and I found if I modify certain part of the firmware, the machine will fail to power with some LEDs blinking, so

Re: [coreboot] anyone use coreboot on Lenovo T520?

Hi Patrick, On Wed, Sep 07, 2016 at 05:36:45PM +0200, Patrick Rudolph wrote: > On Wed, 7 Sep 2016 21:15:05 +0800 > Iru Cai <mytbk920...@gmail.com> wrote: > > Hi Iru, > I've got a T520 with soldered pin header as in the referenced wiki page, > and I've got a T420 wher

[coreboot] anyone use coreboot on Lenovo T520?

Hi community, I've had this problem for a long time, but I don't feel like to ask it until some one ask me about this problem. Lenovo T520 has a BIOS chip under the magnesium structure frame, and it may have a WSON package, so I solder a pin connector at the `J100' solder place.

[coreboot] 16GB dimm on Sandy/Ivy Bridge status

Hi, I'm tesing to see if the coreboot Sandy/Ivy MRC supports 16GB DIMMs. Here's my result. I'm using a MT16KTF2G64HZ-1G6A1[1]. My machine is Lenovo T420 with i7-3630QM. With this module inserted (I've tested 16G+0 and 16G+8G), the system can light up, but it'll then get crashed. - with GRUB2

Re: [coreboot] A talk about coreboot

On Sun, Apr 10, 2016 at 8:53 PM, Stefan Tauner <stefan.tau...@gmx.at> wrote: > On Sun, 10 Apr 2016 01:45:03 +0800 > Iru Cai <mytbk920...@gmail.com> wrote: > > > Hi community, > > > > I gave a talk about coreboot in my LUG yesterday, and here's my > > s

[coreboot] A talk about coreboot

Hi community, I gave a talk about coreboot in my LUG yesterday, and here's my slides. https://bdwm.net/attach/boards/Linux/M.1460223002.A/coreboot-talk.pdf Iru signature.asc Description: PGP signature -- coreboot mailing list: coreboot@coreboot.org

[coreboot] hyper_threading in CMOS/NVRAM seems useless in many CPU models

Hi, I just tried to disable hyper-threading in my machine, and I found the hyper_threading setting in NVRAM is useless. I searched in the code and found only a few number of CPU code has in its Makefile.inc `subdirs-y += ../hyperthreading', which can read the hyper_threading NVRAM option and

[coreboot] What is mrc.bin and system agent binary?

Hi, I've bought a Chromebook Pixel 2013 and want to reflash the firmware. I saw in the config that I need a system agent binary. I looked into 3rdparty/blobs/nb/intel/sb/ and found three binary files, and the default one in nb/intel/sb/kconfig is systemagent-r6.bin. And I read the google/link

[coreboot] Is it possible to flash coreboot with proprietary vendor tools?

Hi, Can I use proprietary vendor tools like winflash or a vendor BIOS update disk to flash coreboot? I don't think it possible but I can't find a reason to explain, or it may be possible if I modify the ROM format to fit those tools. Iru Cai signature.asc Description: PGP signature

Re: [coreboot] about Ivy Bridge CPU with QM67 PCH

Hi, On Sun, Oct 18, 2015 at 06:44:09PM +0200, Peter Stuge wrote: > Hi, > > Iru Cai wrote: > > I've been testing the Lenovo T420 port recently, and now I can > > install an Ivy Bridge processor and run fine on Linux(except some > > thermal issues). >

[coreboot] about Ivy Bridge CPU with QM67 PCH

generation of CPU and chipset combination with coreboot before, and I hope this issue can be resolved. I have pushed the patch that makes coreboot support both SNB and IVB processor for review: http://review.coreboot.org/#/c/12087/ Iru Cai signature.asc Description: PGP signature -- coreboot

[coreboot] About the USB issue on the Lenovo T420 port

different port number on the USB device. But I know almost nothing about USB, so I'm not sure what's happening. [1] http://review.coreboot.org/#/c/11765/ [2] see the attached dmesg.log Iru Cai [ 42.540979] cfg80211: Exceeded CRDA call max attempts. Not calling CRDA [ 54.182991] usb 1-1.2: new

[coreboot] coreboot on Lenovo T420

another ROM with flashrom to unbrick my laptop. So can some one give me some instruction on devicetree.cb file? And another thing, how can I submit the code to the coreboot repository? Is symlinks to another source files allowed in the source tree? Iru Cai -- coreboot mailing list: coreboot

[coreboot] Has anyone ported coreboot to ThinkPad T420?

Hi, community I found Lenovo X220, T420s and T520 have coreboot support, but T420 is not in the support list. I used the autoport tool in coreboot, and found some differences(e.g. GPIO) between T420 and the supported models. I think it should be easy to port it. I've just disassembled a Lenovo

[coreboot] build fails when CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT is set

meters with an edid_mode struct within the edid struct. I hope someone will fix the error soon. Iru Cai -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] ectool misusage in autoport

Hi, I'm trying to use autoport to port coreboot to a machine. However, when I look at the logs generated by: ./autoport --input_log=logs --make_logs --coreboot_dir=../.. I saw in logs/ectool.log: ../ectool/ectool: invalid option -- 'a' usage: ../ectool/ectool [-vh?Vidq] [-w 0xaddr -z 0xdata] So

[coreboot] memtest86+ test fails at 3070.7MB

Hi, I installed coreboot(4.1-315-gf58746b) on a ThinkPad X220, with factory VGA option ROM and SeaBIOS 1.7.5 as payload. When I run memtest86+ on this machine, it reports a fail at 3070.7MB. If I just install a 2GB memory module, it passes the test. So what makes memtest86+ give a test failure?

[coreboot] Is it possible to use an Ivy Bridge CPU in an Sandy Bridge laptop?

Hi, Ivy Bridge processor can be installed on a 6 series motherboard on desktop. However, Intel didn't give official support for snb laptops to install an ivb processor. Did anyone tried to insall an ivb processor into an snb machine (I think ThinkPad T520 is a good choice.) to check whether

[coreboot] How to check if DRAM init is OK?

init failed. I put some printks at bootblock_media.c, and found the bug occurs at line 118[2], which showed the access of a certain memory space caused the error. So I need to know how to check if the DRAM init works. Thanks Iru Cai [1] https://github.com/mrnuke/coreboot/tree/cubie_mmc [2] https

[coreboot] coreboot for vexpress-v9 qemu failed

Hi, I am using QEMU from Arch Linux x86_64 official repo. I need to test my built u-boot payload, so I tried to build a QEMU ARM coreboot image. However, it failed to run and had the following output. qemu: fatal: Trying to execute code outside RAM or ROM at 0xfffe R00= R01=00011b70

[coreboot] On Intel Boot Guard

Hi, I've just seen a forum thread about removing the white list of ThinkPad X240, so I think Boot Guard is not preventing modification of BIOS. Then I read some article, which says what Boot Guard locks is the boot block, so I think there's still some way to flash coreboot on a new Intel

[coreboot] How can I load SeaBIOS from GRUB with native VGA+VGA option ROM

I read previous config files from board status, and configured my Lenovo ThinkPad X220 with CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT and CONFIG_VGA_ROM_RUN. And according to: http://www.coreboot.org/pipermail/coreboot/2014-July/078342.html I added the bios.bin.elf to GRUB and vgabios.bin to CBFS.

[coreboot] Question on VGA BIOS extraction

Hi, I'm trying to build Coreboot for ThinkPad X220. I first backup the vendor BIOS, then use UEFITool to extract a VBIOS. The romheader program detects the ROM's PCI data structure and reports the device id is 8086:0106, but the VGA controller's device id is 8086:0126. I extracted the video ROM

Re: [coreboot] GRUB2 is too big as a payload in ThinkPad X201

, welcome to coreboot! Am Donnerstag, den 26.03.2015, 09:33 +0800 schrieb Iru Cai: I tried to use GRUB2 as a payload when building coreboot for ThinkPad X201, but it's too big to fit into the rom. The GRUB2 coreboot image without modules is 2.8M and 800K after compressing, it's

[coreboot] GRUB2 is too big as a payload in ThinkPad X201

I tried to use GRUB2 as a payload when building coreboot for ThinkPad X201, but it's too big to fit into the rom. The GRUB2 coreboot image without modules is 2.8M and 800K after compressing, it's still too big. I think FILO and u-boot are good alternatives but not so user-friendly and documented