Hey Simon, I think this is a good summary of the current situation, though the
table doesn't come through in the text version of the email at all. Maybe
upload an RFC to the documentation directory so it can be commented on in
gerrit?
As I mentioned in the leadership meeting, I have concerns
Hi,
Here is an updated version 2 of the RFC
RFCv2: Post-build control of serial console
It is annoying to have to create and maintain two completely different
builds of coreboot just to enable or disable the console. It would be much
more convenient to have a 'silent' flag in the image, which
Hi Keith,
On Tue, 12 Sept 2023 at 18:09, Keith Hui wrote:
>
> Hi Simon,
>
> > Why not CMOS RAM / VVRAM?
> - If we allocate some space in CMOS for console / logging settings,
> then it would allow a similar feature. But it involves changing
> settings on the device. Each board would need to
Hi Arthur,
On Mon, 11 Sept 2023 at 23:42, Arthur Heymans wrote:
>
> Hi Simon
>
> I agree that both cbfs or fmap for that matter are not practical options as
> on some SOC the boot memory is not memory mapped and requires
> some hardware init.
>
> We have other instances where cbfstool updates
Hi Simon
I agree that both cbfs or fmap for that matter are not practical options as
on some SOC the boot memory is not memory mapped and requires
some hardware init.
We have other instances where cbfstool updates the bootblock code post
compilation: cbfs verification.
See
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