Yep,
I think it should be great to have these options available in Kconfig.
SETUPSERIQ should be transform to CONFIG_SETUPSERIQ.
CONFIG_SERIRQ_CONTINUOUS_MODE is very important when SERIRQ is activated
to avoid spurious interrupt and other mysterious LPC IRQ issues.
Thanks
Benoit
--
coreboot
Everything works right now.
I explained and tested it at
http://www.coreboot.org/pipermail/coreboot/2016-January/080845.html
FYI, I activated the SERIRQ in file
src/soc/intel/fsp_baytrail/southcluster.c by defining SETUPSERIQ and
CONFIG_SERIRQ_CONTINUOUS_MODE in my Kconfig in my mainboard folder.
Hi,
As explained in my post, I am not using the UART located in the Baytrail
SOC.
I used an SIO for serial line connected to the LPC bus.
So to have the IRQs of these serial lines, I obviuosly need to SERIRQ.
The IRQEN is only for the COM1 located in the SOC.
Thanks for your help
Benoit
On
Hi
I mean by not available : not working under my real time OS that I load
through a grub2 paylaod.
You are right.
I replace the IRQ 4 by an other one that it is not used in my system as
follow :
#define PIRQ_PIC_ROUTES \
PIRQ_PIC(A, 5), \
PIRQ_PIC(B, 6), \
PIRQ_PIC(C,
On Fri, Jan 15, 2016 at 1:44 PM, benoit wrote:
> Hi,
>
> As explained in my post, I am not using the UART located in the Baytrail
> SOC.
> I used an SIO for serial line connected to the LPC bus.
> So to have the IRQs of these serial lines, I obviuosly need to SERIRQ.
>
benoit wrote:
> FYI, I activated the SERIRQ in file
> src/soc/intel/fsp_baytrail/southcluster.c by defining SETUPSERIQ and
> CONFIG_SERIRQ_CONTINUOUS_MODE in my Kconfig in my mainboard folder.
>
> I can confirm that all the LPC stuffs are working well. (Accesses + IRQs)
Good news! Thanks for the
Hi all,
I am currently running coreboot + fsp on a E3837 cpu based platform.
My platform has serial line in a LPC device.
Firstly, I activated the SERIRQ in continous mode.
Nevertheless under operating system, the IRQ4 for COM1 is not available.
I checked out the file
Hi
What does it mean not available? Maybe you can check if you programmed ELCR
register to edge for IRQ4.
You can't share the IRQ4 with PCI IRQ I think thats why it does not work.
You need to route the the PIRQA to something else, like IRQ3.
Thanks
Rudolf
--
coreboot mailing list:
On Tue, Jan 12, 2016 at 2:32 PM, benoit wrote:
> Hi all,
>
> I am currently running coreboot + fsp on a E3837 cpu based platform.
> My platform has serial line in a LPC device.
> Firstly, I activated the SERIRQ in continous mode.
SERIRQ has nothing to do w/ COM1. SERIRQ
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