Dear Eli,
Am Montag, den 12.02.2018, 11:55 +0100 schrieb Elisenda Cuadros:
> Sure, I will be happy to do it :-)
Thank you very much for uploading the data to the board status
repository [1].
I noticed, that the serial console is enabled in your run, which causes
the boot time to be quite slow
Dear coreboot folks,
Could somebody please test if on the Asus KGPE-D16 the PS/2 keyboard
still works after resume from ACPI S3 with the change-set
*winbond/w83667hg-a: Disable mouse controller also during resume* [1]
applied?
Kind regards,
Paul
[1] https://review.coreboot.org/#/c/coreboot/+
Dear coreboot folks,
Looking through the board status uploads, the AMD Family 15h and 16h
uploads contain lines with *ASSERTION ERROR*. For example:
asrock/imb-a180/4.6-812-g4a1d450/2017-07-22T05_25_01Z/coreboot_console.txt:ASSERTION
ERROR: file 'src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpu
Dear coreboot folks,
Looking through the board status uploads, the AMD Family 15h and 16h
uploads contain lines with *ASSERTION ERROR*. For example:
asrock/imb-a180/4.6-812-g4a1d450/2017-07-22T05_25_01Z/coreboot_console.txt:ASSERTION
ERROR: file 'src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpu
Dear coreboot users,
There is some uncertainty about the state of latest coreboot on the
Lenovo X201. Does the most recent commit from coreboot work on it, or
are there problems or regressions?
Kind regards,
Paul
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Dear coreboot folks,
Arthur did great work and unified and improved a lot of code under the
topic *common_smm_smihandler* [1].
To avoid regressions, could everyone with the appropriate hardware
please test [2], and comment on the change-set with the test result?
The instructions below should bu
On 16.04.2018 08:44, Patrick Rudolph wrote:
> On 2018-04-15 11:30 PM, Nico Huber wrote:
>> On 15.04.2018 17:12, Patrick Rudolph wrote:
>>> On Sun, 2018-04-15 at 13:43 +0200, Nico Huber wrote:
On 15.04.2018 12:48, Patrick Rudolph wrote:
> On Thu, 2018-04-05 at 11:34 -0500, Matt DeVillier wr
Lot af talk, no work... All of this is already architected. I already did
some ground work here (also parts assembled from Coreboot responses
approximately a year ago):
https://en.wikipedia.org/wiki/Coreboot/VBT
The thing which needs to be done ASAP (in *RED*):
1. Make a "decompiler" that woul
Hey Paul,
I don't have either of these two systems, and have only quickly scanned the
Kabini AGESA source.
But if I had to make a guess, I believe the GetDmiInfoMain() likely has a
problem with its return value. Look at how it returns Flag, but the
function starts by setting Flag=TRUE. Since Fl
Just ignore the CPU socket thing, it stands for a type of CPU which may not
be using the socket.
--ifd of flashrom means reading the IFD to get the layout, but
coreboot.rom's fake IFD doesn't have the BIOS region, are you sure you're
doing it correctly?
If the firmware is executed, you can use the
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