[coreboot] Error with tiano payload

Hi, I get the next traces when I try to boot a coreboot rom with tiano payload. I've configured framebuffer graphics resolution (800x600 16.8M-color (8:8:8)) Jumping to boot code at 00800800(8fe0e000) CPU0: stack: 8ff1f000 - 8ff2, lowest used address 8ff1f5d0, stack used: 2608 bytes

[coreboot] New Defects reported by Coverity Scan for coreboot

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 27 new defect(s) introduced to coreboot found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 20 of 27 defect(s) ** CID 1393979:(RESOURCE_LEAK)

Re: [coreboot] Error with tiano payload

Jorge Fernandez Monteagudo wrote: > X64 Exception Type - 00(#DE - Divide Error) CPU Apic ID - 0010 So there is probably a division by zero.. > RIP - 8F5D4FCB > Find PE image >

Re: [coreboot] vboot

On Fri, Jul 6, 2018 at 8:21 AM, Akendo wrote: > Awesome Thanks! > > Can you tell me what the state is with vboot for a x220 is (as an example)? > > I did ask in the IRC and someone told me, that there is some work done > on this topic. Also that no code contribution are necessary, but rather >

[coreboot] Kaby Lake FSP

Hi All, I am a UEFI firmware architect working for Intel Corp. One of my focus areas is FSP. There was some prior discussion here regarding the lack of public updates for Kaby Lake FSP binaries and headers and questions regarding specialized FSP binaries being built for specific boards. I