[coreboot] Re: How can I set up a userspace test for coreboot code in 2023?

We actually have a real unit test framework for coreboot now, so you should be using that rather than trying to set up something standalone. Hopefully that will make it easier to get things to compile correctly as well. Check out the guide at Documentation/tutorial/part3.md and the existing tests

[coreboot] Re: Coffeelake Graphics Problem

Hello, I selected "Run GOP Driver" for graphics initialization mode and I put a valid VBT binary. FSP somehow quits before even executing PeiGraphics-EntryPoint. In my opinion, if it didn't quit there, it would successfully initialize graphics. I wonder how that happens. After Serialloinit,

[coreboot] [coreboot - Bug #475] mainboard_vbt_filename() in src/mainboard/lenovo/x200/blc.c does not work as intended

Issue #475 has been updated by Bill XIE. Assignee changed from Arthur Heymans to Bill XIE % Done changed from 0 to 90 Related links updated Bug #475: mainboard_vbt_filename() in src/mainboard/lenovo/x200/blc.c does not work as intended

[coreboot] [coreboot - Bug #478] X200 booting Linux takes a long time with TSC (`clocksource=hpet` works)

Issue #478 has been updated by Paul Menzel. Subject changed from X200 booting takes a long time to X200 booting Linux takes a long time with TSC (`clocksource=hpet` works) Related links updated Bug #478: X200 booting Linux takes a long time with TSC

[coreboot] [coreboot - Bug #478] (New) X200 booting takes a long time

Issue #478 has been reported by Robert Gruber. Bug #478: X200 booting takes a long time https://ticket.coreboot.org/issues/478 * Author: Robert Gruber * Status: New * Priority: Normal * Target version: none * Start date: 2023-04-04 * Affected versions:

[coreboot] introduction/potential GSoC Application

hello, all I'm Daniel, from São Paulo/Brazil. I'm a 40yr-old software engineer who just got back to school to finish my undergraduate degree in EE (after a couple of years working in the embedded software industry). I'm canditating myself to do this task: Fully support building coreboot with

[coreboot] Coffeelake Graphics Problem

Hello all,I have a custom CFL board. I used Tianocore UEFI payload. It boots without problem on console and I can enter BIOS menu. I put appropriate vbt.bin file and added that path to config file, so VBT exists. However, I cannot get display output. I inspected debug log and it says "graphics

[coreboot] [coreboot - Bug #478] X200 booting Linux takes a long time with TSC (`clocksource=hpet` works)

Issue #478 has been updated by Robert Gruber. File cbmem.log added Robert Gruber wrote: > dmesg: TSC found unstable after boot, most likely due to broken BIOS. Use > 'tsc=unstable'. > After a period of time the boot finished by auto-switching to hpet. Setting > kernel parameter directly to

[coreboot] [coreboot - Bug #478] X200 booting Linux takes a long time with TSC (`clocksource=hpet` works)

Issue #478 has been updated by Robert Gruber. Target version changed from none to master Bug #478: X200 booting Linux takes a long time with TSC (`clocksource=hpet` works) https://ticket.coreboot.org/issues/478#change-1462 * Author: Robert Gruber *

[coreboot] Re: Coffeelake Graphics Problem

coreboot needs to initialize the display and provide the framebuffer for edk2 to use. What display init option do you have selected? It needs to be 'RUN FSP GOP' and a valid VBT is needed for the FSP PEI GOP driver to successfully execute On Tue, Apr 4, 2023 at 8:17 AM cagatay bagci via coreboot