[coreboot] Creating PIRQ table

Hi All, my name is Gergely Kiss and I'm currently working on porting Coreboot to the ASUS AM1I-A board. I'm a great fan of open source software, I've contributed a few times to some well-known projects like Squid, Monodevelop and Openwrt, just to name a few. I would need a lit

Re: [coreboot] Creating PIRQ table

depricated long time ago). BTW don't forget to remove additional > SIO config code from romstage. > > 28 нояб. 2017 г. 19:16 пользователь "Gergely Kiss" > написал: > >> Hi All, >> >> my name is Gergely Kiss and I'm currently working on porting Coreb

Re: [coreboot] Creating PIRQ table

ecommend > to enable AGESA debug output to serial port, it can help you with ddr > training problems. > > 29 нояб. 2017 г. 12:40 пользователь "Gergely Kiss" > написал: > > Hi Sergej, >> >> thanks a lot for your feedback, it's much appreciated. >>

[coreboot] Early debugging

Hi, I'm working on porting Coreboot to the ASUS AM1I-A motherboard and I'm a bit stuck. I could successfully build Coreboot but after flashing the ROM, my board looks to be bricked... Once powering on the board, the CPU fan spins up but then nothing happens, I can't see any output on the serial

Re: [coreboot] Early debugging

are known. I think I'll have to dig a bit deeper into the southbridge's databook to find that out. Regards, Gergely On 4 December 2017 at 18:42, Kyösti Mälkki wrote: > On Mon, Dec 4, 2017 at 2:44 PM, Gergely Kiss wrote: > > Hi, > > > > I'm working on porting C

Re: [coreboot] Early debugging

ince the firmware has already done > lots of setup, but I've been able to learn things using this technique. > > ron > > On Mon, Dec 4, 2017 at 9:43 AM Kyösti Mälkki > wrote: > >> On Mon, Dec 4, 2017 at 2:44 PM, Gergely Kiss wrote: >> > Hi, >> > &

Re: [coreboot] Early debugging

have to create a patch to get this fixed. Any ideas are welcome on how to fix this. Thanks, Gergely On 18 December 2017 at 15:32, Gergely Kiss wrote: > Hi, > > thanks for all the advice, so far! > > I've made a lot of progress here: after configuring all the low-level

Re: [coreboot] Is CONFIG_USE_OPTION_TABLE option stable?

Hi, I saw very similar symptoms myself while porting coreboot to the ASUS AM1I-A board. I'm not sure about the reasons but this is likely caused by corrupted NVRAM data. Make sure your board has a valid cmos.layout and a cmos.default file (the latter one is optional) then build a fresh copy of co

Re: [coreboot] Asus AM1I-A

ying to use Coreboot in an Asus AM1I-A board recently ported by > Gergely Kiss (thank you!). > > I am using the default config settings and added vga rom extracted with > UEFITool from the vendor bios. > > After flashing and booting I get no output from vga. > > Serial console

Re: [coreboot] Asus AM1I-A

e git revision you are using? > > The console log I attached is from a SPEW debug level, not corresponding > with the config.. I tried several configs today :-) . > > Is it possible to share your config with me? > > Best regards, > > Eli > > On 10/02/18 21:44, Gergel

Re: [coreboot] Asus AM1I-A

. > > Memory has to be located firstly on second slot (yellow DIMM_A2). If not > you get AGESA_FATAL_ERROR. I only have one module. > > Please, find attached a working config.txt and console.log. Coreboot > revision is 4.7-294-g2db6fbc47b. > > If you verify these changes are w

Re: [coreboot] Asus AM1I-A

Seems like there's little information publicly available about the AM1 platform. As you can see here [1] there's plenty of information available for the Bolton FCH which is used in newer APUs, while the Hudson FCH is basically undocumented. The BKDG for the Kabini platform [2] mentions two registe

Re: [coreboot] Please upload board status Asus AM1I-A

Hi Paul, hi Eli, looks like I missed this thread, sorry about the late answer. Thanks, Eli for taking care of Paul's request! Regards, Gergely On 12 February 2018 at 11:55, Elisenda Cuadros wrote: > Dear Paul, > > Sure, I will be happy to do it :-) > > Best Regards, > > Eli > > On 12/02/2018