Re: [coreboot] Why coreboot for riscv does not support multi-core?

On Fri, May 18, 2018 at 3:19 AM Jonathan Neuschäfer wrote: > On Fri, May 18, 2018 at 11:46:54AM +0800, 王翔 wrote: > [...] > > Is coreboot's payload a bootloader running in m-mode ? > > If not, how does the SBI interrupt service be implemented ? > > Previously, coreboot implemented the SBI, and lau

Re: [coreboot] Why coreboot for riscv does not support multi-core?

On Fri, May 18, 2018 at 11:46:54AM +0800, 王翔 wrote: [...] > Is coreboot's payload a bootloader running in m-mode ? > If not, how does the SBI interrupt service be implemented ? Previously, coreboot implemented the SBI, and launched the payload in S-mode. The SBI implementation implemented the old

Re: [coreboot] Why coreboot for riscv does not support multi-core?

> In short: Because it was easier to delay the problem until later. > >On Thu, May 17, 2018 at 03:55:37PM +0800, 王翔 wrote: >> The current code does not set the stack pointer for hart alone. >> The Linux kernel runs in s-mode and cannot set the stack pointer for m-mode. >> If m-mode does not have a

Re: [coreboot] Why coreboot for riscv does not support multi-core?

In short: Because it was easier to delay the problem until later. On Thu, May 17, 2018 at 03:55:37PM +0800, 王翔 wrote: > The current code does not set the stack pointer for hart alone. > The Linux kernel runs in s-mode and cannot set the stack pointer for m-mode. > If m-mode does not have a separat