Hovav Shacham wrote:
> On Aug 24, 2008, at 5:20 AM, Peter Gutmann wrote:
>
>> Speaking of CPU-specific optimisations, I've seen a few algorithm
>> proposals
>> from the last few years that assume that an algorithm can be scaled
>> linearly
>> in the number of CPU cores, treating a multicore CPU as
On Aug 24, 2008, at 5:20 AM, Peter Gutmann wrote:
Speaking of CPU-specific optimisations, I've seen a few algorithm
proposals
from the last few years that assume that an algorithm can be scaled
linearly
in the number of CPU cores, treating a multicore CPU as some kind
of SIMD
engine with al
Peter Gutmann wrote:
Is there some feature of multicore CPUs that I'm missing, or is it a case of
cryptographers abstracting a bit too much away? And if it's the latter,
should someone tell them that multicore CPUs don't actually work that way?
I can't speak to the former issue, but I seem to
Speaking of CPU-specific optimisations, I've seen a few algorithm proposals
from the last few years that assume that an algorithm can be scaled linearly
in the number of CPU cores, treating a multicore CPU as some kind of SIMD
engine with all cores operating in lock-step, or at least engaging in so
Paul Crowley wrote:
> http://www.ddj.com/hpc-high-performance-computing/201803067
>
> In the above Dr Dobb's article from a little over a year ago, AMD
> Senior Fellow Leendert vanDoorn states "the Advanced Encryption
> Standard (AES) algorithm gets a factor of 5 performance improvement by
> using
