Moving this to port-amd64 (bcced current-users@ for reference)
Le mar. 11 déc. 2018 à 04:34, Kengo NAKAHARA a écrit :
> I mention some old Athlon 64 series (before socket AM2) do not support
> cmpxchg16b instruction. That would affect rewriting spllower to support
> 64 bit interrupt bitmask.
Hi,
On 2018/12/11 6:49, Jaromír Doleček wrote:
> Le jeu. 6 déc. 2018 à 16:05, Cherry G.Mathew a écrit :
>> The right thing to do is to stop using a bit mask entirely, and using
>> a bit more scalable Data structure for this. This isn't trivial though -
>> the assembler stuff will be harder to
Le jeu. 6 déc. 2018 à 16:05, Cherry G.Mathew a écrit :
> The right thing to do is to stop using a bit mask entirely, and using
> a bit more scalable Data structure for this. This isn't trivial though -
> the assembler stuff will be harder to maintain correctness than a
> straightup buslocked
Hi Geoff,
Saitoh-san pointed me at this email. I've been looking at MSI briefly -
should have some work in place to sort out this situation. About your
specific situation:
Geoff Wing writes:
> Hi,
> brief background: on an amd64 VM (1 CPU on VMWare ESXi) I had a network
> interface (vmx)
Hi,
brief background: on an amd64 VM (1 CPU on VMWare ESXi) I had a network
interface (vmx) failing because it could not get an interrupt slot. The
vmx wants 3 interrupts per interface (tx/rx/link-state). I had a few
on an admin machine and one started failing when ahcisata was changed to
use
