On Mon, Mar 21, 2005 at 06:34:07PM -0800, Major Variola (ret) wrote:
Tangentially, I should note that there are modes of encryption which can be
scaled infinitely with parallel hardware; they use interleaved blocks so each
chip sees every Nth block of the real stream. So high clock rates are
How much off-the-shelf crypto IP is available to be plopped on a crypto net
processor? Are their stego detection/cracking Development kits and so on?
-TD
From: Major Variola (ret) [EMAIL PROTECTED]
To: [EMAIL PROTECTED] [EMAIL PROTECTED]
Subject: Re: FW: on FPGAs vs ASICs
Date: Mon, 21 Mar 2005
From Major Variola (ret)
Tyler, Riad, etc:
FPGAs are used in telecom because the volumes do not support an ASIC
run.
Riad doesn't seem to appreciate this. He does understand that an ASIC
is more
efficient because its gates are used only for 1 computation,
rather than
most
(FPGA)
At 05:44 PM 3/20/05 -0500, Tyler Durden wrote:
What I suspect is that there's already some crypto net processors out
there,
though they may be classified, or the commercial equivalent (ie, I
assume
there are 'classified' catalogs from companies like General Dynamics
that
normal clients never see).
From Major Variola (ret)
Tyler, Riad, etc:
FPGAs are used in telecom because the volumes do not support an ASIC
run.
Riad doesn't seem to appreciate this. He does understand that an ASIC
is more
efficient because its gates are used only for 1 computation,
rather than
most
(FPGA)
