Re: X86 dispatch contention vulnerability

2018-11-17 Thread jim bell
On Friday, November 16, 2018, 12:15:13 PM PST, juan wrote: On Thu, 15 Nov 2018 23:25:18 + (UTC) jim bell wrote: >> When I worked for Intel (1980-1982), a typical silicon linewidth was 3 >> microns.  (3000 nanometers.)  Recently I saw that Intel was using a 10 >> nanometer process,

Re: X86 dispatch contention vulnerability CRM:0461068385

2018-11-16 Thread Ryan Carboni
Apple is a better company than than Microsoft. I ask you this: how does Microsoft handle wiretap requests? How does Apple handle wiretap requests? Does Microsoft sign any DLLs that is asked of them? It is curious that no journalist talks about common procedure. No doubt this “attacker” is defined

Re: X86 dispatch contention vulnerability

2018-11-16 Thread juan
On Thu, 15 Nov 2018 23:25:18 + (UTC) jim bell wrote: > When I worked for Intel (1980-1982), a typical silicon linewidth was 3 > microns.  (3000 nanometers.)  Recently I saw that Intel was using a 10 > nanometer process, 300x smaller in linear size, and (300x)**2  (90,000) > smaller in

Re: X86 dispatch contention vulnerability

2018-11-15 Thread jim bell
On Thursday, November 15, 2018, 12:49:56 PM PST, juan wrote: On Wed, 14 Nov 2018 21:15:29 + (UTC) jim bell wrote: me >>    IIRC you also worked for intel designing memory chips? Excuse my rather naive question but...Did you see/hear at that time any hints that chips  were

Re: X86 dispatch contention vulnerability

2018-11-15 Thread juan
On Wed, 14 Nov 2018 21:15:29 + (UTC) jim bell wrote: me >>    IIRC you also worked for intel designing memory chips? Excuse my rather naive question but...Did you see/hear at that time any hints that chips  were being tampered with or somehow backdooored  because of 'national security'? 

Re: X86 dispatch contention vulnerability

2018-11-14 Thread Travis Biehn
On Wed, Nov 14, 2018 at 4:15 PM jim bell wrote: > > > On Wednesday, November 14, 2018, 11:52:43 AM PST, juan > wrote: > > > On Wed, 14 Nov 2018 19:00:52 + (UTC) > > jim bell wrote: > > > >> My company, SemiDisk Systems, was very close to the first disk emulator > for a number of types of

Re: X86 dispatch contention vulnerability

2018-11-14 Thread jim bell
On Wednesday, November 14, 2018, 11:52:43 AM PST, juan wrote: On Wed, 14 Nov 2018 19:00:52 + (UTC) jim bell wrote:   >> My company, SemiDisk Systems, was very close to the first disk emulator for >> a number of types of PC, including the S-100, TRS-80 Model II, IBM PC, Epson

Re: X86 dispatch contention vulnerability

2018-11-14 Thread juan
On Wed, 14 Nov 2018 19:00:52 + (UTC) jim bell wrote:   > My company, SemiDisk Systems, was very close to the first disk emulator for a > number of types of PC, including the S-100, TRS-80 Model II, IBM PC, Epson >

Re: X86 dispatch contention vulnerability

2018-11-14 Thread jim bell
In "the good old days", in the 1970's, microprocessors were so much simpler.  My favorite one for awhile, the Z-80 was trivial by today's standards.  No multi-threading, no pipelining, no speculative instruction execution, etc.   I built my own homebrew personal computer, which I called the

Re: X86 dispatch contention vulnerability

2018-11-14 Thread Ryan Carboni
Let my life be a lesson in futility. Go up against the government, and they’ll send everything they got against you, including things that defy known laws of physics. Go with the government, get paid out of the NATO vulnerability slush fund of tens of millions of dollars a year. And sometimes a

Re: X86 dispatch contention vulnerability

2018-11-14 Thread Ryan Carboni
Pretty embarrassing for “Intel Inside” if you ask me. Wonder how many “whitehats” let their findings get suppressed for money. On Wednesday, November 14, 2018, jim bell wrote: > Sounds like a valid issue! > > Jim Bell > > On Wednesday, November 14, 2018, 9:36:06 AM PST, Ryan

Re: X86 dispatch contention vulnerability

2018-11-14 Thread jim bell
Sounds like a valid issue!             Jim Bell On Wednesday, November 14, 2018, 9:36:06 AM PST, Ryan Carboni wrote: While many x86 implementation vulnerabilities in the past involve either electromagnetic emissions or cache timing attacks, I have not read anything about instruction