Hi,
On Thu, Jun 26, 2014 at 11:41:28AM +0800, Huacai Chen wrote:
Multiple Loongson-3A chips can be interconnected with HT0-bus. This is
a CC-NUMA system that every chip (node) has its own local memory and
cache coherency is maintained by hardware. The 64-bit physical memory
address format is
Hi, Aurelien,
Alexandre Oliva meet the same problem, and the root cause is
arch/mips/include/asm/sparsemem.h,
#define MAX_PHYSMEM_BITS48
This line is not suitable for Loongson-2. My original patch make this line
depend on CONFIG_NUMA, but Ralf suggest to remove that dependency.
Maybe we
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