[dpdk-dev] [PATCH 1/1] mpipe: add missing version map for mpipe pmd driver

Without it, compiling error occurs when CONFIG_RTE_BUILD_SHARED_LIB is enabled. Reported-by: Guo Xin Signed-off-by: Zhigang Lu --- drivers/net/mpipe/rte_pmd_mpipe_version.map | 3 +++ 1 file changed, 3 insertions(+) create mode 100644 drivers/net/mpipe/rte_pmd_mpipe_version.map diff --git

[dpdk-dev] [PATCH 1/1] config/tile: disable KNI kmod option on tile

Commit 36080ff96b0e causes compiling error on tile, as tile does not support KNI, so we disable the CONFIG_RTE_KNI_KMOD. Fixes: 36080ff96b0e ("config: add KNI kmod option") Reported-by: Guo Xin Signed-off-by: Zhigang Lu --- config/defconfig_tile-tilegx-linuxapp-gcc | 1 + 1 file

[dpdk-dev] [PATCH] bnx2x: fix undeclared PAGE_SIZE build error

assignment discards qualifiers from pointer target type Signed-off-by: Zhigang Lu --- drivers/net/bnx2x/bnx2x.h| 2 ++ drivers/net/bnx2x/bnx2x_ethdev.h | 1 - 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h index b1e36e

[dpdk-dev] [PATCH] tile: add const in prefetch functions

commit 7c5d0cc91579 added const in prefetch functions for X86 and PPC. This patch does the same for Tile arch. Fixes: 7c5d0cc91579 ("eal: add const in prefetch functions") Signed-off-by: Zhigang Lu --- lib/librte_eal/common/include/arch/tile/rte_prefetch.h | 6 +++--- 1 file

[dpdk-dev] [PATCH v5 11/11] maintainers: claim responsibility for TILE-Gx platform

From: Cyril Chemparathy <cchempara...@ezchip.com> Signed-off-by: Cyril Chemparathy Signed-off-by: Zhigang Lu --- MAINTAINERS | 4 1 file changed, 4 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 5476a73..6ffa01b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -114,6 +

[dpdk-dev] [PATCH v5 10/11] tile: Add TILE-Gx mPIPE poll mode driver.

From: Cyril Chemparathy <cchempara...@ezchip.com> This commit adds a poll mode driver for the mPIPE hardware present on TILE-Gx SoCs. Signed-off-by: Cyril Chemparathy Signed-off-by: Zhigang Lu --- config/defconfig_tile-tilegx-linuxapp-gcc |1 + drivers/net/Ma

[dpdk-dev] [PATCH v5 09/11] tile: initial TILE-Gx support.

From: Cyril Chemparathy <cchempara...@ezchip.com> This commit adds support for the TILE-Gx platform, as well as the TILE CPU architecture. This architecture port is fairly simple due to its reliance on generics for most arch stuff. Signed-off-by: Cyril Chemparathy Signed-off-by: Zhig

[dpdk-dev] [PATCH v5 08/11] tile: add page sizes for TILE-Gx/Mx platforms

From: Cyril Chemparathy <cchempara...@ezchip.com> This patch adds a few new page sizes that are supported on the TILE-Gx and TILE-Mx platforms. Signed-off-by: Cyril Chemparathy Signed-off-by: Zhigang Lu --- lib/librte_eal/common/eal_common_memzone.c | 8 + lib/librte_eal/common/i

[dpdk-dev] [PATCH v5 07/11] mempool: allow config override on element alignment

f left unspecified. Signed-off-by: Cyril Chemparathy Signed-off-by: Zhigang Lu Acked-by: Bruce Richardson --- lib/librte_mempool/rte_mempool.c | 16 +--- lib/librte_mempool/rte_mempool.h | 6 ++ 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/lib/librte_mempool/rte_mempo

[dpdk-dev] [PATCH v5 06/11] memzone: allow multiple pagesizes to be requested

ecific disjunctions (2MB vs 1GB on x86, and 16MB vs 16GB on PPC), thereby allowing for a broader range of hugepages on architectures that support it. Signed-off-by: Cyril Chemparathy Signed-off-by: Zhigang Lu --- lib/librte_eal/common/eal_common_memzone.c | 58 ++

[dpdk-dev] [PATCH v5 05/11] memzone: refactor rte_memzone_reserve() variants

ifying it into rte_memzone_reserve_thread_safe(), which is then called by all three variants of rte_memzone_reserve(). Signed-off-by: Cyril Chemparathy Signed-off-by: Zhigang Lu --- lib/librte_eal/common/eal_common_memzone.c | 77 +- 1 file changed, 33 insertions(

[dpdk-dev] [PATCH v5 04/11] config: remove RTE_LIBNAME definition.

From: Cyril Chemparathy <cchempara...@ezchip.com> The library name is now being pinned to "dpdk" instead of intel_dpdk, powerpc_dpdk, etc. As a result, we no longer need this config item. This patch removes it. Signed-off-by: Cyril Chemparathy Signed-off-by: Zhigang Lu

[dpdk-dev] [PATCH v5 03/11] eal: allow empty compile time flags RTE_COMPILE_TIME_CPUFLAGS

Signed-off-by: Cyril Chemparathy Signed-off-by: Zhigang Lu Acked-by: Bruce Richardson --- lib/librte_eal/common/eal_common_cpuflags.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/librte_eal/common/eal_common_cpuflags.c b/lib/librte_eal/common/eal_common_cpufla

[dpdk-dev] [PATCH v5 02/11] hash: check SSE flags only on x86 builds

From: Cyril Chemparathy <cchempara...@ezchip.com> This is necessary because the required CPU flags may not be defined on other architectures. Signed-off-by: Cyril Chemparathy Signed-off-by: Zhigang Lu Acked-by: Bruce Richardson --- lib/librte_hash/rte_hash_crc.h | 2 ++ 1 file chan

[dpdk-dev] [PATCH v5 00/11] Introducing the TILE-Gx platform

ode driver. maintainers: claim responsibility for TILE-Gx platform Zhigang Lu (1): eal: allow empty compile time flags RTE_COMPILE_TIME_CPUFLAGS MAINTAINERS|4 + app/test/test_cpuflags.c |6 +- config/com

[dpdk-dev] [PATCH v4 11/11] maintainers: claim responsibility for TILE-Gx platform

From: Cyril Chemparathy <cchempara...@ezchip.com> Signed-off-by: Zhigang Lu --- MAINTAINERS | 4 1 file changed, 4 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 5476a73..6ffa01b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -114,6 +114,10 @@ M: Bruce Richards

[dpdk-dev] [PATCH v4 10/11] tile: Add TILE-Gx mPIPE poll mode driver.

From: Cyril Chemparathy <cchempara...@ezchip.com> This commit adds a poll mode driver for the mPIPE hardware present on TILE-Gx SoCs. Signed-off-by: Zhigang Lu --- config/defconfig_tile-tilegx-linuxapp-gcc |1 + drivers/net/Makefile |1 + drivers/net/mpipe/Ma

[dpdk-dev] [PATCH v4 09/11] tile: initial TILE-Gx support.

From: Cyril Chemparathy <cchempara...@ezchip.com> This commit adds support for the TILE-Gx platform, as well as the TILE CPU architecture. This architecture port is fairly simple due to its reliance on generics for most arch stuff. Signed-off-by: Zhigang Lu --- config/defconfig_tile-

[dpdk-dev] [PATCH v4 08/11] tile: add page sizes for TILE-Gx/Mx platforms

From: Cyril Chemparathy <cchempara...@ezchip.com> This patch adds a few new page sizes that are supported on the TILE-Gx and TILE-Mx platforms. Signed-off-by: Zhigang Lu --- lib/librte_eal/common/eal_common_memzone.c | 8 + lib/librte_eal/common/include/rte_memory.h | 16 +---

[dpdk-dev] [PATCH v4 07/11] mempool: allow config override on element alignment

f left unspecified. Signed-off-by: Zhigang Lu Acked-by: Bruce Richardson --- lib/librte_mempool/rte_mempool.c | 16 +--- lib/librte_mempool/rte_mempool.h | 6 ++ 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mem

[dpdk-dev] [PATCH v4 06/11] memzone: allow multiple pagesizes to be requested

ecific disjunctions (2MB vs 1GB on x86, and 16MB vs 16GB on PPC), thereby allowing for a broader range of hugepages on architectures that support it. Signed-off-by: Zhigang Lu --- lib/librte_eal/common/eal_common_memzone.c | 58 ++ 1 file changed, 27 insertions(

[dpdk-dev] [PATCH v4 05/11] memzone: refactor rte_memzone_reserve() variants

ifying it into rte_memzone_reserve_thread_safe(), which is then called by all three variants of rte_memzone_reserve(). Signed-off-by: Zhigang Lu --- lib/librte_eal/common/eal_common_memzone.c | 77 +- 1 file changed, 33 insertions(+), 44 deletions(-) diff --git a/lib/libr

[dpdk-dev] [PATCH v4 04/11] config: remove RTE_LIBNAME definition.

From: Cyril Chemparathy <cchempara...@ezchip.com> The library name is now being pinned to "dpdk" instead of intel_dpdk, powerpc_dpdk, etc. As a result, we no longer need this config item. This patch removes it. Signed-off-by: Zhigang Lu Acked-by: Bruce Richardson --- conf

[dpdk-dev] [PATCH v4 03/11] eal: allow empty compile time flags RTE_COMPILE_TIME_CPUFLAGS

Signed-off-by: Zhigang Lu Acked-by: Bruce Richardson --- lib/librte_eal/common/eal_common_cpuflags.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/librte_eal/common/eal_common_cpuflags.c b/lib/librte_eal/common/eal_common_cpuflags.c index 6fd360c..8ba7b30 100644

[dpdk-dev] [PATCH v4 01/11] test: limit x86 cpuflags checks to x86 builds

From: Cyril Chemparathy <cchempara...@ezchip.com> The original code mistakenly defaulted to X86 when RTE_ARCH_PPC_64 was left undefined. This did not accomodate other non-PPC/non-X86 architectures. This patch fixes this issue. Signed-off-by: Zhigang Lu Acked-by: Bruce Richardson --

[dpdk-dev] [PATCH v4 00/11] Introducing the TILE-Gx platform

or TILE-Gx platform Zhigang Lu (1): eal: allow empty compile time flags RTE_COMPILE_TIME_CPUFLAGS MAINTAINERS|4 + app/test/test_cpuflags.c |6 +- config/common_bsdapp |1 - config/commo

[dpdk-dev] [PATCH v3 12/12] maintainers: claim responsibility for TILE-Gx platform

Change-Id: I6491108ff86c1249bf4ffa4d4624c01b4594805e Signed-off-by: Zhigang Lu --- MAINTAINERS | 4 1 file changed, 4 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 5476a73..6ffa01b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -114,6 +114,10 @@ M: Bruce Richardson M

[dpdk-dev] [PATCH v3 11/12] tile: Add TILE-Gx mPIPE poll mode driver.

This commit adds a poll mode driver for the mPIPE hardware present on TILE-Gx SoCs. Change-Id: I1b9a9ef2c9f1c96810ec58b4d2ae77b870a6ec94 Signed-off-by: Zhigang Lu --- config/defconfig_tile-tilegx-linuxapp-gcc |1 + drivers/net/Makefile |1 + drivers/net/mpipe

[dpdk-dev] [PATCH v3 08/12] mempool: allow config override on element alignment

: I9cd789d92b0bc9c8f44a633de59bb04d45d927a7 Signed-off-by: Zhigang Lu --- lib/librte_mempool/rte_mempool.c | 16 +--- lib/librte_mempool/rte_mempool.h | 6 ++ 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c index 02699a1..8e185c5

[dpdk-dev] [PATCH v3 07/12] memzone: allow multiple pagesizes to be requested

on PPC), thereby allowing for a broader range of hugepages on architectures that support it. Change-Id: Ic3713f61da49629a570fe4de34a8aaf5e2e0a19b Signed-off-by: Zhigang Lu --- lib/librte_eal/common/eal_common_memzone.c | 58 ++ 1 file changed, 27 insertions(+), 31

[dpdk-dev] [PATCH v3 06/12] memzone: refactor rte_memzone_reserve() variants

is then called by all three variants of rte_memzone_reserve(). Change-Id: Id26c25b4dd3d07861eaf35e72aaa2de555916fa3 Signed-off-by: Zhigang Lu --- lib/librte_eal/common/eal_common_memzone.c | 77 +- 1 file changed, 33 insertions(+), 44 deletions(-) diff --git a/lib

[dpdk-dev] [PATCH v3 05/12] config: remove RTE_LIBNAME definition.

The library name is now being pinned to "dpdk" instead of intel_dpdk, powerpc_dpdk, etc. As a result, we no longer need this config item. This patch removes it. Change-Id: I36f7cf6c18c3563c6f5ccdf01bb70579c7ccaa16 Signed-off-by: Zhigang Lu --- config/common_bsdapp

[dpdk-dev] [PATCH v3 04/12] eal: allow empty compile time flags

Signed-off-by: Zhigang Lu --- lib/librte_eal/common/eal_common_cpuflags.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/librte_eal/common/eal_common_cpuflags.c b/lib/librte_eal/common/eal_common_cpuflags.c index 6fd360c..8ba7b30 100644 --- a/lib/librte_

[dpdk-dev] [PATCH v3 03/12] hash: check SSE flags only on x86 builds

This is necessary because the required CPU flags may not be defined on other architectures. Change-Id: I14d3f9f625b2e7567123f1c97095f8d06abd674b Signed-off-by: Zhigang Lu --- lib/librte_hash/rte_hash_crc.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/librte_hash/rte_hash_crc.h b

[dpdk-dev] [PATCH v3 02/12] hash: fix compilation on non-X86 platforms

The "hash: remove duplicated code" change unfortunately broke the build for non-X86 platforms. This patch fixes this breakage. Change-Id: Ie109d67e681b75b45320fab1bf9de4eb9c9701bf Signed-off-by: Zhigang Lu --- lib/librte_hash/rte_jhash.h | 3 ++- 1 file changed, 2 insertions(+),

[dpdk-dev] [PATCH v3 01/12] test: limit x86 cpuflags checks to x86 builds

The original code mistakenly defaulted to X86 when RTE_ARCH_PPC_64 was left undefined. This did not accomodate other non-PPC/non-X86 architectures. This patch fixes this issue. Change-Id: I5e8cf33c2eb917f7f6583dc95ed0f336066a285e Signed-off-by: Zhigang Lu --- app/test/test_cpuflags.c | 6

[dpdk-dev] [PATCH v3 00/12] Introducing the TILE-Gx platform

This series adds support for the EZchip TILE-Gx family of SoCs. The architecture port in itself is fairly straight forward due to its reliance on generics for the most part. In addition to adding TILE-Gx architecture specific code, this series includes a few cross-platform fixes for DPDK

[dpdk-dev] [PATCH v2 11/12] eal: allow empty set of compile time cpuflags

On architectures that do not rely on RTE_COMPILE_TIME_CPUFLAGS, the compile_time_flags[] array can end up being zero sized. This results in a compiler complaint in the subsequent loop. Pulling out the array size computation silences this complaint. Signed-off-by: Zhigang Lu Signed-off

[dpdk-dev] [PATCH v2 10/12] app/test: remove architecture specific code from cpuflags test

Test all defined CPU flags for supported architectures so that we do not have to include conditional compilation for each architecture in app test case. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- app/test/test_cpuflags.c | 78

[dpdk-dev] [PATCH v2 09/12] eal/tile: add CPU flags operations for TileGx

This patch adds empty functions for CPU flags operations to support DPDK, since tile processor doesn't have CPU flag hardware registers. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- .../common/include/arch/tile/rte_cpuflags.h| 78 ++ 1 file changed

[dpdk-dev] [PATCH v2 08/12] eal/tile: add vector operations for TileGx

Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- .../common/include/arch/tile/rte_common_vect.h | 49 ++ 1 file changed, 49 insertions(+) create mode 100644 lib/librte_eal/common/include/arch/tile/rte_common_vect.h diff --git a/lib/librte_eal/common

[dpdk-dev] [PATCH v2 07/12] eal: split vector operations to architecture specific

This patch splits vector operations from DPDK and push them to architecture specific arch directories, so that other processor architecture can implement its own vector functions to support DPDK. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- lib/librte_eal/common/Makefile

[dpdk-dev] [PATCH v2 06/12] eal/tile: add cycle operations for TileGx

This patch adds CPU TSC read operations for TileGx. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- .../common/include/arch/tile/rte_cycles.h | 64 ++ 1 file changed, 64 insertions(+) create mode 100644 lib/librte_eal/common/include/arch/tile

[dpdk-dev] [PATCH v2 04/12] eal/tile: add prefetch operations for TileGx

Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- .../common/include/arch/tile/rte_prefetch.h| 62 ++ 1 file changed, 62 insertions(+) create mode 100644 lib/librte_eal/common/include/arch/tile/rte_prefetch.h diff --git a/lib/librte_eal/common/include

[dpdk-dev] [PATCH v2 02/12] eal/tile: add byte order operations for TileGx

This patch adds architecture specific byte swap and endianness operations for TileGx. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- .../common/include/arch/tile/rte_byteorder.h | 70 ++ 1 file changed, 70 insertions(+) create mode 100644 lib

[dpdk-dev] [PATCH v2 01/12] eal/tile: add atomic operations for TileGx

This patch adds architecture specific memory barrier operations for TileGx. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- .../common/include/arch/tile/rte_atomic.h | 62 ++ 1 file changed, 62 insertions(+) create mode 100644 lib/librte_eal/common

[dpdk-dev] [PATCH 15/15] eal: allow empty set of compile time cpuflags

On architectures that do not rely on RTE_COMPILE_TIME_CPUFLAGS, the compile_time_flags[] array can end up being zero sized. This results in a compiler complaint in the subsequent loop. Pulling out the array size computation silences this complaint. Signed-off-by: Zhigang Lu Signed-off

[dpdk-dev] [PATCH 13/15] pmd/tile: add mPIPE poll mode driver for TileGx

Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- lib/Makefile |1 + lib/librte_pmd_mpipe/Makefile| 24 + lib/librte_pmd_mpipe/pmd_mpipe.c | 1343 ++ mk/rte.app.mk|4 + 4 files changed, 1372

[dpdk-dev] [PATCH 12/15] eal/tile: add mPIPE buffer stack mempool provider

TileGX: Modified mempool to allow for variable metadata. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- app/test-pmd/mempool_anon.c | 2 +- app/test/Makefile | 6 +- app/test/test_mempool_tile.c | 217 lib/Makefile

[dpdk-dev] [PATCH 11/15] eal/tile: add EAL support for global mPIPE initialization

The TileGx mPIPE hardware provides Ethernet connectivity, packet classification, and packet load balancing services. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- .../common/include/arch/tile/rte_mpipe.h | 67 ++ lib/librte_eal/linuxapp/eal/Makefile

[dpdk-dev] [PATCH 10/15] eal/tile: add vector operations for TileGx

Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- .../common/include/arch/tile/rte_common_vect.h | 49 ++ 1 file changed, 49 insertions(+) create mode 100644 lib/librte_eal/common/include/arch/tile/rte_common_vect.h diff --git a/lib/librte_eal/common

[dpdk-dev] [PATCH 09/15] eal: split vector operations to architecture specific

This patch splits vector operations from DPDK and push them to architecture specific arch directories, so that other processor architecture can implement its own vector functions to support DPDK. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- lib/librte_eal/common/Makefile

[dpdk-dev] [PATCH 08/15] eal/tile: add cycle operations for TileGx

This patch adds CPU TSC read operations for TileGx. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- .../common/include/arch/tile/rte_cycles.h | 64 ++ 1 file changed, 64 insertions(+) create mode 100644 lib/librte_eal/common/include/arch/tile

[dpdk-dev] [PATCH 05/15] eal/tile: add prefetch operations for TileGx

Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- .../common/include/arch/tile/rte_prefetch.h| 62 ++ 1 file changed, 62 insertions(+) create mode 100644 lib/librte_eal/common/include/arch/tile/rte_prefetch.h diff --git a/lib/librte_eal/common/include

[dpdk-dev] [PATCH 04/15] eal/tile: add spinlock operations for TileGx

TileGx uses generic spinlock operations. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- .../common/include/arch/tile/rte_spinlock.h| 47 ++ 1 file changed, 47 insertions(+) create mode 100644 lib/librte_eal/common/include/arch/tile/rte_spinlock.h

[dpdk-dev] [PATCH 03/15] eal/tile: add byte order operations for TileGx

This patch adds architecture specific byte swap and endianness operations for TileGx. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- .../common/include/arch/tile/rte_byteorder.h | 70 ++ 1 file changed, 70 insertions(+) create mode 100644 lib

[dpdk-dev] [PATCH 02/15] eal/tile: add atomic operations for TileGx

This patch adds architecture specific memory barrier operations for TileGx. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- .../common/include/arch/tile/rte_atomic.h | 62 ++ 1 file changed, 62 insertions(+) create mode 100644 lib/librte_eal/common

[dpdk-dev] [PATCH 00/15] Patches for DPDK to support tile architecture

driver for the mPIPE device. And to improve the performance of memory allocation, mPIPE's buffer stack is used as the mempool provider. Zhigang Lu (15): mk: introduce Tilera Tile architecture eal/tile: add atomic operations for TileGx eal/tile: add byte order operations for TileGx eal/tile