On Fri, Jun 19, 2015 at 03:35:38PM +0200, Thomas Monjalon wrote:
> 2015-06-18 11:00, Bruce Richardson:
> > On Wed, Jun 17, 2015 at 11:29:49PM +0200, Thomas Monjalon wrote:
> > > Introducing rte_cpuflags.h in this header breaks the compilation of
> > > the mlx4 pmd with CONFIG_RTE_LIBRTE_MLX4_DEBUG=
2015-06-18 11:00, Bruce Richardson:
> On Wed, Jun 17, 2015 at 11:29:49PM +0200, Thomas Monjalon wrote:
> > Introducing rte_cpuflags.h in this header breaks the compilation of
> > the mlx4 pmd with CONFIG_RTE_LIBRTE_MLX4_DEBUG=y.
> > Indeed, it triggers the -pedantic flag which is not supported by
On Wed, Jun 17, 2015 at 11:29:49PM +0200, Thomas Monjalon wrote:
> 2015-06-16 10:16, Roman Dementiev:
> > --- a/lib/librte_eal/common/include/arch/x86/rte_spinlock.h
> > +++ b/lib/librte_eal/common/include/arch/x86/rte_spinlock.h
> > @@ -39,6 +39,13 @@ extern "C" {
> > #endif
> >
> > #include "
2015-06-16 10:16, Roman Dementiev:
> --- a/lib/librte_eal/common/include/arch/x86/rte_spinlock.h
> +++ b/lib/librte_eal/common/include/arch/x86/rte_spinlock.h
> @@ -39,6 +39,13 @@ extern "C" {
> #endif
>
> #include "generic/rte_spinlock.h"
> +#include "rte_rtm.h"
> +#include "rte_cpuflags.h"
>
This patch adds methods that use hardware memory transactions (HTM) on fast-path
for spinlocks (a.k.a. lock elision). Here the methods are implemented for x86
using Restricted Transactional Memory instructions (Intel(r) Transactional
Synchronization Extensions). The implementation fall-backs to the
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