> > > > From: Jerin Jacob [mailto:jerin.jacob at caviumnetworks.com]
> > > > Sent: Tuesday, November 03, 2015 4:19 PM
> > > > To: Ananyev, Konstantin
> > > > Cc: dev at dpdk.org
> > > > Subject: Re: [dpdk-dev] [RFC ][PATCH] Introduce
-
> > > > From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Jerin Jacob
> > > > Sent: Tuesday, November 03, 2015 3:52 PM
> > > > To: dev at dpdk.org
> > > > Subject: [dpdk-dev] [RFC ][PATCH] Introduce
> > > > RTE_ARCH_STRONGLY_ORDERED
rte_ring implementation needs explicit memory barrier
in weakly ordered architecture like ARM unlike
strongly ordered architecture like X86
Introducing RTE_ARCH_STRONGLY_ORDERED_MEM_OPS
configuration to abstract such dependency so that other
weakly ordered architectures can reuse this
> -Original Message-
> From: Jerin Jacob [mailto:jerin.jacob at caviumnetworks.com]
> Sent: Tuesday, November 03, 2015 4:53 PM
> To: Ananyev, Konstantin
> Cc: dev at dpdk.org
> Subject: Re: [dpdk-dev] [RFC ][PATCH] Introduce
> RTE_ARCH_STRONGLY_ORDERED_MEM_OPS co
15 4:19 PM
> > > To: Ananyev, Konstantin
> > > Cc: dev at dpdk.org
> > > Subject: Re: [dpdk-dev] [RFC ][PATCH] Introduce
> > > RTE_ARCH_STRONGLY_ORDERED_MEM_OPS configuration parameter
> > >
> > > On Tue, Nov 03, 2015 at 03:57:24PM +, Ananyev, Ko
> -Original Message-
> From: Jerin Jacob [mailto:jerin.jacob at caviumnetworks.com]
> Sent: Tuesday, November 03, 2015 4:19 PM
> To: Ananyev, Konstantin
> Cc: dev at dpdk.org
> Subject: Re: [dpdk-dev] [RFC ][PATCH] Introduce
> RTE_ARCH_STRONGLY_ORDERED_MEM_OPS co
> -Original Message-
> From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Jerin Jacob
> Sent: Tuesday, November 3, 2015 4:19 PM
> To: Ananyev, Konstantin
> Cc: dev at dpdk.org
> Subject: Re: [dpdk-dev] [RFC ][PATCH] Introduce
> RTE_ARCH_STRONGLY_ORDERED_
> -Original Message-
> From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Jerin Jacob
> Sent: Tuesday, November 03, 2015 3:52 PM
> To: dev at dpdk.org
> Subject: [dpdk-dev] [RFC ][PATCH] Introduce RTE_ARCH_STRONGLY_ORDERED_MEM_OPS
> configuration param
Do we need to have all these #ifdef, it looks messy, can you not define
a macro that is defined based upon
RTE_ARCH_STRONGLY_ORDERED_MEM_OP
/Simon
On 11/03/2015 03:52 PM, Jerin Jacob wrote:
> rte_ring implementation needs explicit memory barrier
> in weakly ordered architecture like ARM
9 matches
Mail list logo
