[dpdk-dev] Relationship between H/W ring and S/W ring

Now I understand. Thanks Bruce. 2014? 10? 31? 19:08? Bruce Richardson ?(?) ? ?: > On Fri, Oct 31, 2014 at 09:51:56AM +0900, Gyumin wrote: >> Thanks Bruce. >> >> I also agree with that the size of the S/W ring depends on the configuration >> parameters because the size of the S/W ring is /sizeof(st

[dpdk-dev] Relationship between H/W ring and S/W ring

On Fri, Oct 31, 2014 at 09:51:56AM +0900, Gyumin wrote: > Thanks Bruce. > > I also agree with that the size of the S/W ring depends on the configuration > parameters because the size of the S/W ring is /sizeof(struct igb_rx_entry) > * len/ in the ixgbe_dev_rx_queue_setup function. H/W ring is also

[dpdk-dev] Relationship between H/W ring and S/W ring

Thanks Bruce. I also agree with that the size of the S/W ring depends on the configuration parameters because the size of the S/W ring is /sizeof(struct igb_rx_entry) * len/ in the ixgbe_dev_rx_queue_setup function. H/W ring is also allocated in the same function by using the ring_dma_zone_res

[dpdk-dev] Relationship between H/W ring and S/W ring

Hi I`m reading the ixgbe code especially about H/W ring and S/W ring. Is the relationship between H/W ring and S/W ring one-to-one mapping? As far as I know, H/W ring size is determined in the code(hard coded) while S/W ring size is determined in port configuration time. In the ixgbe_rx_alloc_bu

[dpdk-dev] Relationship between H/W ring and S/W ring

On Thu, Oct 30, 2014 at 04:32:16PM +0900, Gyumin wrote: > Hi > > I`m reading the ixgbe code especially about H/W ring and S/W ring. Is the > relationship between H/W ring and S/W ring one-to-one mapping? > As far as I know, H/W ring size is determined in the code(hard coded) while > S/W ring size