Re: [dpdk-dev] [PATCH] mk: change TLS model for ARMv8 and DPAA machine

[Sachin Saxena]

> -Original Message-
> From: Jerin Jacob [mailto:jerin.ja...@caviumnetworks.com]
> Sent: Sunday, June 10, 2018 4:37 PM
> To: Hemant Agrawal 
> Cc: dev@dpdk.org; Sachin Saxena 
> Subject: Re: [dpdk-dev] [PATCH] mk: change TLS model for ARMv8 and DPAA
> machine
> 
> -Original Message-
> > Date: Tue,  5 Jun 2018 12:03:45 +0530
> > From: Hemant Agrawal 
> > To: dev@dpdk.org
> > CC: Sachin Saxena 
> > Subject: [dpdk-dev] [PATCH] mk: change TLS model for ARMv8 and DPAA
> > machine
> > X-Mailer: git-send-email 2.7.4
> >
> > From: Sachin Saxena 
> >
> > Random corruptions observed on ARM platfoms with using the dpdk
> > library in shared mode with VPP software (plugin).
> >
> > sing traditional TLS scheme resolved the issue.
> >
> > Tested with VPP with DPDK as a plugin.
> >
> > Signed-off-by: Sachin Saxena 
> > ---
> >  mk/machine/armv8a/rte.vars.mk | 3 +++
> >  mk/machine/dpaa/rte.vars.mk   | 3 +++
> >  mk/machine/dpaa2/rte.vars.mk  | 3 +++
> >  3 files changed, 9 insertions(+)
> >
> > diff --git a/mk/machine/armv8a/rte.vars.mk
> > b/mk/machine/armv8a/rte.vars.mk index 8252efb..6897cd6 100644
> > --- a/mk/machine/armv8a/rte.vars.mk
> > +++ b/mk/machine/armv8a/rte.vars.mk
> > @@ -29,3 +29,6 @@
> >  # CPU_ASFLAGS =
> >
> >  MACHINE_CFLAGS += -march=armv8-a+crc+crypto
> > +
> > +# To avoid TLS corruption issue.
> > +MACHINE_CFLAGS += -mtls-dialect=trad
> 
> This issue is not reproducible on Cavium ARMv8 platforms. Just wondering,
> Do we need to change default ARMv8 config?
[Sachin Saxena]  The issue is currently visible On NXP platforms with VPP-dpdk 
solution only. Similar behavior like random crashes or initialization failures 
have been seen by Cavium guys on VPP but they are still investigating whether 
the issues are related to TLS corruption.
Also, issue will not be there with statically linked dpdk applications

> 
> The GNU (descriptor) dialect for TLS is the default has been since for a while
> on aarch64.
[Sachin Saxena] I agree but this model only applies to Shared mode compilation. 
As per my knowledge, the "initial-exec" model is default for static compilation 
or when -fPIC is not used. For shared dpdk or when -fPIC is used, the default 
is "global-dynamics" and tls-dialect=desc.

> 
> I think, it will be mostly a glibc issue with your SDK based toolchain.
> Are you able to reproduce this issue with Linaro toolchain + standard OS
> distribution environments? if so, could you please share more details.
[Sachin Saxena] Yes, issue is happening with both SDK & Linaro 7.2 toolchain.
> 
> I am only concerned about, any performance issue with traditional tls dialect
> model vs descriptor dialect.
[Sachin Saxena] No performance impact is expected for statically build dpdk. 
For shared mode, minor impact is expected but performance analysis is yet to be 
done. The Fix is suggested because right now it is functionally broken with VPP.
> 
> I think, we have two options,
> 1) If you can identify if it is due a specific glibc version then we could 
> detect
> at runtime
> 2) In a worst case, it can be a conditional compilation option.
> 
> /Jerin

Re: [dpdk-dev] [PATCH 3/6] cryptodev: remove max number of sessions

[De Lara Guarch, Pablo]

Hi Tomasz,

> -Original Message-
> From: Tomasz Duszynski [mailto:t...@semihalf.com]
> Sent: Wednesday, June 13, 2018 7:12 AM
> To: De Lara Guarch, Pablo 
> Cc: Tomasz Duszynski ; Doherty, Declan
> ; akhil.go...@nxp.com; ravi1.ku...@amd.com;
> jerin.ja...@caviumnetworks.com; Zhang, Roy Fan ;
> Trahe, Fiona ; jianjay.z...@huawei.com;
> dev@dpdk.org
> Subject: Re: [PATCH 3/6] cryptodev: remove max number of sessions
> 
> On Tue, Jun 12, 2018 at 01:53:36PM +, De Lara Guarch, Pablo wrote:
> >
> >
> > > -Original Message-
> > > From: Tomasz Duszynski [mailto:t...@semihalf.com]
> > > Sent: Tuesday, June 12, 2018 12:38 PM
> > > To: De Lara Guarch, Pablo 
> > > Cc: Doherty, Declan ; akhil.go...@nxp.com;
> > > ravi1.ku...@amd.com; jerin.ja...@caviumnetworks.com; Zhang, Roy Fan
> > > ; Trahe, Fiona ;
> > > t...@semihalf.com; jianjay.z...@huawei.com; dev@dpdk.org
> > > Subject: Re: [PATCH 3/6] cryptodev: remove max number of sessions
> > >
> > > Hello Pablo,
> > >
> > > On Fri, Jun 08, 2018 at 11:02:31PM +0100, Pablo de Lara wrote:
> > > > Sessions are not created and stored in the crypto device anymore,
> > > > since now the session mempool is created at the application level.
> > > >
> > > > Therefore the limitation of the maximum number of sessions that
> > > > can be created should not be dependent of the crypto device.
> > > >
> > > > Signed-off-by: Pablo de Lara 
> >
> > ...
> >
> > > > diff --git a/drivers/crypto/mvsam/rte_mrvl_pmd.c
> > > b/drivers/crypto/mvsam/rte_mrvl_pmd.c
> > > > index 1b6029a56..822b6cac7 100644
> > > > --- a/drivers/crypto/mvsam/rte_mrvl_pmd.c
> > > > +++ b/drivers/crypto/mvsam/rte_mrvl_pmd.c
> > > > @@ -719,7 +719,6 @@ cryptodev_mrvl_crypto_create(const char *name,
> > > > internals = dev->data->dev_private;
> > > >
> > > > internals->max_nb_qpairs = init_params->max_nb_queue_pairs;
> > > > -   internals->max_nb_sessions = init_params->max_nb_sessions;
> > > >
> > > > /*
> > > >  * ret == -EEXIST is correct, it means DMA @@ -734,8 +733,6 @@
> > > > cryptodev_mrvl_crypto_create(const char *name,
> > > > "DMA memory has been already initialized by a
> > > different driver.");
> > > > }
> > > >
> > > > -   sam_params.max_num_sessions = internals->max_nb_sessions;
> > >
> > > This will not fly since library maintains separate list of sessions.
> > > We have to initialize this number to something sane. Since we cannot
> > > get it from userspace perhaps make that compile-time configurable by
> > > adding separate CONFIG_?
> >
> > Hi Tomasz,
> >
> > If you need to have an actual limit, you could define it internally
> > (not adding an external configuration option), but bear in mind that
> > This won't prevent an application from trying to allocate more sessions.
> 
> You can define arbitrary number of session on condition you have enough
> memory. So no hard limit here. What bothers me is the case where app wants to
> initialize more session than the library internally has.
> If this happens userspace will get an error. On the other hand requesting some
> arbitrary large number of session from library and hoping app will never use 
> so
> many wastes memory (which might be valuable on resource constrained
> systems).
> 
> That is why keeping the number of sessions in app and library in sync is
> important.
> 
> Do we have any option in DPDK now to workaround this?

Ok I see, so actually the MUSDK library needs a maximum number of sessions.
I'd say then we should keep this field, but we can add a special case: 0.
In this case, the PMD does not have any maximum number of sessions
(which would be applicable to most PMDs).

So, for this PMD, this special case is not supported. If 0 is passed,
either return that unlimited number of sessions is not supported,
or set it to a default value (defined inside the PMD, such as 2048).
If no value is passed, this number can be set to the default value too.

How does this sound?

Thanks,
Pablo


> 
> >
> > If your PMD has a limitation on the maximum number of sessions, then
> > maybe this change won't work for you (removing the maximum number of
> sessions), so let me know and we can discuss this.
> >
> > Thanks,
> > Pablo
> >
> > P.S. Please, next time, strip out the code that you are not
> > commenting, as it was hard to find this question :)
> >
> 
> --
> - Tomasz Duszyński

[dpdk-dev] [PATCH v2] net/ixgbe: add query rule stats support for FDIR

[Wei Zhao]

There are many registeres in x550 support stats of
flow director filters, for example the number of added
or removed rules and the number match or miss match packet
count for this for port, all these important information
can be read form registeres in x550 and display with command
xstats.

Signed-off-by: Wei Zhao 
---

v2:
-add mac type check for this register read.

---
 drivers/net/ixgbe/ixgbe_ethdev.c | 15 ---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index 87d2ad0..a3ddfe2 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -3120,9 +3120,18 @@ ixgbe_read_stats_registers(struct ixgbe_hw *hw,
}
 
/* Flow Director Stats registers */
-   hw_stats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
-   hw_stats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
-
+   if (hw->mac.type != ixgbe_mac_82598EB) {
+   hw_stats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
+   hw_stats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
+   hw_stats->fdirustat_add += IXGBE_READ_REG(hw,
+   IXGBE_FDIRUSTAT) & 0x;
+   hw_stats->fdirustat_remove += (IXGBE_READ_REG(hw,
+   IXGBE_FDIRUSTAT) >> 16) & 0x;
+   hw_stats->fdirfstat_fadd += IXGBE_READ_REG(hw,
+   IXGBE_FDIRFSTAT) & 0x;
+   hw_stats->fdirfstat_fremove += (IXGBE_READ_REG(hw,
+   IXGBE_FDIRFSTAT) >> 16) & 0x;
+   }
/* MACsec Stats registers */
macsec_stats->out_pkts_untagged += IXGBE_READ_REG(hw, IXGBE_LSECTXUT);
macsec_stats->out_pkts_encrypted +=
-- 
2.7.5

[dpdk-dev] [PATCH v2] net/ixgbe: add query rule stats support for FDIR

[Wei Zhao]

There are many registeres in x550 support stats of
flow director filters, for example the number of added
or removed rules and the number match or miss match packet
count for this for port, all these important information
can be read form registeres in x550 and display with command
xstats.

Signed-off-by: Wei Zhao 
---

v2:
-add mac type check for this register read.

---
 drivers/net/ixgbe/ixgbe_ethdev.c | 15 ---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index 87d2ad0..a3ddfe2 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -3120,9 +3120,18 @@ ixgbe_read_stats_registers(struct ixgbe_hw *hw,
}
 
/* Flow Director Stats registers */
-   hw_stats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
-   hw_stats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
-
+   if (hw->mac.type != ixgbe_mac_82598EB) {
+   hw_stats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
+   hw_stats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
+   hw_stats->fdirustat_add += IXGBE_READ_REG(hw,
+   IXGBE_FDIRUSTAT) & 0x;
+   hw_stats->fdirustat_remove += (IXGBE_READ_REG(hw,
+   IXGBE_FDIRUSTAT) >> 16) & 0x;
+   hw_stats->fdirfstat_fadd += IXGBE_READ_REG(hw,
+   IXGBE_FDIRFSTAT) & 0x;
+   hw_stats->fdirfstat_fremove += (IXGBE_READ_REG(hw,
+   IXGBE_FDIRFSTAT) >> 16) & 0x;
+   }
/* MACsec Stats registers */
macsec_stats->out_pkts_untagged += IXGBE_READ_REG(hw, IXGBE_LSECTXUT);
macsec_stats->out_pkts_encrypted +=
-- 
2.7.5

[dpdk-dev] [PATCH v2] net/ixgbe: add support for VLAN in IP mode FDIR

[Wei Zhao]

In IP mode FDIR, X550 can support not only 4 tuple parameters
but also vlan tci in protocol, so add this feature to flow parser.

Fixes: 11777435c727 ("net/ixgbe: parse flow director filter")

Signed-off-by: Wei Zhao 
---

v2:
-fix item check error in v1.

---
 drivers/net/ixgbe/ixgbe_flow.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ixgbe/ixgbe_flow.c b/drivers/net/ixgbe/ixgbe_flow.c
index 06bc2a7..8909a21 100644
--- a/drivers/net/ixgbe/ixgbe_flow.c
+++ b/drivers/net/ixgbe/ixgbe_flow.c
@@ -1739,7 +1739,8 @@ ixgbe_parse_fdir_filter_normal(struct rte_eth_dev *dev,
return -rte_errno;
}
} else {
-   if (item->type != RTE_FLOW_ITEM_TYPE_IPV4) {
+   if (item->type != RTE_FLOW_ITEM_TYPE_IPV4 &&
+   item->type != RTE_FLOW_ITEM_TYPE_VLAN) {
memset(rule, 0, sizeof(struct ixgbe_fdir_rule));
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ITEM,
-- 
2.7.5

[dpdk-dev] [PATCH v2] net/ixgbe: fix tunnel id format error for FDIR

[Wei Zhao]

In cloud mode for FDIR, tunnel id should be set as protocol
request, the lower 8 bits should be set as reserved.

Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for X550")
Fixes: 11777435c727 ("net/ixgbe: parse flow director filter")

Signed-off-by: Wei Zhao 
---

v2:
-fix tni bit format error in v1.

---
 drivers/net/ixgbe/ixgbe_fdir.c | 2 +-
 drivers/net/ixgbe/ixgbe_flow.c | 5 +
 2 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c
index d5e5179..67ab627 100644
--- a/drivers/net/ixgbe/ixgbe_fdir.c
+++ b/drivers/net/ixgbe/ixgbe_fdir.c
@@ -774,7 +774,7 @@ ixgbe_fdir_filter_to_atr_input(const struct 
rte_eth_fdir_filter *fdir_filter,
input->formatted.tunnel_type =
fdir_filter->input.flow.tunnel_flow.tunnel_type;
input->formatted.tni_vni =
-   fdir_filter->input.flow.tunnel_flow.tunnel_id;
+   fdir_filter->input.flow.tunnel_flow.tunnel_id >> 8;
}
 
return 0;
diff --git a/drivers/net/ixgbe/ixgbe_flow.c b/drivers/net/ixgbe/ixgbe_flow.c
index eb0644c..f47f125 100644
--- a/drivers/net/ixgbe/ixgbe_flow.c
+++ b/drivers/net/ixgbe/ixgbe_flow.c
@@ -2487,10 +2487,8 @@ ixgbe_parse_fdir_filter_tunnel(const struct 
rte_flow_attr *attr,
rule->b_spec = TRUE;
vxlan_spec = item->spec;
rte_memcpy(((uint8_t *)
-   &rule->ixgbe_fdir.formatted.tni_vni + 1),
+   &rule->ixgbe_fdir.formatted.tni_vni),
vxlan_spec->vni, RTE_DIM(vxlan_spec->vni));
-   rule->ixgbe_fdir.formatted.tni_vni = rte_be_to_cpu_32(
-   rule->ixgbe_fdir.formatted.tni_vni);
}
}
 
@@ -2587,7 +2585,6 @@ ixgbe_parse_fdir_filter_tunnel(const struct rte_flow_attr 
*attr,
/* tni is a 24-bits bit field */
rte_memcpy(&rule->ixgbe_fdir.formatted.tni_vni,
nvgre_spec->tni, RTE_DIM(nvgre_spec->tni));
-   rule->ixgbe_fdir.formatted.tni_vni <<= 8;
}
}
 
-- 
2.7.5

[dpdk-dev] [PATCH] net/ixgbe: fix mask bits register set error for FDIR

[Wei Zhao]

MAC address bits in mask registers should be set to zero
when the is mac mask is 0xFF, otherwise if it is 0x0
these bits should be to 0x3F.

Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for X550")

Signed-off-by: Wei Zhao 
---
 drivers/net/ixgbe/ixgbe_fdir.c | 12 +---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c
index 3feb815..6d97aa3 100644
--- a/drivers/net/ixgbe/ixgbe_fdir.c
+++ b/drivers/net/ixgbe/ixgbe_fdir.c
@@ -394,9 +394,15 @@ fdir_set_input_mask_x550(struct rte_eth_dev *dev)
IXGBE_FDIRIP6M_TNI_VNI;
 
if (mode == RTE_FDIR_MODE_PERFECT_TUNNEL) {
-   mac_mask = info->mask.mac_addr_byte_mask;
-   fdiripv6m |= (mac_mask << IXGBE_FDIRIP6M_INNER_MAC_SHIFT)
-   & IXGBE_FDIRIP6M_INNER_MAC;
+   mac_mask = info->mask.mac_addr_byte_mask & 0x3F;
+   if (mac_mask == 0x3F)
+   fdiripv6m &= ~IXGBE_FDIRIP6M_INNER_MAC;
+   else if (mac_mask == 0)
+   fdiripv6m |= IXGBE_FDIRIP6M_INNER_MAC;
+   else{
+   PMD_INIT_LOG(ERR, "invalid mac_addr_byte_mask");
+   return -EINVAL;
+   }
 
switch (info->mask.tunnel_type_mask) {
case 0:
-- 
2.7.5

[dpdk-dev] [PATCH v2] net/ixgbe: fix tunnel type set error for FDIR

[Wei Zhao]

Tunnel type format should be translated to ixgbe required format
before register set in FDIR cloud mode, Ans also some register
not useful in cloud mode but only useful in IP mode should be set
to zero as datasheet request.

Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for X550")
Fixes: 11777435c727 ("net/ixgbe: parse flow director filter")

Signed-off-by: Wei Zhao 
---

v2:
-change register write function for FDIRIPSA and FDIRIPDA.

---
 drivers/net/ixgbe/ixgbe_fdir.c | 17 +
 drivers/net/ixgbe/ixgbe_flow.c |  6 ++
 2 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c
index 67ab627..3feb815 100644
--- a/drivers/net/ixgbe/ixgbe_fdir.c
+++ b/drivers/net/ixgbe/ixgbe_fdir.c
@@ -771,8 +771,15 @@ ixgbe_fdir_filter_to_atr_input(const struct 
rte_eth_fdir_filter *fdir_filter,
input->formatted.inner_mac,
fdir_filter->input.flow.tunnel_flow.mac_addr.addr_bytes,
sizeof(input->formatted.inner_mac));
-   input->formatted.tunnel_type =
-   fdir_filter->input.flow.tunnel_flow.tunnel_type;
+   if (fdir_filter->input.flow.tunnel_flow.tunnel_type ==
+   RTE_FDIR_TUNNEL_TYPE_VXLAN)
+   input->formatted.tunnel_type = 0x8000;
+   else if (fdir_filter->input.flow.tunnel_flow.tunnel_type ==
+   RTE_FDIR_TUNNEL_TYPE_NVGRE)
+   input->formatted.tunnel_type = 0;
+   else
+   PMD_DRV_LOG(ERR, " invalid tunnel type arguments.");
+
input->formatted.tni_vni =
fdir_filter->input.flow.tunnel_flow.tunnel_id >> 8;
}
@@ -1001,8 +1008,7 @@ fdir_write_perfect_filter_82599(struct ixgbe_hw *hw,
IXGBE_WRITE_REG(hw, IXGBE_FDIRSIPv6(2), 0);
} else {
/* tunnel mode */
-   if (input->formatted.tunnel_type !=
-   RTE_FDIR_TUNNEL_TYPE_NVGRE)
+   if (input->formatted.tunnel_type)
tunnel_type = 0x8000;
tunnel_type |= addr_high;
IXGBE_WRITE_REG(hw, IXGBE_FDIRSIPv6(0), addr_low);
@@ -1010,6 +1016,9 @@ fdir_write_perfect_filter_82599(struct ixgbe_hw *hw,
IXGBE_WRITE_REG(hw, IXGBE_FDIRSIPv6(2),
input->formatted.tni_vni);
}
+   IXGBE_WRITE_REG(hw, IXGBE_FDIRIPSA, 0);
+   IXGBE_WRITE_REG(hw, IXGBE_FDIRIPDA, 0);
+   IXGBE_WRITE_REG(hw, IXGBE_FDIRPORT, 0);
}
 
/* record vlan (little-endian) and flex_bytes(big-endian) */
diff --git a/drivers/net/ixgbe/ixgbe_flow.c b/drivers/net/ixgbe/ixgbe_flow.c
index f47f125..06bc2a7 100644
--- a/drivers/net/ixgbe/ixgbe_flow.c
+++ b/drivers/net/ixgbe/ixgbe_flow.c
@@ -2436,8 +2436,7 @@ ixgbe_parse_fdir_filter_tunnel(const struct rte_flow_attr 
*attr,
 
/* Get the VxLAN info */
if (item->type == RTE_FLOW_ITEM_TYPE_VXLAN) {
-   rule->ixgbe_fdir.formatted.tunnel_type =
-   RTE_FDIR_TUNNEL_TYPE_VXLAN;
+   rule->ixgbe_fdir.formatted.tunnel_type = 0x8000;
 
/* Only care about VNI, others should be masked. */
if (!item->mask) {
@@ -2494,8 +2493,7 @@ ixgbe_parse_fdir_filter_tunnel(const struct rte_flow_attr 
*attr,
 
/* Get the NVGRE info */
if (item->type == RTE_FLOW_ITEM_TYPE_NVGRE) {
-   rule->ixgbe_fdir.formatted.tunnel_type =
-   RTE_FDIR_TUNNEL_TYPE_NVGRE;
+   rule->ixgbe_fdir.formatted.tunnel_type = 0;
 
/**
 * Only care about flags0, flags1, protocol and TNI,
-- 
2.7.5

Re: [dpdk-dev] [PATCH 0/7] Make unit tests great again

[Burakov, Anatoly]

On 12-Jun-18 2:07 PM, Thomas Monjalon wrote:

+Cc Jananee

07/06/2018 23:01, Anatoly Burakov:

Previously, unit tests were running in groups. There were
technical reasons why that was the case (mostly having to do
with limiting memory), but it was hard to maintain and update
the autotest script.

In 18.05, limiting of memory at DPDK startup was no longer
necessary, as DPDK allocates memory at runtime as needed. This
has the implication that the old test grouping can now be
retired and replaced with a more sensible way of running unit
tests (using multiprocessing pool of workers and a queue of
tests). This patchset accomplishes exactly that.

This patchset conflicts with some of the earlier work on
autotests [1] [2] [3], but i think it presents a cleaner
solution for some of the problems highlighted by those patch
series. I can integrate those patches into this series if
need be.

[1] http://dpdk.org/dev/patchwork/patch/40370/
[2] http://dpdk.org/dev/patchwork/patch/40371/
[3] http://dpdk.org/dev/patchwork/patch/40372/


It may be interesting to work on lists of tests as done
in the following patch:
http://dpdk.org/dev/patchwork/patch/40373/

The idea is to split tests in several categories:
- basic and short test
- longer and lower priority
- performance test
As a long term solution, we can think about making category an attribute
inside the test itself?



These test categories do not conflict with my patchset as they 
ultimately rely on white/blacklisting, which will continue to work as 
before.


In my view, it really boils down to two things - either tests can be run 
in parallel with others (i.e. their result won't be affected by another 
independent DPDK test app instance), or not. On top of that, we can use 
blacklisting or whitelisting to define which tests will actually be run 
(i.e. define any "categories" we want), but their (non-)parallelism must 
always be respected to get good test results.


--
Thanks,
Anatoly

Re: [dpdk-dev] [PATCH 2/2] maintainers: add Vhost and Virtio co-maintainers

[Tiwei Bie]

On Tue, Jun 12, 2018 at 10:01:27AM +0200, Maxime Coquelin wrote:
> Add Tiwei and Zhihong as co-maintainers for the Vhost and
> Virtio components. They have done great contributions recently,
> and been very helpfull in helping to review Vhost and Virtio
> series.
> 
> Also, add Tiwei as backup for the Next-virtio tree.
> 
> Signed-off-by: Maxime Coquelin 

Thank you very much for proposing me as a co-maintainer.
I'm very glad to help co-maintain these components! :)

Acked-by: Tiwei Bie 

> ---
>  MAINTAINERS | 6 ++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 1c28f6d38..14939f10a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -41,6 +41,7 @@ T: git://dpdk.org/next/dpdk-next-net-mlx
>  
>  Next-virtio Tree
>  M: Maxime Coquelin 
> +M: Tiwei Bie 
>  T: git://dpdk.org/next/dpdk-next-virtio
>  
>  Next-crypto Tree
> @@ -654,6 +655,8 @@ F: doc/guides/nics/features/vmxnet3.ini
>  
>  Vhost-user
>  M: Maxime Coquelin 
> +M: Tiwei Bie 
> +M: Zhihong Wang 
>  T: git://dpdk.org/next/dpdk-next-virtio
>  F: lib/librte_vhost/
>  F: doc/guides/prog_guide/vhost_lib.rst
> @@ -665,6 +668,8 @@ F: examples/vhost_crypto/
>  
>  Vhost PMD
>  M: Maxime Coquelin 
> +M: Tiwei Bie 
> +M: Zhihong Wang 
>  T: git://dpdk.org/next/dpdk-next-virtio
>  F: drivers/net/vhost/
>  F: doc/guides/nics/vhost.rst
> @@ -673,6 +678,7 @@ F: doc/guides/nics/features/vhost.ini
>  Virtio PMD
>  M: Maxime Coquelin 
>  M: Tiwei Bie 
> +M: Zhihong Wang 
>  T: git://dpdk.org/next/dpdk-next-virtio
>  F: drivers/net/virtio/
>  F: doc/guides/nics/virtio.rst
> -- 
> 2.14.3
> 

Re: [dpdk-dev] [PATCH 2/2] maintainers: add Vhost and Virtio co-maintainers

[Wang, Zhihong]

> -Original Message-
> From: Maxime Coquelin [mailto:maxime.coque...@redhat.com]
> Sent: Tuesday, June 12, 2018 4:01 PM
> To: mtetsu...@gmail.com; Bie, Tiwei ; Wang, Zhihong
> ; dev@dpdk.org
> Cc: tho...@monjalon.net; Yigit, Ferruh ; Maxime
> Coquelin 
> Subject: [PATCH 2/2] maintainers: add Vhost and Virtio co-maintainers
> 
> Add Tiwei and Zhihong as co-maintainers for the Vhost and
> Virtio components. They have done great contributions recently,
> and been very helpfull in helping to review Vhost and Virtio
> series.
> 
> Also, add Tiwei as backup for the Next-virtio tree.
> 
> Signed-off-by: Maxime Coquelin 

Thanks for the proposal! I'm really glad to help co-maintain the
Virtio and Vhost components.

Acked-by: Zhihong Wang 

> ---
>  MAINTAINERS | 6 ++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 1c28f6d38..14939f10a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -41,6 +41,7 @@ T: git://dpdk.org/next/dpdk-next-net-mlx
> 
>  Next-virtio Tree
>  M: Maxime Coquelin 
> +M: Tiwei Bie 
>  T: git://dpdk.org/next/dpdk-next-virtio
> 
>  Next-crypto Tree
> @@ -654,6 +655,8 @@ F: doc/guides/nics/features/vmxnet3.ini
> 
>  Vhost-user
>  M: Maxime Coquelin 
> +M: Tiwei Bie 
> +M: Zhihong Wang 
>  T: git://dpdk.org/next/dpdk-next-virtio
>  F: lib/librte_vhost/
>  F: doc/guides/prog_guide/vhost_lib.rst
> @@ -665,6 +668,8 @@ F: examples/vhost_crypto/
> 
>  Vhost PMD
>  M: Maxime Coquelin 
> +M: Tiwei Bie 
> +M: Zhihong Wang 
>  T: git://dpdk.org/next/dpdk-next-virtio
>  F: drivers/net/vhost/
>  F: doc/guides/nics/vhost.rst
> @@ -673,6 +678,7 @@ F: doc/guides/nics/features/vhost.ini
>  Virtio PMD
>  M: Maxime Coquelin 
>  M: Tiwei Bie 
> +M: Zhihong Wang 
>  T: git://dpdk.org/next/dpdk-next-virtio
>  F: drivers/net/virtio/
>  F: doc/guides/nics/virtio.rst
> --
> 2.14.3

Re: [dpdk-dev] [dpdk-stable] 18.02.2 patches review and test

[Luca Boccassi]

On Wed, 2018-06-13 at 08:56 +0200, Marco Varlese wrote:
> Luca,
> 
> I ran some smoke tests on 18.02.2 / 17.11.3 and 16.11.7 using
> test_pmd and found
> no issues with these snapshots. 
> 
> Further, I ran some tests via OvS-DPDK and VPP (DPDK accelerated)
> using the
> aforementioned snapshots and saw no issues.
> 
> Hope this helps.
> 
> 
> Cheers,
> Marco

Great, thanks!

> On Fri, 2018-06-08 at 10:16 +0100, Luca Boccassi wrote:
> > On Mon, 2018-06-04 at 09:58 +0100, Luca Boccassi wrote:
> > > Hi all,
> > > 
> > > Here is a list of patches targeted for stable release 18.02.2.
> > > Please
> > > help review and test. The planned date for the final release is
> > > Thursday,
> > > the 14th of June. Before that, please shout if anyone has
> > > objections
> > > with these
> > > patches being applied.
> > > 
> > > Also for the companies committed to running regression tests,
> > > please run the tests and report any issue before the release
> > > date.
> > > 
> > > These patches are located at branch 18.02 of dpdk-stable repo:
> > > https://dpdk.org/browse/dpdk-stable/
> > > 
> > > Thanks.
> > > 
> > > Luca Boccassi
> > 
> > Hi,
> > 
> > The release date for 18.02.2 is being postponed by one day to
> > Friday
> > the 15th to due to unforeseen delays in some regression tests.
> > Apologies for the inconvenience.
> > 

-- 
Kind regards,
Luca Boccassi

[dpdk-dev] [PATCH] cryptodev: fix ABI breakage

[Pablo de Lara]

In 17.08, the crypto operation was restructured,
and some reserved bytes (5) were added  to have the mempool
pointer aligned to 64 bits, since the structure is expected
to be aligned to 64 bits, allowing future additions with no
ABI breakage needed.

In 18.05, a new 2-byte field was added, so the reserved bytes
were reduced to 3. However, this field was added after the first 3 bytes
of the structure, causing it to be placed in an offset of 4 bytes,
and therefore, forcing the mempool pointer to be placed after 16 bytes,
instead of a 8 bytes, causing unintentionally the ABI breakage.

This commit fixes the breakage, by swapping the reserved bytes
and the private_data_offset field, so the latter is aligned to 2 bytes
and the offset of the mempool pointer returns to its original offset,
8 bytes.

Fixes: 54c836846603 ("cryptodev: set private data for session-less mode")
Cc: sta...@dpdk.org

Reported-by: Konstantin Ananyev 
Signed-off-by: Pablo de Lara 
---
 lib/librte_cryptodev/rte_crypto.h | 51 +++
 1 file changed, 31 insertions(+), 20 deletions(-)

diff --git a/lib/librte_cryptodev/rte_crypto.h 
b/lib/librte_cryptodev/rte_crypto.h
index 25404264b..a16be656d 100644
--- a/lib/librte_cryptodev/rte_crypto.h
+++ b/lib/librte_cryptodev/rte_crypto.h
@@ -73,26 +73,37 @@ enum rte_crypto_op_sess_type {
  * rte_cryptodev_enqueue_burst() / rte_cryptodev_dequeue_burst() .
  */
 struct rte_crypto_op {
-   uint8_t type;
-   /**< operation type */
-   uint8_t status;
-   /**<
-* operation status - this is reset to
-* RTE_CRYPTO_OP_STATUS_NOT_PROCESSED on allocation from mempool and
-* will be set to RTE_CRYPTO_OP_STATUS_SUCCESS after crypto operation
-* is successfully processed by a crypto PMD
-*/
-   uint8_t sess_type;
-   /**< operation session type */
-   uint16_t private_data_offset;
-   /**< Offset to indicate start of private data (if any). The offset
-* is counted from the start of the rte_crypto_op including IV.
-* The private data may be used by the application to store
-* information which should remain untouched in the library/driver
-*/
-
-   uint8_t reserved[3];
-   /**< Reserved bytes to fill 64 bits for future additions */
+   __extension__
+   union {
+   uint64_t raw;
+   __extension__
+   struct {
+   uint8_t type;
+   /**< operation type */
+   uint8_t status;
+   /**<
+* operation status - this is reset to
+* RTE_CRYPTO_OP_STATUS_NOT_PROCESSED on allocation
+* from mempool and will be set to
+* RTE_CRYPTO_OP_STATUS_SUCCESS after crypto operation
+* is successfully processed by a crypto PMD
+*/
+   uint8_t sess_type;
+   /**< operation session type */
+   uint8_t reserved[3];
+   /**< Reserved bytes to fill 64 bits for
+* future additions
+*/
+   uint16_t private_data_offset;
+   /**< Offset to indicate start of private data (if any).
+* The offset is counted from the start of the
+* rte_crypto_op including IV.
+* The private data may be used by the application
+* to store information which should remain untouched
+* in the library/driver
+*/
+   };
+   };
struct rte_mempool *mempool;
/**< crypto operation mempool which operation is allocated from */
 
-- 
2.17.0

Re: [dpdk-dev] [RFC v3 0/7] vhost2: new librte_vhost2 proposal

[Dariusz Stojaczyk]

Hi Stefan,
I'm sorry for the late response. My email client filtered out this
mail. I fixed it just now.

pt., 8 cze 2018 o 15:29 Stefan Hajnoczi  napisał(a):
>
> On Thu, Jun 07, 2018 at 05:12:20PM +0200, Dariusz Stojaczyk wrote:
> > The proposed structure for the new library is described below.
> >  * rte_vhost2.h
> >- public API
> >- registering targets with provided ops
> >- unregistering targets
> >- iova_to_vva()
> >  * transport.h/.c
> >- implements rte_vhost2.h
> >- allows registering vhost transports, which are opaquely required by the
> >  rte_vhost2.h API (target register function requires transport name).
> >- exposes a set of callbacks to be implemented by each transport
> >  * vhost_user.c
> >- vhost-user Unix domain socket transport
>
> This file should be called transport_unix.c or similar so it's clear
> that it only handles UNIX domain socket transport aspects, not general
> vhost-user protocol aspects.  If the distinction is unclear then
> layering violations are easy to make in the future (especially when
> people other than you contribute to the code).

Ack. Also, virtio-vhost-user transport still has to be placed in
drivers/ directory, right? We could move most of this library
somewhere into drivers/, leaving only rte_vhost2.h, transport.h and
transport.c in lib/librte_vhost2. What do you think?

>
> >- does recvmsg()
> >- uses the underlying vhost-user helper lib to process messages, but 
> > still
> >  handles some transport-specific ones, e.g. SET_MEM_TABLE
> >- calls some of the rte_vhost2.h ops registered with a target
> >  * fd_man.h/.c
> >- polls provided descriptors, calls user callbacks on fd events
> >- based on the original rte_vhost version
> >- additionally allows calling user-provided callbacks on the poll thread
>
> Ths is general-purpose functionality that should be a core DPDK utility.
>
> Are you sure you cannot use existing (e)poll functionality in DPDK?

We have to use poll here, and I haven't seen any DPDK APIs for poll,
only rte_epoll_*. Since received vhost-user messages may be handled
asynchronously, we have to temporarily remove an fd from the poll
group for the time each message is handled. We do it by setting the fd
in the polled fds array to -1. man page for poll(2) explicitly
suggests this to ignore poll() events.

>
> >  * vhost.h/.c
> >- a transport-agnostic vhost-user library
> >- calls most of the rte_vhost2.h ops registered with a target
> >- manages virtqueues state
> >- hopefully to be reused by the virtio-vhost-user
> >- exposes a set of callbacks to be implemented by each transport
> >  (for e.g. sending message replies)
> >
> > This series includes only vhost-user transport. Virtio-vhost-user
> > is to be done later.
> >
> > The following items are still TBD:
> >   * vhost-user slave channel
> >   * get/set_config
> >   * cfg_call() implementation
> >   * IOTLB
> >   * NUMA awareness
>
> This is important to think about while the API is still being designed.
>
> Some initial thoughts.  NUMA affinity is optimal when:
>
> 1. The vring, indirect descriptor tables, and data buffers are allocated
>on the same NUMA node.
>
> 2. The virtqueue interrupts go to vcpus associated with the same NUMA
>node as the vring.
>
> 3. The guest NUMA node corresponds to the host NUMA node of the backing
>storage device (e.g. NVMe PCI adapter).
>
> This way memory is local to the NVMe PCI adapter on the way down the
> stack when submitting I/O and back up again when completing I/O.
>
> Achieving #1 & #2 is up to the guest drivers.
>
> Achieving #3 is up to virtual machine configuration (QEMU command-line).
>
> The role that DPDK plays in all of this is that each vhost-user
> virtqueue should be polled by a thread that has been placed on the same
> host NUMA node mentioned above for #1, #2, and #3.
>
> Per-virtqueue state should also be allocated on this host NUMA node.

I agree on all points.

> Device backends should be able to query this information so they, too,
> can allocate memory with optimal NUMA affinity.

Of course. Since we offer raw vq pointers, they will be able to use
get_mempolicy(2). No additional APIs required.

>
> >   * Live migration
>
> Another important feature to design in from the beginning.

This is being worked on at the moment.
Thanks,
D.

Re: [dpdk-dev] [PATCH] cryptodev: fix ABI breakage

[Ananyev, Konstantin]

> -Original Message-
> From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Pablo de Lara
> Sent: Wednesday, June 13, 2018 10:37 AM
> To: Doherty, Declan ; Gujjar, Abhinandan S 
> 
> Cc: dev@dpdk.org; De Lara Guarch, Pablo ; 
> sta...@dpdk.org
> Subject: [dpdk-dev] [PATCH] cryptodev: fix ABI breakage
> 
> In 17.08, the crypto operation was restructured,
> and some reserved bytes (5) were added  to have the mempool
> pointer aligned to 64 bits, since the structure is expected
> to be aligned to 64 bits, allowing future additions with no
> ABI breakage needed.
> 
> In 18.05, a new 2-byte field was added, so the reserved bytes
> were reduced to 3. However, this field was added after the first 3 bytes
> of the structure, causing it to be placed in an offset of 4 bytes,
> and therefore, forcing the mempool pointer to be placed after 16 bytes,
> instead of a 8 bytes, causing unintentionally the ABI breakage.
> 
> This commit fixes the breakage, by swapping the reserved bytes
> and the private_data_offset field, so the latter is aligned to 2 bytes
> and the offset of the mempool pointer returns to its original offset,
> 8 bytes.
> 
> Fixes: 54c836846603 ("cryptodev: set private data for session-less mode")
> Cc: sta...@dpdk.org
> 
> Reported-by: Konstantin Ananyev 
> Signed-off-by: Pablo de Lara 
> ---
>  lib/librte_cryptodev/rte_crypto.h | 51 +++
>  1 file changed, 31 insertions(+), 20 deletions(-)
> 
> diff --git a/lib/librte_cryptodev/rte_crypto.h 
> b/lib/librte_cryptodev/rte_crypto.h
> index 25404264b..a16be656d 100644
> --- a/lib/librte_cryptodev/rte_crypto.h
> +++ b/lib/librte_cryptodev/rte_crypto.h
> @@ -73,26 +73,37 @@ enum rte_crypto_op_sess_type {
>   * rte_cryptodev_enqueue_burst() / rte_cryptodev_dequeue_burst() .
>   */
>  struct rte_crypto_op {
> - uint8_t type;
> - /**< operation type */
> - uint8_t status;
> - /**<
> -  * operation status - this is reset to
> -  * RTE_CRYPTO_OP_STATUS_NOT_PROCESSED on allocation from mempool and
> -  * will be set to RTE_CRYPTO_OP_STATUS_SUCCESS after crypto operation
> -  * is successfully processed by a crypto PMD
> -  */
> - uint8_t sess_type;
> - /**< operation session type */
> - uint16_t private_data_offset;
> - /**< Offset to indicate start of private data (if any). The offset
> -  * is counted from the start of the rte_crypto_op including IV.
> -  * The private data may be used by the application to store
> -  * information which should remain untouched in the library/driver
> -  */
> -
> - uint8_t reserved[3];
> - /**< Reserved bytes to fill 64 bits for future additions */
> + __extension__
> + union {
> + uint64_t raw;
> + __extension__
> + struct {
> + uint8_t type;
> + /**< operation type */
> + uint8_t status;
> + /**<
> +  * operation status - this is reset to
> +  * RTE_CRYPTO_OP_STATUS_NOT_PROCESSED on allocation
> +  * from mempool and will be set to
> +  * RTE_CRYPTO_OP_STATUS_SUCCESS after crypto operation
> +  * is successfully processed by a crypto PMD
> +  */
> + uint8_t sess_type;
> + /**< operation session type */
> + uint8_t reserved[3];
> + /**< Reserved bytes to fill 64 bits for
> +  * future additions
> +  */
> + uint16_t private_data_offset;
> + /**< Offset to indicate start of private data (if any).
> +  * The offset is counted from the start of the
> +  * rte_crypto_op including IV.
> +  * The private data may be used by the application
> +  * to store information which should remain untouched
> +  * in the library/driver
> +  */
> + };
> + };
>   struct rte_mempool *mempool;
>   /**< crypto operation mempool which operation is allocated from */
> 
> --

Acked-by: Konstantin Ananyev 

> 2.17.0

[dpdk-dev] missing vq->log_cache_nb_elem ++ ?

[HePeng]

Hi, 


In the latest dpdk master branch, in the function *vhost_log_cache_page*:


static __rte_always_inline void
vhost_log_cache_page(struct virtio_net *dev, struct vhost_virtqueue *vq,
uint64_t page)
{
uint32_t bit_nr = page % (sizeof(unsigned long) << 3);
uint32_t offset = page / (sizeof(unsigned long) << 3);
int i;

for (i = 0; i < vq->log_cache_nb_elem; i++) {
struct log_cache_entry *elem = vq->log_cache + i;

if (elem->offset == offset) {
elem->val |= (1UL << bit_nr);
return;
}
}

if (unlikely(i >= VHOST_LOG_CACHE_NR)) {
/*
 * No more room for a new log cache entry,
 * so write the dirty log map directly.
 */
rte_smp_wmb();
vhost_log_page((uint8_t *)(uintptr_t)dev->log_base, page);

return;
}

vq->log_cache[i].offset = offset;
vq->log_cache[i].val = (1UL << bit_nr);
}

Did it just miss an increment on vq->log_cache_nb_elem ?

Looks like a vq->log_cache_nb_elem++ is needed here.

Re: [dpdk-dev] [PATCH] cryptodev: fix ABI breakage

[Gujjar, Abhinandan S]

> -Original Message-
> From: De Lara Guarch, Pablo
> Sent: Wednesday, June 13, 2018 3:07 PM
> To: Doherty, Declan ; Gujjar, Abhinandan S
> 
> Cc: dev@dpdk.org; De Lara Guarch, Pablo ;
> sta...@dpdk.org
> Subject: [PATCH] cryptodev: fix ABI breakage
> 
> In 17.08, the crypto operation was restructured, and some reserved bytes (5)
> were added  to have the mempool pointer aligned to 64 bits, since the 
> structure
> is expected to be aligned to 64 bits, allowing future additions with no ABI
> breakage needed.
> 
> In 18.05, a new 2-byte field was added, so the reserved bytes were reduced to 
> 3.
> However, this field was added after the first 3 bytes of the structure, 
> causing it
> to be placed in an offset of 4 bytes, and therefore, forcing the mempool 
> pointer
> to be placed after 16 bytes, instead of a 8 bytes, causing unintentionally 
> the ABI
> breakage.
> 
> This commit fixes the breakage, by swapping the reserved bytes and the
> private_data_offset field, so the latter is aligned to 2 bytes and the offset 
> of the
> mempool pointer returns to its original offset,
> 8 bytes.
> 
> Fixes: 54c836846603 ("cryptodev: set private data for session-less mode")
> Cc: sta...@dpdk.org
> 
> Reported-by: Konstantin Ananyev 
> Signed-off-by: Pablo de Lara 
> ---
>  lib/librte_cryptodev/rte_crypto.h | 51 +++
>  1 file changed, 31 insertions(+), 20 deletions(-)
> 
> diff --git a/lib/librte_cryptodev/rte_crypto.h 
> b/lib/librte_cryptodev/rte_crypto.h
> index 25404264b..a16be656d 100644
> --- a/lib/librte_cryptodev/rte_crypto.h
> +++ b/lib/librte_cryptodev/rte_crypto.h
> @@ -73,26 +73,37 @@ enum rte_crypto_op_sess_type {
>   * rte_cryptodev_enqueue_burst() / rte_cryptodev_dequeue_burst() .
>   */
>  struct rte_crypto_op {
> - uint8_t type;
> - /**< operation type */
> - uint8_t status;
> - /**<
> -  * operation status - this is reset to
> -  * RTE_CRYPTO_OP_STATUS_NOT_PROCESSED on allocation from
> mempool and
> -  * will be set to RTE_CRYPTO_OP_STATUS_SUCCESS after crypto
> operation
> -  * is successfully processed by a crypto PMD
> -  */
> - uint8_t sess_type;
> - /**< operation session type */
> - uint16_t private_data_offset;
> - /**< Offset to indicate start of private data (if any). The offset
> -  * is counted from the start of the rte_crypto_op including IV.
> -  * The private data may be used by the application to store
> -  * information which should remain untouched in the library/driver
> -  */
> -
> - uint8_t reserved[3];
> - /**< Reserved bytes to fill 64 bits for future additions */
> + __extension__
> + union {
> + uint64_t raw;
> + __extension__
> + struct {
> + uint8_t type;
> + /**< operation type */
> + uint8_t status;
> + /**<
> +  * operation status - this is reset to
> +  * RTE_CRYPTO_OP_STATUS_NOT_PROCESSED on
> allocation
> +  * from mempool and will be set to
> +  * RTE_CRYPTO_OP_STATUS_SUCCESS after crypto
> operation
> +  * is successfully processed by a crypto PMD
> +  */
> + uint8_t sess_type;
> + /**< operation session type */
> + uint8_t reserved[3];
> + /**< Reserved bytes to fill 64 bits for
> +  * future additions
> +  */
> + uint16_t private_data_offset;
> + /**< Offset to indicate start of private data (if any).
> +  * The offset is counted from the start of the
> +  * rte_crypto_op including IV.
> +  * The private data may be used by the application
> +  * to store information which should remain untouched
> +  * in the library/driver
> +  */
> + };
> + };
>   struct rte_mempool *mempool;
>   /**< crypto operation mempool which operation is allocated from */
> 
> --

Acked-by: Abhinandan Gujjar 

> 2.17.0

Re: [dpdk-dev] [PATCH 2/2] maintainers: add Vhost and Virtio co-maintainers

[Yang, Zhiyong]

> -Original Message-
> From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Maxime Coquelin
> Sent: Tuesday, June 12, 2018 4:01 PM
> To: mtetsu...@gmail.com; Bie, Tiwei ; Wang, Zhihong
> ; dev@dpdk.org
> Cc: tho...@monjalon.net; Yigit, Ferruh ; Maxime
> Coquelin 
> Subject: [dpdk-dev] [PATCH 2/2] maintainers: add Vhost and Virtio co-
> maintainers
> 
> Add Tiwei and Zhihong as co-maintainers for the Vhost and Virtio components.
> They have done great contributions recently, and been very helpfull in helping
> to review Vhost and Virtio series.
> 
> Also, add Tiwei as backup for the Next-virtio tree.
> 
> Signed-off-by: Maxime Coquelin 
> ---

Obviously, Zhihong and Tiwei are the best candidates for Vhost and Virtio 
maintainer.

Acked-by: Zhiyong Yang 

Re: [dpdk-dev] [PATCH 3/6] cryptodev: remove max number of sessions

[Tomasz Duszynski]

On Wed, Jun 13, 2018 at 08:23:36AM +, De Lara Guarch, Pablo wrote:
> Hi Tomasz,
>
> > -Original Message-
> > From: Tomasz Duszynski [mailto:t...@semihalf.com]
> > Sent: Wednesday, June 13, 2018 7:12 AM
> > To: De Lara Guarch, Pablo 
> > Cc: Tomasz Duszynski ; Doherty, Declan
> > ; akhil.go...@nxp.com; ravi1.ku...@amd.com;
> > jerin.ja...@caviumnetworks.com; Zhang, Roy Fan ;
> > Trahe, Fiona ; jianjay.z...@huawei.com;
> > dev@dpdk.org
> > Subject: Re: [PATCH 3/6] cryptodev: remove max number of sessions
> >
> > On Tue, Jun 12, 2018 at 01:53:36PM +, De Lara Guarch, Pablo wrote:
> > >
> > >
> > > > -Original Message-
> > > > From: Tomasz Duszynski [mailto:t...@semihalf.com]
> > > > Sent: Tuesday, June 12, 2018 12:38 PM
> > > > To: De Lara Guarch, Pablo 
> > > > Cc: Doherty, Declan ; akhil.go...@nxp.com;
> > > > ravi1.ku...@amd.com; jerin.ja...@caviumnetworks.com; Zhang, Roy Fan
> > > > ; Trahe, Fiona ;
> > > > t...@semihalf.com; jianjay.z...@huawei.com; dev@dpdk.org
> > > > Subject: Re: [PATCH 3/6] cryptodev: remove max number of sessions
> > > >
> > > > Hello Pablo,
> > > >
> > > > On Fri, Jun 08, 2018 at 11:02:31PM +0100, Pablo de Lara wrote:
> > > > > Sessions are not created and stored in the crypto device anymore,
> > > > > since now the session mempool is created at the application level.
> > > > >
> > > > > Therefore the limitation of the maximum number of sessions that
> > > > > can be created should not be dependent of the crypto device.
> > > > >
> > > > > Signed-off-by: Pablo de Lara 
> > >
> > > ...
> > >
> > > > > diff --git a/drivers/crypto/mvsam/rte_mrvl_pmd.c
> > > > b/drivers/crypto/mvsam/rte_mrvl_pmd.c
> > > > > index 1b6029a56..822b6cac7 100644
> > > > > --- a/drivers/crypto/mvsam/rte_mrvl_pmd.c
> > > > > +++ b/drivers/crypto/mvsam/rte_mrvl_pmd.c
> > > > > @@ -719,7 +719,6 @@ cryptodev_mrvl_crypto_create(const char *name,
> > > > >   internals = dev->data->dev_private;
> > > > >
> > > > >   internals->max_nb_qpairs = init_params->max_nb_queue_pairs;
> > > > > - internals->max_nb_sessions = init_params->max_nb_sessions;
> > > > >
> > > > >   /*
> > > > >* ret == -EEXIST is correct, it means DMA @@ -734,8 +733,6 @@
> > > > > cryptodev_mrvl_crypto_create(const char *name,
> > > > >   "DMA memory has been already initialized by a
> > > > different driver.");
> > > > >   }
> > > > >
> > > > > - sam_params.max_num_sessions = internals->max_nb_sessions;
> > > >
> > > > This will not fly since library maintains separate list of sessions.
> > > > We have to initialize this number to something sane. Since we cannot
> > > > get it from userspace perhaps make that compile-time configurable by
> > > > adding separate CONFIG_?
> > >
> > > Hi Tomasz,
> > >
> > > If you need to have an actual limit, you could define it internally
> > > (not adding an external configuration option), but bear in mind that
> > > This won't prevent an application from trying to allocate more sessions.
> >
> > You can define arbitrary number of session on condition you have enough
> > memory. So no hard limit here. What bothers me is the case where app wants 
> > to
> > initialize more session than the library internally has.
> > If this happens userspace will get an error. On the other hand requesting 
> > some
> > arbitrary large number of session from library and hoping app will never 
> > use so
> > many wastes memory (which might be valuable on resource constrained
> > systems).
> >
> > That is why keeping the number of sessions in app and library in sync is
> > important.
> >
> > Do we have any option in DPDK now to workaround this?
>
> Ok I see, so actually the MUSDK library needs a maximum number of sessions.
> I'd say then we should keep this field, but we can add a special case: 0.
> In this case, the PMD does not have any maximum number of sessions
> (which would be applicable to most PMDs).
>
> So, for this PMD, this special case is not supported. If 0 is passed,
> either return that unlimited number of sessions is not supported,
> or set it to a default value (defined inside the PMD, such as 2048).
> If no value is passed, this number can be set to the default value too.
>
> How does this sound?

Who is going to pass that value? App? Or the old way is retained
i.e PMD parameters?

OK, my understanding is that we have 3 options:

1. 0 is passed which for most of the drivers translates to "you should
   not care about sessions number created by userspace application". In
   case PMD supports that it returns either success or failure.

2. Nothing is passed which means PMD should not care about number of
   sessions except mvsam which sets some default value.

3. Passing some arbitrary value which which sets number of sessions
   for PMDs that care about that (mvsam). In that case app would
   respect that number and not allocate more than specified? This is
   what DPDK has now.

Right? Doesn't is sound like the mechanism that gets removed fro

Re: [dpdk-dev] [PATCH v2 08/15] net/ifc: rename to ifcvf

[Bruce Richardson]

On Wed, Jun 13, 2018 at 03:46:05AM +0100, Wang, Xiao W wrote:
> Hi Bruce,
> 
> > -Original Message-
> > From: Richardson, Bruce
> > Sent: Saturday, June 9, 2018 5:21 AM
> > To: dev@dpdk.org
> > Cc: Richardson, Bruce ; Wang, Xiao W
> > 
> > Subject: [PATCH v2 08/15] net/ifc: rename to ifcvf
> > 
> > All files in the directory and the resulting driver have prefix of ifcvf,
> > not just ifc, so rename directory for accuracy. Also rename the map file
> > to standard name for meson build in the process.
> 
> Compared with renaming the dir to IFCVF and renaming it back to IFC sometime 
> in future,
> I think keeping the dir name as IFC is better for us, this avoids the extra 
> effort.
> We can just rename below files:
> doc/guides/nics/ifcvf.rst => doc/guides/nics/ifc.rst
> drivers/net/ifc/rte_ifcvf_version.map => drivers/net/ifc/rte_pmd_ifc_version.
> 
> And yes, we need to update documents which refer to ifc.
> 
> Thanks!
> Xiao
> 
Ok, that can work.

Re: [dpdk-dev] [PATCH 0/7] Make unit tests great again

[Bruce Richardson]

On Wed, Jun 13, 2018 at 09:38:32AM +0100, Burakov, Anatoly wrote:
> On 12-Jun-18 2:07 PM, Thomas Monjalon wrote:
> > +Cc Jananee
> > 
> > 07/06/2018 23:01, Anatoly Burakov:
> > > Previously, unit tests were running in groups. There were
> > > technical reasons why that was the case (mostly having to do
> > > with limiting memory), but it was hard to maintain and update
> > > the autotest script.
> > > 
> > > In 18.05, limiting of memory at DPDK startup was no longer
> > > necessary, as DPDK allocates memory at runtime as needed. This
> > > has the implication that the old test grouping can now be
> > > retired and replaced with a more sensible way of running unit
> > > tests (using multiprocessing pool of workers and a queue of
> > > tests). This patchset accomplishes exactly that.
> > > 
> > > This patchset conflicts with some of the earlier work on
> > > autotests [1] [2] [3], but i think it presents a cleaner
> > > solution for some of the problems highlighted by those patch
> > > series. I can integrate those patches into this series if
> > > need be.
> > > 
> > > [1] http://dpdk.org/dev/patchwork/patch/40370/
> > > [2] http://dpdk.org/dev/patchwork/patch/40371/
> > > [3] http://dpdk.org/dev/patchwork/patch/40372/
> > 
> > It may be interesting to work on lists of tests as done
> > in the following patch:
> > http://dpdk.org/dev/patchwork/patch/40373/
> > 
> > The idea is to split tests in several categories:
> > - basic and short test
> > - longer and lower priority
> > - performance test
> > As a long term solution, we can think about making category an attribute
> > inside the test itself?
> > 
> 
> These test categories do not conflict with my patchset as they ultimately
> rely on white/blacklisting, which will continue to work as before.
> 
> In my view, it really boils down to two things - either tests can be run in
> parallel with others (i.e. their result won't be affected by another
> independent DPDK test app instance), or not. On top of that, we can use
> blacklisting or whitelisting to define which tests will actually be run
> (i.e. define any "categories" we want), but their (non-)parallelism must
> always be respected to get good test results.
> 
Have you looked at: http://mesonbuild.com/Unit-tests.html, at it would be
good to transition away from our own custom script infrastructure for the
tests.

There is already some support for running the unit tests using "meson
test", but it could do with some more cleanup e.g. to move the tests into
suitable suites (corresponding to the categories Thomas has suggested). We
could also do with specifying properly what tests are parallel-safe and
what aren't.

Re: [dpdk-dev] [PATCH v2] net/pcap: rx_iface_in stream type support

[Ferruh Yigit]

On 6/5/2018 6:10 PM, Ido Goshen wrote:
> The problem is if a dpdk app uses the same iface(s) both as rx_iface and 
> tx_iface then it will receive back the packets it sends.
> If my app sends a packet to portid=X with rte_eth_tx_burst() then I wouldn't 
> expect to receive it back by rte_eth_rx_burst() for that same portid=X  
> (assuming of course there's no external loopback)
> This is coming from the default nature of pcap that like a sniffer captures 
> both incoming and outgoing direction.
> The patch provides an option to limit pcap rx_iface to get only incoming 
> traffic which is more like a real (non-pcap) dpdk device.
> 
> for example:
> when using existing *rx_iface*
>   l2fwd -c 3 -n1 --no-huge --vdev=eth_pcap0,rx_iface=eth1,tx_iface=eth1 
> --vdev=eth_pcap1,rx_iface=dummy0,tx_iface=dummy0  -- -p 3 -T 1 
> sending only 1 single packet into eth1 will end in an infinite loop - 

If you are using same interface for both Rx & Tx, why not using "iface=xxx"
argument, can you please test with following:

l2fwd -c 3 -n1 --no-huge --vdev=eth_pcap0,iface=eth1
--vdev=eth_pcap1,iface=dummy0 -- -p 3 -T 1


I can't reproduce the issue with above command.

Thanks,
ferruh

[dpdk-dev] [PATCH 0/2] add ifc driver to meson build

[Xiao Wang]

The first patch unifies the driver name in compiler flag, document.
The second patch adds ifc driver to meson build.

Xiao Wang (2):
  net/ifc: make driver name consistent
  net/ifc: add to meson build

 MAINTAINERS   | 4 ++--
 config/common_base| 4 ++--
 config/common_linuxapp| 2 +-
 doc/guides/nics/{ifcvf.rst => ifc.rst}| 0
 doc/guides/nics/index.rst | 2 +-
 drivers/net/Makefile  | 2 +-
 drivers/net/ifc/Makefile  | 8 
 drivers/net/ifc/meson.build   | 7 +++
 .../net/ifc/{rte_ifcvf_version.map => rte_pmd_ifc_version.map}| 0
 drivers/net/meson.build   | 2 +-
 mk/rte.app.mk | 2 +-
 11 files changed, 20 insertions(+), 13 deletions(-)
 rename doc/guides/nics/{ifcvf.rst => ifc.rst} (100%)
 create mode 100644 drivers/net/ifc/meson.build
 rename drivers/net/ifc/{rte_ifcvf_version.map => rte_pmd_ifc_version.map} 
(100%)

-- 
2.15.1

[dpdk-dev] [PATCH 2/2] net/ifc: add to meson build

[Xiao Wang]

Signed-off-by: Bruce Richardson 
Signed-off-by: Xiao Wang 
---
 drivers/net/ifc/meson.build | 7 +++
 drivers/net/meson.build | 2 +-
 2 files changed, 8 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/ifc/meson.build

diff --git a/drivers/net/ifc/meson.build b/drivers/net/ifc/meson.build
new file mode 100644
index 0..a30aa09e6
--- /dev/null
+++ b/drivers/net/ifc/meson.build
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018 Intel Corporation
+
+allow_experimental_apis = true
+sources = files('ifcvf_vdpa.c', 'base/ifcvf.c')
+includes += include_directories('base')
+deps += 'vhost'
diff --git a/drivers/net/meson.build b/drivers/net/meson.build
index b7d00a04c..2042859c1 100644
--- a/drivers/net/meson.build
+++ b/drivers/net/meson.build
@@ -2,7 +2,7 @@
 # Copyright(c) 2017 Intel Corporation
 
 drivers = ['af_packet', 'axgbe', 'bonding', 'dpaa', 'dpaa2',
-   'e1000', 'enic', 'fm10k', 'i40e', 'ixgbe',
+   'e1000', 'enic', 'fm10k', 'i40e', 'ifc', 'ixgbe',
'mvpp2', 'null', 'octeontx', 'pcap', 'ring',
'sfc', 'thunderx', 'virtio']
 std_deps = ['ethdev', 'kvargs'] # 'ethdev' also pulls in mbuf, net, eal etc
-- 
2.15.1

[dpdk-dev] [PATCH 1/2] net/ifc: make driver name consistent

[Xiao Wang]

Make the compiler switch name and document name consistent as ``ifc`` to
avoid confusion. Also rename the map file to standard name for meson
build in the process.

Signed-off-by: Xiao Wang 
Signed-off-by: Bruce Richardson 
---
 MAINTAINERS   | 4 ++--
 config/common_base| 4 ++--
 config/common_linuxapp| 2 +-
 doc/guides/nics/{ifcvf.rst => ifc.rst}| 0
 doc/guides/nics/index.rst | 2 +-
 drivers/net/Makefile  | 2 +-
 drivers/net/ifc/Makefile  | 8 
 .../net/ifc/{rte_ifcvf_version.map => rte_pmd_ifc_version.map}| 0
 mk/rte.app.mk | 2 +-
 9 files changed, 12 insertions(+), 12 deletions(-)
 rename doc/guides/nics/{ifcvf.rst => ifc.rst} (100%)
 rename drivers/net/ifc/{rte_ifcvf_version.map => rte_pmd_ifc_version.map} 
(100%)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4667fa7fb..d251c3f98 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -563,8 +563,8 @@ Intel ifc
 M: Xiao Wang 
 T: git://dpdk.org/next/dpdk-next-net-intel
 F: drivers/net/ifc/
-F: doc/guides/nics/ifcvf.rst
-F: doc/guides/nics/features/ifcvf.ini
+F: doc/guides/nics/ifc.rst
+F: doc/guides/nics/features/ifc*.ini
 
 Marvell mvpp2
 M: Tomasz Duszynski 
diff --git a/config/common_base b/config/common_base
index 6b0d1cbbb..fcf3a1f6f 100644
--- a/config/common_base
+++ b/config/common_base
@@ -861,11 +861,11 @@ CONFIG_RTE_LIBRTE_VHOST_DEBUG=n
 CONFIG_RTE_LIBRTE_PMD_VHOST=n
 
 #
-# Compile IFCVF driver
+# Compile IFC driver
 # To compile, CONFIG_RTE_LIBRTE_VHOST and CONFIG_RTE_EAL_VFIO
 # should be enabled.
 #
-CONFIG_RTE_LIBRTE_IFCVF_VDPA_PMD=n
+CONFIG_RTE_LIBRTE_IFC_PMD=n
 
 #
 # Compile librte_bpf
diff --git a/config/common_linuxapp b/config/common_linuxapp
index 5c68cc0ff..daa49d4ef 100644
--- a/config/common_linuxapp
+++ b/config/common_linuxapp
@@ -15,7 +15,7 @@ CONFIG_RTE_LIBRTE_PMD_KNI=y
 CONFIG_RTE_LIBRTE_VHOST=y
 CONFIG_RTE_LIBRTE_VHOST_NUMA=y
 CONFIG_RTE_LIBRTE_PMD_VHOST=y
-CONFIG_RTE_LIBRTE_IFCVF_VDPA_PMD=y
+CONFIG_RTE_LIBRTE_IFC_PMD=y
 CONFIG_RTE_LIBRTE_PMD_AF_PACKET=y
 CONFIG_RTE_LIBRTE_PMD_TAP=y
 CONFIG_RTE_LIBRTE_AVP_PMD=y
diff --git a/doc/guides/nics/ifcvf.rst b/doc/guides/nics/ifc.rst
similarity index 100%
rename from doc/guides/nics/ifcvf.rst
rename to doc/guides/nics/ifc.rst
diff --git a/doc/guides/nics/index.rst b/doc/guides/nics/index.rst
index ddb9eb7a9..d68c5ed5e 100644
--- a/doc/guides/nics/index.rst
+++ b/doc/guides/nics/index.rst
@@ -24,7 +24,7 @@ Network Interface Controller Drivers
 enic
 fm10k
 i40e
-ifcvf
+ifc
 igb
 ixgbe
 intel_vf
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 9f9da6651..1ae0eaffb 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -59,7 +59,7 @@ endif # $(CONFIG_RTE_LIBRTE_SCHED)
 ifeq ($(CONFIG_RTE_LIBRTE_VHOST),y)
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_VHOST) += vhost
 ifeq ($(CONFIG_RTE_EAL_VFIO),y)
-DIRS-$(CONFIG_RTE_LIBRTE_IFCVF_VDPA_PMD) += ifc
+DIRS-$(CONFIG_RTE_LIBRTE_IFC_PMD) += ifc
 endif
 endif # $(CONFIG_RTE_LIBRTE_VHOST)
 
diff --git a/drivers/net/ifc/Makefile b/drivers/net/ifc/Makefile
index 1011995bc..39b36ae5d 100644
--- a/drivers/net/ifc/Makefile
+++ b/drivers/net/ifc/Makefile
@@ -6,7 +6,7 @@ include $(RTE_SDK)/mk/rte.vars.mk
 #
 # library name
 #
-LIB = librte_ifcvf_vdpa.a
+LIB = librte_pmd_ifc.a
 
 LDLIBS += -lpthread
 LDLIBS += -lrte_eal -lrte_pci -lrte_vhost -lrte_bus_pci
@@ -22,14 +22,14 @@ BASE_DRIVER_OBJS=$(sort $(patsubst %.c,%.o,$(notdir 
$(wildcard $(SRCDIR)/base/*.
 
 VPATH += $(SRCDIR)/base
 
-EXPORT_MAP := rte_ifcvf_version.map
+EXPORT_MAP := rte_pmd_ifc_version.map
 
 LIBABIVER := 1
 
 #
 # all source are stored in SRCS-y
 #
-SRCS-$(CONFIG_RTE_LIBRTE_IFCVF_VDPA_PMD) += ifcvf_vdpa.c
-SRCS-$(CONFIG_RTE_LIBRTE_IFCVF_VDPA_PMD) += ifcvf.c
+SRCS-$(CONFIG_RTE_LIBRTE_IFC_PMD) += ifcvf_vdpa.c
+SRCS-$(CONFIG_RTE_LIBRTE_IFC_PMD) += ifcvf.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/ifc/rte_ifcvf_version.map 
b/drivers/net/ifc/rte_pmd_ifc_version.map
similarity index 100%
rename from drivers/net/ifc/rte_ifcvf_version.map
rename to drivers/net/ifc/rte_pmd_ifc_version.map
diff --git a/mk/rte.app.mk b/mk/rte.app.mk
index 1e32c83e7..87a0c80ff 100644
--- a/mk/rte.app.mk
+++ b/mk/rte.app.mk
@@ -165,7 +165,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_VIRTIO_PMD) += 
-lrte_pmd_virtio
 ifeq ($(CONFIG_RTE_LIBRTE_VHOST),y)
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_VHOST)  += -lrte_pmd_vhost
 ifeq ($(CONFIG_RTE_EAL_VFIO),y)
-_LDLIBS-$(CONFIG_RTE_LIBRTE_IFCVF_VDPA_PMD) += -lrte_ifcvf_vdpa
+_LDLIBS-$(CONFIG_RTE_LIBRTE_IFC_PMD) += -lrte_pmd_ifc
 endif # $(CONFIG_RTE_EAL_VFIO)
 endif # $(CONFIG_RTE_LIBRTE_VHOST)
 _LDLIBS-$(CONFIG_RTE_LIBRTE_VMXNET3_PMD)+= -lrte_pmd_vmxnet3_uio
-- 
2.15.1

[dpdk-dev] [PATCH] vhost: introduce new function helper

[xiangxia . m . yue]

From: Tonghao Zhang 

Introduce an new common helper to avoid redundancy.

Signed-off-by: Tonghao Zhang 
---
 lib/librte_vhost/vhost.c  | 27 +--
 lib/librte_vhost/vhost.h  |  1 +
 lib/librte_vhost/vhost_user.c | 23 ++-
 3 files changed, 20 insertions(+), 31 deletions(-)

diff --git a/lib/librte_vhost/vhost.c b/lib/librte_vhost/vhost.c
index afded49..493b204 100644
--- a/lib/librte_vhost/vhost.c
+++ b/lib/librte_vhost/vhost.c
@@ -295,6 +295,22 @@
return i;
 }
 
+void
+vhost_destroy_device_notify(struct virtio_net *dev)
+{
+   struct rte_vdpa_device *vdpa_dev;
+   int did;
+
+   if (dev->flags & VIRTIO_DEV_RUNNING) {
+   did = dev->vdpa_dev_id;
+   vdpa_dev = rte_vdpa_get_device(did);
+   if (vdpa_dev && vdpa_dev->ops->dev_close)
+   vdpa_dev->ops->dev_close(dev->vid);
+   dev->flags &= ~VIRTIO_DEV_RUNNING;
+   dev->notify_ops->destroy_device(dev->vid);
+   }
+}
+
 /*
  * Invoked when there is the vhost-user connection is broken (when
  * the virtio device is being detached).
@@ -303,20 +319,11 @@
 vhost_destroy_device(int vid)
 {
struct virtio_net *dev = get_device(vid);
-   struct rte_vdpa_device *vdpa_dev;
-   int did = -1;
 
if (dev == NULL)
return;
 
-   if (dev->flags & VIRTIO_DEV_RUNNING) {
-   did = dev->vdpa_dev_id;
-   vdpa_dev = rte_vdpa_get_device(did);
-   if (vdpa_dev && vdpa_dev->ops->dev_close)
-   vdpa_dev->ops->dev_close(dev->vid);
-   dev->flags &= ~VIRTIO_DEV_RUNNING;
-   dev->notify_ops->destroy_device(vid);
-   }
+   vhost_destroy_device_notify(dev);
 
cleanup_device(dev, 1);
free_device(dev);
diff --git a/lib/librte_vhost/vhost.h b/lib/librte_vhost/vhost.h
index 58c425a..cd1cfcb 100644
--- a/lib/librte_vhost/vhost.h
+++ b/lib/librte_vhost/vhost.h
@@ -535,6 +535,7 @@ struct virtio_net {
 void cleanup_device(struct virtio_net *dev, int destroy);
 void reset_device(struct virtio_net *dev);
 void vhost_destroy_device(int);
+void vhost_destroy_device_notify(struct virtio_net *dev);
 
 void cleanup_vq(struct vhost_virtqueue *vq, int destroy);
 void free_vq(struct vhost_virtqueue *vq);
diff --git a/lib/librte_vhost/vhost_user.c b/lib/librte_vhost/vhost_user.c
index 947290f..6e8d566 100644
--- a/lib/librte_vhost/vhost_user.c
+++ b/lib/librte_vhost/vhost_user.c
@@ -135,17 +135,7 @@
 static int
 vhost_user_reset_owner(struct virtio_net *dev)
 {
-   struct rte_vdpa_device *vdpa_dev;
-   int did = -1;
-
-   if (dev->flags & VIRTIO_DEV_RUNNING) {
-   did = dev->vdpa_dev_id;
-   vdpa_dev = rte_vdpa_get_device(did);
-   if (vdpa_dev && vdpa_dev->ops->dev_close)
-   vdpa_dev->ops->dev_close(dev->vid);
-   dev->flags &= ~VIRTIO_DEV_RUNNING;
-   dev->notify_ops->destroy_device(dev->vid);
-   }
+   vhost_destroy_device_notify(dev);
 
cleanup_device(dev, 0);
reset_device(dev);
@@ -996,18 +986,9 @@
  VhostUserMsg *msg)
 {
struct vhost_virtqueue *vq = dev->virtqueue[msg->payload.state.index];
-   struct rte_vdpa_device *vdpa_dev;
-   int did = -1;
 
/* We have to stop the queue (virtio) if it is running. */
-   if (dev->flags & VIRTIO_DEV_RUNNING) {
-   did = dev->vdpa_dev_id;
-   vdpa_dev = rte_vdpa_get_device(did);
-   if (vdpa_dev && vdpa_dev->ops->dev_close)
-   vdpa_dev->ops->dev_close(dev->vid);
-   dev->flags &= ~VIRTIO_DEV_RUNNING;
-   dev->notify_ops->destroy_device(dev->vid);
-   }
+   vhost_destroy_device_notify(dev);
 
dev->flags &= ~VIRTIO_DEV_READY;
dev->flags &= ~VIRTIO_DEV_VDPA_CONFIGURED;
-- 
1.8.3.1

[dpdk-dev] [PATCH] Use SPDX license tag

[Chao Zhu]

Signed-off-by: Chao Zhu 
---
 drivers/net/i40e/i40e_rxtx_vec_altivec.c   | 35 ++
 lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c   | 34 ++---
 lib/librte_eal/common/arch/ppc_64/rte_cycles.c |  4 +++
 .../common/include/arch/ppc_64/rte_atomic.h| 34 ++---
 .../common/include/arch/ppc_64/rte_byteorder.h | 34 ++---
 .../common/include/arch/ppc_64/rte_cpuflags.h  | 34 ++---
 .../common/include/arch/ppc_64/rte_cycles.h| 34 ++---
 .../common/include/arch/ppc_64/rte_memcpy.h| 34 ++---
 .../common/include/arch/ppc_64/rte_prefetch.h  | 34 ++---
 .../common/include/arch/ppc_64/rte_spinlock.h  | 34 ++---
 .../common/include/arch/ppc_64/rte_vect.h  | 34 ++---
 11 files changed, 34 insertions(+), 311 deletions(-)

diff --git a/drivers/net/i40e/i40e_rxtx_vec_altivec.c 
b/drivers/net/i40e/i40e_rxtx_vec_altivec.c
index f3fc826..fd4ebd6 100644
--- a/drivers/net/i40e/i40e_rxtx_vec_altivec.c
+++ b/drivers/net/i40e/i40e_rxtx_vec_altivec.c
@@ -1,35 +1,6 @@
-/*-
- *   BSD LICENSE
- *
- *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
- *   Copyright(c) 2017 IBM Corporation.
- *   All rights reserved.
- *
- *   Redistribution and use in source and binary forms, with or without
- *   modification, are permitted provided that the following conditions
- *   are met:
- *
- * * Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in
- *   the documentation and/or other materials provided with the
- *   distribution.
- * * Neither the name of Intel Corporation nor the names of its
- *   contributors may be used to endorse or promote products derived
- *   from this software without specific prior written permission.
- *
- *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
+ * Copyright(c) 2017 IBM Corporation. All rights reserved.
  */
 
 #include 
diff --git a/lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c 
b/lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c
index e7a8245..3cd0345 100644
--- a/lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c
+++ b/lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c
@@ -1,34 +1,6 @@
-/*
- *   BSD LICENSE
- *
- *   Copyright (C) IBM Corporation 2014.
- *
- *   Redistribution and use in source and binary forms, with or without
- *   modification, are permitted provided that the following conditions
- *   are met:
- *
- * * Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in
- *   the documentation and/or other materials provided with the
- *   distribution.
- * * Neither the name of IBM Corporation nor the names of its
- *   contributors may be used to endorse or promote products derived
- *   from this software without specific prior written permission.
- *
- *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *   OF THIS SOF

[dpdk-dev] [PATCH v3 02/38] crypto/qat: add qat device files

[Tomasz Jozwiak]

From: Fiona Trahe 

This commit adds new qat_device file.
Following objects were moved:

qat_crypto.h => qat_device.h
- struct qat_pmd_private
- uint8_t cryptodev_qat_driver_id
- int qat_crypto_sym_qp_release (EXTERN)
- int qat_dev_config()
- int qat_dev_start()
- void qat_dev_stop()
- int qat_dev_close()
- void qat_dev_info_get()
qat_crypto.c => qat_device.c
- int qat_dev_config()
- int qat_dev_start()
- void qat_dev_stop()
- int qat_dev_close()
- void qat_dev_info_get()

Signed-off-by: ArkadiuszX Kusztal 
Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/Makefile |  1 +
 drivers/crypto/qat/meson.build  |  3 +-
 drivers/crypto/qat/qat_crypto.c | 51 -
 drivers/crypto/qat/qat_crypto.h | 22 +
 drivers/crypto/qat/qat_device.c | 57 +
 drivers/crypto/qat/qat_device.h | 36 +
 6 files changed, 97 insertions(+), 73 deletions(-)
 create mode 100644 drivers/crypto/qat/qat_device.c
 create mode 100644 drivers/crypto/qat/qat_device.h

diff --git a/drivers/crypto/qat/Makefile b/drivers/crypto/qat/Makefile
index 07266a5e9..6bdd11679 100644
--- a/drivers/crypto/qat/Makefile
+++ b/drivers/crypto/qat/Makefile
@@ -22,6 +22,7 @@ LDLIBS += -lrte_pci -lrte_bus_pci
 
 # library source files
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_crypto.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_device.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_qp.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_adf/qat_algs_build_desc.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += rte_qat_cryptodev.c
diff --git a/drivers/crypto/qat/meson.build b/drivers/crypto/qat/meson.build
index 006cd6557..51630e31b 100644
--- a/drivers/crypto/qat/meson.build
+++ b/drivers/crypto/qat/meson.build
@@ -7,7 +7,8 @@ if not dep.found()
 endif
 sources = files('qat_crypto.c', 'qat_qp.c',
'qat_adf/qat_algs_build_desc.c',
-   'rte_qat_cryptodev.c')
+   'rte_qat_cryptodev.c',
+   'qat_device.c')
 includes += include_directories('qat_adf')
 deps += ['bus_pci']
 ext_deps += dep
diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c
index d9ce2a136..928a50475 100644
--- a/drivers/crypto/qat/qat_crypto.c
+++ b/drivers/crypto/qat/qat_crypto.c
@@ -1609,57 +1609,6 @@ static inline uint32_t adf_modulo(uint32_t data, 
uint32_t shift)
return data - mult;
 }
 
-int qat_dev_config(__rte_unused struct rte_cryptodev *dev,
-   __rte_unused struct rte_cryptodev_config *config)
-{
-   PMD_INIT_FUNC_TRACE();
-   return 0;
-}
-
-int qat_dev_start(__rte_unused struct rte_cryptodev *dev)
-{
-   PMD_INIT_FUNC_TRACE();
-   return 0;
-}
-
-void qat_dev_stop(__rte_unused struct rte_cryptodev *dev)
-{
-   PMD_INIT_FUNC_TRACE();
-}
-
-int qat_dev_close(struct rte_cryptodev *dev)
-{
-   int i, ret;
-
-   PMD_INIT_FUNC_TRACE();
-
-   for (i = 0; i < dev->data->nb_queue_pairs; i++) {
-   ret = qat_crypto_sym_qp_release(dev, i);
-   if (ret < 0)
-   return ret;
-   }
-
-   return 0;
-}
-
-void qat_dev_info_get(struct rte_cryptodev *dev,
-   struct rte_cryptodev_info *info)
-{
-   struct qat_pmd_private *internals = dev->data->dev_private;
-
-   PMD_INIT_FUNC_TRACE();
-   if (info != NULL) {
-   info->max_nb_queue_pairs =
-   ADF_NUM_SYM_QPS_PER_BUNDLE *
-   ADF_NUM_BUNDLES_PER_DEV;
-   info->feature_flags = dev->feature_flags;
-   info->capabilities = internals->qat_dev_capabilities;
-   info->sym.max_nb_sessions = internals->max_nb_sessions;
-   info->driver_id = cryptodev_qat_driver_id;
-   info->pci_dev = RTE_DEV_TO_PCI(dev->device);
-   }
-}
-
 void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,
struct rte_cryptodev_stats *stats)
 {
diff --git a/drivers/crypto/qat/qat_crypto.h b/drivers/crypto/qat/qat_crypto.h
index 5190d25e5..46f03ccde 100644
--- a/drivers/crypto/qat/qat_crypto.h
+++ b/drivers/crypto/qat/qat_crypto.h
@@ -9,6 +9,7 @@
 #include 
 
 #include "qat_common.h"
+#include "qat_device.h"
 #include "qat_crypto_capabilities.h"
 
 /*
@@ -64,27 +65,6 @@ struct qat_qp {
enum qat_device_gen qat_dev_gen;
 } __rte_cache_aligned;
 
-/** private data structure for each QAT device */
-struct qat_pmd_private {
-   unsigned max_nb_queue_pairs;
-   /**< Max number of queue pairs supported by device */
-   unsigned max_nb_sessions;
-   /**< Max number of sessions supported by device */
-   enum qat_device_gen qat_dev_gen;
-   /**< QAT device generation */
-   const struct rte_cryptodev_capabilities *qat_dev_capabilities;
-};
-
-extern uint8_t cryptodev_qat_driver_id;
-
-int qat_dev_config(struct rte_cryptodev *dev,
-   struct rte_cryptodev_config *config);
-int qat_dev_start(struct rte_cryptodev *dev);
-void qat_dev_stop(st

[dpdk-dev] [PATCH v3 01/38] crypto/qat: add qat common header

[Tomasz Jozwiak]

From: Fiona Trahe 

This commit adds qat_common.h header file.
Following objects were moved to it:

qat_algs.h =>. qat_common.h
- struct qat_alg_buf
- struct qat_alg_buf_list
- struct qat_crypto_op_cookie
- QAT_SGL_MAX_NUMBER
qat_crypto.h => qat_common.h
- CRYPTODEV_NAME_QAT_SYM_PMD

Signed-off-by: ArkadiuszX Kusztal 
Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_adf/qat_algs.h | 25 --
 drivers/crypto/qat/qat_common.h   | 47 +++
 drivers/crypto/qat/qat_crypto.h   |  9 +
 3 files changed, 48 insertions(+), 33 deletions(-)
 create mode 100644 drivers/crypto/qat/qat_common.h

diff --git a/drivers/crypto/qat/qat_adf/qat_algs.h 
b/drivers/crypto/qat/qat_adf/qat_algs.h
index 88bd5f00e..6c49c6529 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs.h
+++ b/drivers/crypto/qat/qat_adf/qat_algs.h
@@ -32,12 +32,6 @@
ICP_QAT_HW_CIPHER_KEY_CONVERT, \
ICP_QAT_HW_CIPHER_DECRYPT)
 
-struct qat_alg_buf {
-   uint32_t len;
-   uint32_t resrvd;
-   uint64_t addr;
-} __rte_packed;
-
 enum qat_crypto_proto_flag {
QAT_CRYPTO_PROTO_FLAG_NONE = 0,
QAT_CRYPTO_PROTO_FLAG_CCM = 1,
@@ -46,25 +40,6 @@ enum qat_crypto_proto_flag {
QAT_CRYPTO_PROTO_FLAG_ZUC = 4
 };
 
-/*
- * Maximum number of SGL entries
- */
-#define QAT_SGL_MAX_NUMBER 16
-
-struct qat_alg_buf_list {
-   uint64_t resrvd;
-   uint32_t num_bufs;
-   uint32_t num_mapped_bufs;
-   struct qat_alg_buf bufers[QAT_SGL_MAX_NUMBER];
-} __rte_packed __rte_cache_aligned;
-
-struct qat_crypto_op_cookie {
-   struct qat_alg_buf_list qat_sgl_list_src;
-   struct qat_alg_buf_list qat_sgl_list_dst;
-   rte_iova_t qat_sgl_src_phys_addr;
-   rte_iova_t qat_sgl_dst_phys_addr;
-};
-
 /* Common content descriptor */
 struct qat_alg_cd {
struct icp_qat_hw_cipher_algo_blk cipher;
diff --git a/drivers/crypto/qat/qat_common.h b/drivers/crypto/qat/qat_common.h
new file mode 100644
index 0..293b6f700
--- /dev/null
+++ b/drivers/crypto/qat/qat_common.h
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Intel Corporation
+ */
+#ifndef _QAT_COMMON_H_
+#define _QAT_COMMON_H_
+
+#include 
+
+/**< Intel(R) QAT Symmetric Crypto PMD device name */
+#define CRYPTODEV_NAME_QAT_SYM_PMD crypto_qat
+
+/*
+ * Maximum number of SGL entries
+ */
+#define QAT_SGL_MAX_NUMBER 16
+
+/* Intel(R) QuickAssist Technology device generation is enumerated
+ * from one according to the generation of the device
+ */
+
+enum qat_device_gen {
+   QAT_GEN1 = 1,
+   QAT_GEN2,
+};
+
+/**< Common struct for scatter-gather list operations */
+struct qat_alg_buf {
+   uint32_t len;
+   uint32_t resrvd;
+   uint64_t addr;
+} __rte_packed;
+
+struct qat_alg_buf_list {
+   uint64_t resrvd;
+   uint32_t num_bufs;
+   uint32_t num_mapped_bufs;
+   struct qat_alg_buf bufers[QAT_SGL_MAX_NUMBER];
+} __rte_packed __rte_cache_aligned;
+
+struct qat_crypto_op_cookie {
+   struct qat_alg_buf_list qat_sgl_list_src;
+   struct qat_alg_buf_list qat_sgl_list_dst;
+   phys_addr_t qat_sgl_src_phys_addr;
+   phys_addr_t qat_sgl_dst_phys_addr;
+};
+
+#endif /* _QAT_QAT_COMMON_H_ */
diff --git a/drivers/crypto/qat/qat_crypto.h b/drivers/crypto/qat/qat_crypto.h
index 281a142b9..5190d25e5 100644
--- a/drivers/crypto/qat/qat_crypto.h
+++ b/drivers/crypto/qat/qat_crypto.h
@@ -8,11 +8,9 @@
 #include 
 #include 
 
+#include "qat_common.h"
 #include "qat_crypto_capabilities.h"
 
-#define CRYPTODEV_NAME_QAT_SYM_PMD crypto_qat
-/**< Intel QAT Symmetric Crypto PMD device name */
-
 /*
  * This macro rounds up a number to a be a multiple of
  * the alignment when the alignment is a power of 2
@@ -30,11 +28,6 @@
 
 struct qat_session;
 
-enum qat_device_gen {
-   QAT_GEN1 = 1,
-   QAT_GEN2,
-};
-
 /**
  * Structure associated with each queue.
  */
-- 
2.17.0

[dpdk-dev] [PATCH v3 03/38] crypto/qat: remove unused includes

[Tomasz Jozwiak]

This commit removes unused includes from qat_crypto.c

Signed-off-by: ArkadiuszX Kusztal 
Signed-off-by: Fiona Trahe 
Signed-off-by: Tomasz Jozwiak 
---
 drivers/crypto/qat/qat_crypto.c | 22 --
 1 file changed, 22 deletions(-)

diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c
index 928a50475..7f2c2c86b 100644
--- a/drivers/crypto/qat/qat_crypto.c
+++ b/drivers/crypto/qat/qat_crypto.c
@@ -2,30 +2,8 @@
  * Copyright(c) 2015-2018 Intel Corporation
  */
 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
 #include 
-- 
2.17.0

[dpdk-dev] [PATCH v3 00/38] crypto/qat: refactor to support multiple services

[Tomasz Jozwiak]

From: Pablo de Lara 

The QAT crypto PMD was peppered with references to rte_cryptodev artefacts.
Also the pci device it presented to the API layer was entirely owned by the one
cryptodev device instance created by the probe.
This patchset refactors the PMD so one pci device can present out multiple 
different
device instances to implement different APIs, specifically cryptodev and 
compressdev instances.
The code is refactored into
 - common code which handles the pci device discovery, configuration,
   queue-pair setup, stats gathering and data-path enqueue and dequeue.
 - service-specific code for symmetric crypto, which is a thin layer
   implementing the cryptodev API and using the common code.
 - place-holder files for service-specific code to support asymmetric
   crypto and compression services in future.
The code is all still in the crypto/qat directory as it is functionally 
unchanged,
still only supporting a symmetric crypto service. The code will move to 
drivers/common,
/crypto and /compress in a future patch when this is needed for a compression 
PMD.

Changes for v3:
 - fixed some commit messages
 - fixed compilation issue in one of the patches
 - split two commits into multiple commits

Changes for v2:
 - fixed some bugs compiled in when debug enabled
 - added patch to remove MAX_NB_SESSIONS from config file
 - removed SPDX license patch as already applied
 - documented device name formats

Fiona Trahe (36):
  crypto/qat: add qat common header
  crypto/qat: add qat device files
  crypto/qat: add symmetric session file
  crypto/qat: change filename crypto to sym
  crypto/qat: rename fns for consistency
  crypto/qat: renamed sym-specific structs
  crypto/qat: make enqueue function generic
  crypto/qat: make dequeue function generic
  crypto/qat: move generic qp fn to qp file
  crypto/qat: separate sym-specific from generic qp setup
  crypto/qat: move sym-specific qp code to sym file
  crypto/qat: remove dependencies on cryptodev from common
  crypto/qat: move defines from sym to qp header file
  crypto/qat: create structures to support various generations
  crypto/qat: rename sgl related objects
  crypto/qat: move sgl related element to appropriate files
  crypto/qat: add QAT PCI device struct
  crypto/qat: use generic driver name for PCI registration
  crypto/qat: move to using new device structure
  crypto/qat: use common stats structures
  crypto/qat: rename functions which depend on cryptodev
  crypto/qat: move code into appropriate files
  crypto/qat: add lock around csr access and change logic
  crypto/qat: remove incorrect usage of bundle number
  crypto/qat: rename variables
  crypto/qat: modify debug message
  crypto/qat: free cookie pool on queue creation error
  crypto/qat: remove unused macro
  crypto/qat: move macro to common file
  crypto/qat: register appropriately named device
  crypto/qat: add max PCI devices to config file
  crypto/qat: optimize adf modulo function
  crypto/qat: remove unused arguments
  crypto/qat: make response process function inline
  crypto/qat: check for service type
  doc/qat: specify QAT driver and device name formats

Tomasz Jozwiak (2):
  crypto/qat: remove unused includes
  crypto/qat: remove configurable max number of sessions

 config/common_base|6 +-
 config/rte_config.h   |7 +-
 doc/guides/cryptodevs/qat.rst |   12 +
 drivers/crypto/qat/Makefile   |   10 +-
 drivers/crypto/qat/meson.build|9 +-
 .../qat/qat_adf/adf_transport_access_macros.h |9 +-
 drivers/crypto/qat/qat_adf/qat_algs.h |  126 --
 drivers/crypto/qat/qat_asym_pmd.c |   17 +
 drivers/crypto/qat/qat_asym_pmd.h |   15 +
 drivers/crypto/qat/qat_common.c   |  107 ++
 drivers/crypto/qat/qat_common.h   |   76 +
 drivers/crypto/qat/qat_comp_pmd.c |   18 +
 drivers/crypto/qat/qat_comp_pmd.h |   29 +
 drivers/crypto/qat/qat_crypto.c   | 1696 -
 drivers/crypto/qat/qat_crypto.h   |  150 --
 drivers/crypto/qat/qat_device.c   |  242 +++
 drivers/crypto/qat/qat_device.h   |   78 +
 drivers/crypto/qat/qat_qp.c   |  463 +++--
 drivers/crypto/qat/qat_qp.h   |  106 ++
 drivers/crypto/qat/qat_sym.c  |  568 ++
 drivers/crypto/qat/qat_sym.h  |  154 ++
 ..._capabilities.h => qat_sym_capabilities.h} |6 +-
 drivers/crypto/qat/qat_sym_pmd.c  |  335 
 drivers/crypto/qat/qat_sym_pmd.h  |   40 +
 ...at_algs_build_desc.c => qat_sym_session.c} |  786 +++-
 drivers/crypto/qat/qat_sym_session.h  |  143 ++
 drivers/crypto/qat/rte_qat_cryptodev.c|  180 --
 27 files changed, 3042 insertions(+), 2346 deletions(-)
 delete mode 100644 drivers/crypto/qat/qat_adf/qat_algs.h
 create mode 100644 drivers/crypto/qat/qat_asym_pmd.c
 create mode 100644 d

[dpdk-dev] [PATCH v3 07/38] crypto/qat: renamed sym-specific structs

[Tomasz Jozwiak]

From: Fiona Trahe 

qat_session   -> qat_sym_session
qat_crypto_proto_flag -> qat_sym_proto_flag
qat_alg_cd-> qat_sym_cd
qat_crypto_op_cookie  -> qat_sym_op_cookie
qat_gen1_capabilities -> qat_gen1_sym_capabilities
qat_gen2_capabilities -> qat_gen2_sym_capabilities

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_common.h|  4 ++--
 drivers/crypto/qat/qat_qp.c|  8 
 drivers/crypto/qat/qat_sym.c   | 19 -
 drivers/crypto/qat/qat_sym.h   |  2 +-
 drivers/crypto/qat/qat_sym_session.c   | 28 +-
 drivers/crypto/qat/qat_sym_session.h   | 20 +-
 drivers/crypto/qat/rte_qat_cryptodev.c |  8 
 7 files changed, 45 insertions(+), 44 deletions(-)

diff --git a/drivers/crypto/qat/qat_common.h b/drivers/crypto/qat/qat_common.h
index 293b6f700..7802e96f9 100644
--- a/drivers/crypto/qat/qat_common.h
+++ b/drivers/crypto/qat/qat_common.h
@@ -37,11 +37,11 @@ struct qat_alg_buf_list {
struct qat_alg_buf bufers[QAT_SGL_MAX_NUMBER];
 } __rte_packed __rte_cache_aligned;
 
-struct qat_crypto_op_cookie {
+struct qat_sym_op_cookie {
struct qat_alg_buf_list qat_sgl_list_src;
struct qat_alg_buf_list qat_sgl_list_dst;
phys_addr_t qat_sgl_src_phys_addr;
phys_addr_t qat_sgl_dst_phys_addr;
 };
 
-#endif /* _QAT_QAT_COMMON_H_ */
+#endif /* _QAT_COMMON_H_ */
diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index 23a9d5f01..fb9c2a7ef 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -165,7 +165,7 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t 
queue_pair_id,
if (qp->op_cookie_pool == NULL)
qp->op_cookie_pool = rte_mempool_create(op_cookie_pool_name,
qp->nb_descriptors,
-   sizeof(struct qat_crypto_op_cookie), 64, 0,
+   sizeof(struct qat_sym_op_cookie), 64, 0,
NULL, NULL, NULL, NULL, socket_id,
0);
if (!qp->op_cookie_pool) {
@@ -180,17 +180,17 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t 
queue_pair_id,
goto create_err;
}
 
-   struct qat_crypto_op_cookie *sql_cookie =
+   struct qat_sym_op_cookie *sql_cookie =
qp->op_cookies[i];
 
sql_cookie->qat_sgl_src_phys_addr =
rte_mempool_virt2iova(sql_cookie) +
-   offsetof(struct qat_crypto_op_cookie,
+   offsetof(struct qat_sym_op_cookie,
qat_sgl_list_src);
 
sql_cookie->qat_sgl_dst_phys_addr =
rte_mempool_virt2iova(sql_cookie) +
-   offsetof(struct qat_crypto_op_cookie,
+   offsetof(struct qat_sym_op_cookie,
qat_sgl_list_dst);
}
 
diff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c
index ae521c2b1..2dfdc9cce 100644
--- a/drivers/crypto/qat/qat_sym.c
+++ b/drivers/crypto/qat/qat_sym.c
@@ -88,10 +88,10 @@ adf_modulo(uint32_t data, uint32_t shift);
 
 static inline int
 qat_sym_build_request(struct rte_crypto_op *op, uint8_t *out_msg,
-   struct qat_crypto_op_cookie *qat_op_cookie, struct qat_qp *qp);
+   struct qat_sym_op_cookie *qat_op_cookie, struct qat_qp *qp);
 
 static inline uint32_t
-qat_bpicipher_preprocess(struct qat_session *ctx,
+qat_bpicipher_preprocess(struct qat_sym_session *ctx,
struct rte_crypto_op *op)
 {
int block_len = qat_cipher_get_block_size(ctx->qat_cipher_alg);
@@ -146,7 +146,7 @@ qat_bpicipher_preprocess(struct qat_session *ctx,
 }
 
 static inline uint32_t
-qat_bpicipher_postprocess(struct qat_session *ctx,
+qat_bpicipher_postprocess(struct qat_sym_session *ctx,
struct rte_crypto_op *op)
 {
int block_len = qat_cipher_get_block_size(ctx->qat_cipher_alg);
@@ -329,10 +329,11 @@ qat_sym_pmd_dequeue_op_burst(void *qp, struct 
rte_crypto_op **ops,
resp_msg->comn_hdr.comn_status)) {
rx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
} else {
-   struct qat_session *sess = (struct qat_session *)
+   struct qat_sym_session *sess =
+   (struct qat_sym_session *)
get_session_private_data(
-   rx_op->sym->session,
-   cryptodev_qat_driver_id);
+   rx_op->sym->session,
+   cryptodev_qat_driver_id);
 
if

[dpdk-dev] [PATCH v3 05/38] crypto/qat: change filename crypto to sym

[Tomasz Jozwiak]

From: Fiona Trahe 

This commit renames qat_crypto.c/h to qat_sym.c/h
And makes a few whitespace changes to resolve line-length
issues.

Signed-off-by: ArkadiuszX Kusztal 
Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/Makefile   |  2 +-
 drivers/crypto/qat/meson.build|  2 +-
 drivers/crypto/qat/qat_qp.c   |  2 +-
 .../crypto/qat/{qat_crypto.c => qat_sym.c}| 60 +--
 .../crypto/qat/{qat_crypto.h => qat_sym.h}|  0
 drivers/crypto/qat/rte_qat_cryptodev.c|  2 +-
 6 files changed, 33 insertions(+), 35 deletions(-)
 rename drivers/crypto/qat/{qat_crypto.c => qat_sym.c} (95%)
 rename drivers/crypto/qat/{qat_crypto.h => qat_sym.h} (100%)

diff --git a/drivers/crypto/qat/Makefile b/drivers/crypto/qat/Makefile
index c63c1515e..8cb802b9d 100644
--- a/drivers/crypto/qat/Makefile
+++ b/drivers/crypto/qat/Makefile
@@ -21,7 +21,7 @@ LDLIBS += -lrte_cryptodev
 LDLIBS += -lrte_pci -lrte_bus_pci
 
 # library source files
-SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_crypto.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_sym.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_device.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_qp.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_sym_session.c
diff --git a/drivers/crypto/qat/meson.build b/drivers/crypto/qat/meson.build
index be4282a83..e596006da 100644
--- a/drivers/crypto/qat/meson.build
+++ b/drivers/crypto/qat/meson.build
@@ -5,7 +5,7 @@ dep = dependency('libcrypto', required: false)
 if not dep.found()
build = false
 endif
-sources = files('qat_crypto.c', 'qat_qp.c',
+sources = files('qat_sym.c', 'qat_qp.c',
'qat_sym_session.c',
'rte_qat_cryptodev.c',
'qat_device.c')
diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index ee3b30a36..794a8d7c9 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -13,7 +13,7 @@
 #include 
 
 #include "qat_logs.h"
-#include "qat_crypto.h"
+#include "qat_sym.h"
 #include "adf_transport_access_macros.h"
 
 #define ADF_MAX_SYM_DESC   4096
diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_sym.c
similarity index 95%
rename from drivers/crypto/qat/qat_crypto.c
rename to drivers/crypto/qat/qat_sym.c
index 96a1b78f0..f5d542ae3 100644
--- a/drivers/crypto/qat/qat_crypto.c
+++ b/drivers/crypto/qat/qat_sym.c
@@ -6,15 +6,14 @@
 #include 
 #include 
 #include 
-#include 
-#include 
 #include 
+#include 
 
 #include 
 
 #include "qat_logs.h"
 #include "qat_sym_session.h"
-#include "qat_crypto.h"
+#include "qat_sym.h"
 #include "adf_transport_access_macros.h"
 
 #define BYTE_LENGTH8
@@ -500,8 +499,6 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t 
*out_msg,
return -EINVAL;
}
 
-
-
qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
rte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));
qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
@@ -512,11 +509,11 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t 
*out_msg,
ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) {
/* AES-GCM or AES-CCM */
if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
-   ctx->qat_hash_alg == 
ICP_QAT_HW_AUTH_ALGO_GALOIS_64 ||
-   (ctx->qat_cipher_alg == 
ICP_QAT_HW_CIPHER_ALGO_AES128
-   && ctx->qat_mode == ICP_QAT_HW_CIPHER_CTR_MODE
-   && ctx->qat_hash_alg ==
-   
ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC)) {
+   ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64 ||
+   (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_AES128
+   && ctx->qat_mode == ICP_QAT_HW_CIPHER_CTR_MODE
+   && ctx->qat_hash_alg ==
+   ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC)) {
do_aead = 1;
} else {
do_auth = 1;
@@ -642,7 +639,6 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t 
*out_msg,
qat_req->comn_hdr.serv_specif_flags,
ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
}
-
set_cipher_iv(ctx->cipher_iv.length,
ctx->cipher_iv.offset,
cipher_param, op, qat_req);
@@ -650,15 +646,14 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t 
*out_msg,
} else if (ctx->qat_hash_alg ==
ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC) {
 
-   /* In case of AES-CCM this may point to user selected 
memory
-* or iv offset in cypto_op
+   /* In case of AE

[dpdk-dev] [PATCH v3 06/38] crypto/qat: rename fns for consistency

[Tomasz Jozwiak]

From: Fiona Trahe 

Rename fn names to shorten them, i.e.
  qat_crypto_sym_xxx to qat_sym_xxx
  _content_desc_ to _cd_
Renaming symmetric crypto specific with consistent names:
  qat_crypto_set_session_parameters->qat_sym_set_session_parameters
  qat_write_hw_desc_entry()->qat_sym_build_request()
  qat_alg_xxx ->qat_sym_xxx
  qat_sym_xxx_session_yyy()->qat_sym_session_xxx_yyy()
Removed unused prototypes:
  qat_get_inter_state_size()
  qat_pmd_session_mempool_create()
Removed 2 unnecessary extern declarations

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_device.c|   2 +-
 drivers/crypto/qat/qat_device.h|   2 +-
 drivers/crypto/qat/qat_qp.c|   6 +-
 drivers/crypto/qat/qat_sym.c   |  14 +--
 drivers/crypto/qat/qat_sym.h   |  22 ++---
 drivers/crypto/qat/qat_sym_session.c   | 131 -
 drivers/crypto/qat/qat_sym_session.h   |  53 +-
 drivers/crypto/qat/rte_qat_cryptodev.c |  18 ++--
 8 files changed, 123 insertions(+), 125 deletions(-)

diff --git a/drivers/crypto/qat/qat_device.c b/drivers/crypto/qat/qat_device.c
index c2bf9b7a7..ac6bd1af6 100644
--- a/drivers/crypto/qat/qat_device.c
+++ b/drivers/crypto/qat/qat_device.c
@@ -30,7 +30,7 @@ int qat_dev_close(struct rte_cryptodev *dev)
PMD_INIT_FUNC_TRACE();
 
for (i = 0; i < dev->data->nb_queue_pairs; i++) {
-   ret = qat_crypto_sym_qp_release(dev, i);
+   ret = qat_sym_qp_release(dev, i);
if (ret < 0)
return ret;
}
diff --git a/drivers/crypto/qat/qat_device.h b/drivers/crypto/qat/qat_device.h
index 5c48fdb93..2cb8e7612 100644
--- a/drivers/crypto/qat/qat_device.h
+++ b/drivers/crypto/qat/qat_device.h
@@ -11,7 +11,7 @@
 
 extern uint8_t cryptodev_qat_driver_id;
 
-extern int qat_crypto_sym_qp_release(struct rte_cryptodev *dev,
+extern int qat_sym_qp_release(struct rte_cryptodev *dev,
uint16_t queue_pair_id);
 
 /** private data structure for each QAT device */
diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index 794a8d7c9..23a9d5f01 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -79,7 +79,7 @@ queue_dma_zone_reserve(const char *queue_name, uint32_t 
queue_size,
socket_id, RTE_MEMZONE_IOVA_CONTIG, queue_size);
 }
 
-int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
+int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
const struct rte_cryptodev_qp_conf *qp_conf,
int socket_id, struct rte_mempool *session_pool __rte_unused)
 {
@@ -93,7 +93,7 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, 
uint16_t queue_pair_id,
 
/* If qp is already in use free ring memory and qp metadata. */
if (dev->data->queue_pairs[queue_pair_id] != NULL) {
-   ret = qat_crypto_sym_qp_release(dev, queue_pair_id);
+   ret = qat_sym_qp_release(dev, queue_pair_id);
if (ret < 0)
return ret;
}
@@ -209,7 +209,7 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, 
uint16_t queue_pair_id,
return -EFAULT;
 }
 
-int qat_crypto_sym_qp_release(struct rte_cryptodev *dev, uint16_t 
queue_pair_id)
+int qat_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
 {
struct qat_qp *qp =
(struct qat_qp *)dev->data->queue_pairs[queue_pair_id];
diff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c
index f5d542ae3..ae521c2b1 100644
--- a/drivers/crypto/qat/qat_sym.c
+++ b/drivers/crypto/qat/qat_sym.c
@@ -87,7 +87,7 @@ static inline uint32_t
 adf_modulo(uint32_t data, uint32_t shift);
 
 static inline int
-qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg,
+qat_sym_build_request(struct rte_crypto_op *op, uint8_t *out_msg,
struct qat_crypto_op_cookie *qat_op_cookie, struct qat_qp *qp);
 
 static inline uint32_t
@@ -210,7 +210,7 @@ txq_write_tail(struct qat_qp *qp, struct qat_queue *q) {
 }
 
 uint16_t
-qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
+qat_sym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
uint16_t nb_ops)
 {
register struct qat_queue *queue;
@@ -242,7 +242,7 @@ qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op 
**ops,
}
 
while (nb_ops_sent != nb_ops_possible) {
-   ret = qat_write_hw_desc_entry(*cur_op, base_addr + tail,
+   ret = qat_sym_build_request(*cur_op, base_addr + tail,
tmp_qp->op_cookies[tail / queue->msg_size], tmp_qp);
if (ret != 0) {
tmp_qp->stats.enqueue_err_count++;
@@ -299,7 +299,7 @@ void rxq_free_desc(struct qat_qp *qp, struct qat_queue *q)
 }
 
 uint16_t
-qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
+qat_sym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
uint16_t n

[dpdk-dev] [PATCH v3 04/38] crypto/qat: add symmetric session file

[Tomasz Jozwiak]

From: Fiona Trahe 

This commit adds qat_sym_session.c/h files and moves objects
from qat_algs_build_desc and qat_algs.h

Following objects were moved:
qat_adf/qat_algs_build_desc.c => qat_sym_session.c
- all objects -
qat_adf/qat_algs.h => qat_sym_session.h
- enum qat_crypto_proto_flag
- struct qat_alg_cd
- struct qat_session
- int qat_get_inter_state_size()
- int qat_alg_aead_session_create_content_desc_cipher()
- int qat_alg_aead_session_create_content_desc_auth()
- void qat_alg_init_common_hdr()
- int qat_alg_validate_aes_key()
- int qat_alg_validate_aes_docsisbpi_key()
- int qat_alg_validate_snow3g_key()
- int qat_alg_validate_kasumi_key()
- int qat_alg_validate_3des_key()
- int qat_alg_validate_des_key()
- int qat_cipher_get_block_size()
- int qat_alg_validate_zuc_key()
-- all macros
qat_crypto.h => qat_sym_session.h
int qat_crypto_sym_configure_session()
int qat_crypto_set_session_parameters()
int qat_crypto_sym_configure_session_aead()
int qat_crypto_sym_configure_session_cipher()
int qat_crypto_sym_configure_session_auth()
int qat_alg_aead_session_create_content_desc_cipher()
int qat_alg_aead_session_create_content_desc_auth()
static struct rte_crypto_auth_xform qat_get_auth_xform()
static struct rte_crypto_cipher_xform qat_get_cipher_xform()

Signed-off-by: ArkadiuszX Kusztal 
Signed-off-by: Fiona Trahe 
Signed-off-by: Tomasz Jozwiak 
---
 drivers/crypto/qat/Makefile   |   2 +-
 drivers/crypto/qat/meson.build|   2 +-
 drivers/crypto/qat/qat_crypto.c   | 704 +
 drivers/crypto/qat/qat_crypto.h   |  36 -
 drivers/crypto/qat/qat_qp.c   |   1 -
 ...at_algs_build_desc.c => qat_sym_session.c} | 728 +-
 .../{qat_adf/qat_algs.h => qat_sym_session.h} |  63 +-
 drivers/crypto/qat/rte_qat_cryptodev.c|   1 +
 8 files changed, 775 insertions(+), 762 deletions(-)
 rename drivers/crypto/qat/{qat_adf/qat_algs_build_desc.c => qat_sym_session.c} 
(61%)
 rename drivers/crypto/qat/{qat_adf/qat_algs.h => qat_sym_session.h} (66%)

diff --git a/drivers/crypto/qat/Makefile b/drivers/crypto/qat/Makefile
index 6bdd11679..c63c1515e 100644
--- a/drivers/crypto/qat/Makefile
+++ b/drivers/crypto/qat/Makefile
@@ -24,7 +24,7 @@ LDLIBS += -lrte_pci -lrte_bus_pci
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_crypto.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_device.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_qp.c
-SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_adf/qat_algs_build_desc.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_sym_session.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += rte_qat_cryptodev.c
 
 # export include files
diff --git a/drivers/crypto/qat/meson.build b/drivers/crypto/qat/meson.build
index 51630e31b..be4282a83 100644
--- a/drivers/crypto/qat/meson.build
+++ b/drivers/crypto/qat/meson.build
@@ -6,7 +6,7 @@ if not dep.found()
build = false
 endif
 sources = files('qat_crypto.c', 'qat_qp.c',
-   'qat_adf/qat_algs_build_desc.c',
+   'qat_sym_session.c',
'rte_qat_cryptodev.c',
'qat_device.c')
 includes += include_directories('qat_adf')
diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c
index 7f2c2c86b..96a1b78f0 100644
--- a/drivers/crypto/qat/qat_crypto.c
+++ b/drivers/crypto/qat/qat_crypto.c
@@ -13,7 +13,7 @@
 #include 
 
 #include "qat_logs.h"
-#include "qat_algs.h"
+#include "qat_sym_session.h"
 #include "qat_crypto.h"
 #include "adf_transport_access_macros.h"
 
@@ -23,46 +23,6 @@
  */
 #define BPI_MAX_ENCR_IV_LEN ICP_QAT_HW_AES_BLK_SZ
 
-static int
-qat_is_cipher_alg_supported(enum rte_crypto_cipher_algorithm algo,
-   struct qat_pmd_private *internals) {
-   int i = 0;
-   const struct rte_cryptodev_capabilities *capability;
-
-   while ((capability = &(internals->qat_dev_capabilities[i++]))->op !=
-   RTE_CRYPTO_OP_TYPE_UNDEFINED) {
-   if (capability->op != RTE_CRYPTO_OP_TYPE_SYMMETRIC)
-   continue;
-
-   if (capability->sym.xform_type != RTE_CRYPTO_SYM_XFORM_CIPHER)
-   continue;
-
-   if (capability->sym.cipher.algo == algo)
-   return 1;
-   }
-   return 0;
-}
-
-static int
-qat_is_auth_alg_supported(enum rte_crypto_auth_algorithm algo,
-   struct qat_pmd_private *internals) {
-   int i = 0;
-   const struct rte_cryptodev_capabilities *capability;
-
-   while ((capability = &(internals->qat_dev_capabilities[i++]))->op !=
-   RTE_CRYPTO_OP_TYPE_UNDEFINED) {
-   if (capability->op != RTE_CRYPTO_OP_TYPE_SYMMETRIC)
-   continue;
-
-   if (capability->sym.xform_type != RTE_CRYPTO_SYM_XFORM_AUTH)
-   continue;
-
-   if (capability->sym.auth.algo == algo)
-   return 1;
-   }
-   return 0;
-}
-
 /** Encrypt a single partial block
  *  D

[dpdk-dev] [PATCH v3 10/38] crypto/qat: move generic qp fn to qp file

[Tomasz Jozwiak]

From: Fiona Trahe 

Move the generic enqueue and dequeue fns from
the qat_sym.c file to the qat_qp.c file
Move generic qp structs to a new qat_qp.h file

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_qp.c  | 152 +++
 drivers/crypto/qat/qat_qp.h  |  63 +++
 drivers/crypto/qat/qat_sym.c | 149 +-
 drivers/crypto/qat/qat_sym.h |  49 ---
 4 files changed, 216 insertions(+), 197 deletions(-)
 create mode 100644 drivers/crypto/qat/qat_qp.h

diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index bae6cf114..56ea10242 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -13,7 +13,9 @@
 #include 
 
 #include "qat_logs.h"
+#include "qat_qp.h"
 #include "qat_sym.h"
+
 #include "adf_transport_access_macros.h"
 
 #define ADF_MAX_SYM_DESC   4096
@@ -450,3 +452,153 @@ static void adf_configure_queues(struct qat_qp *qp)
WRITE_CSR_RING_CONFIG(qp->mmap_bar_addr, queue->hw_bundle_number,
queue->hw_queue_number, queue_config);
 }
+
+
+static inline uint32_t adf_modulo(uint32_t data, uint32_t shift)
+{
+   uint32_t div = data >> shift;
+   uint32_t mult = div << shift;
+
+   return data - mult;
+}
+
+static inline void
+txq_write_tail(struct qat_qp *qp, struct qat_queue *q) {
+   WRITE_CSR_RING_TAIL(qp->mmap_bar_addr, q->hw_bundle_number,
+   q->hw_queue_number, q->tail);
+   q->nb_pending_requests = 0;
+   q->csr_tail = q->tail;
+}
+
+static inline
+void rxq_free_desc(struct qat_qp *qp, struct qat_queue *q)
+{
+   uint32_t old_head, new_head;
+   uint32_t max_head;
+
+   old_head = q->csr_head;
+   new_head = q->head;
+   max_head = qp->nb_descriptors * q->msg_size;
+
+   /* write out free descriptors */
+   void *cur_desc = (uint8_t *)q->base_addr + old_head;
+
+   if (new_head < old_head) {
+   memset(cur_desc, ADF_RING_EMPTY_SIG_BYTE, max_head - old_head);
+   memset(q->base_addr, ADF_RING_EMPTY_SIG_BYTE, new_head);
+   } else {
+   memset(cur_desc, ADF_RING_EMPTY_SIG_BYTE, new_head - old_head);
+   }
+   q->nb_processed_responses = 0;
+   q->csr_head = new_head;
+
+   /* write current head to CSR */
+   WRITE_CSR_RING_HEAD(qp->mmap_bar_addr, q->hw_bundle_number,
+   q->hw_queue_number, new_head);
+}
+
+uint16_t
+qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops)
+{
+   register struct qat_queue *queue;
+   struct qat_qp *tmp_qp = (struct qat_qp *)qp;
+   register uint32_t nb_ops_sent = 0;
+   register int ret;
+   uint16_t nb_ops_possible = nb_ops;
+   register uint8_t *base_addr;
+   register uint32_t tail;
+   int overflow;
+
+   if (unlikely(nb_ops == 0))
+   return 0;
+
+   /* read params used a lot in main loop into registers */
+   queue = &(tmp_qp->tx_q);
+   base_addr = (uint8_t *)queue->base_addr;
+   tail = queue->tail;
+
+   /* Find how many can actually fit on the ring */
+   tmp_qp->inflights16 += nb_ops;
+   overflow = tmp_qp->inflights16 - queue->max_inflights;
+   if (overflow > 0) {
+   tmp_qp->inflights16 -= overflow;
+   nb_ops_possible = nb_ops - overflow;
+   if (nb_ops_possible == 0)
+   return 0;
+   }
+
+   while (nb_ops_sent != nb_ops_possible) {
+   ret = tmp_qp->build_request(*ops, base_addr + tail,
+   tmp_qp->op_cookies[tail / queue->msg_size],
+   tmp_qp->qat_dev_gen);
+   if (ret != 0) {
+   tmp_qp->stats.enqueue_err_count++;
+   /*
+* This message cannot be enqueued,
+* decrease number of ops that wasn't sent
+*/
+   tmp_qp->inflights16 -= nb_ops_possible - nb_ops_sent;
+   if (nb_ops_sent == 0)
+   return 0;
+   goto kick_tail;
+   }
+
+   tail = adf_modulo(tail + queue->msg_size, queue->modulo);
+   ops++;
+   nb_ops_sent++;
+   }
+kick_tail:
+   queue->tail = tail;
+   tmp_qp->stats.enqueued_count += nb_ops_sent;
+   queue->nb_pending_requests += nb_ops_sent;
+   if (tmp_qp->inflights16 < QAT_CSR_TAIL_FORCE_WRITE_THRESH ||
+   queue->nb_pending_requests > QAT_CSR_TAIL_WRITE_THRESH) {
+   txq_write_tail(tmp_qp, queue);
+   }
+   return nb_ops_sent;
+}
+
+uint16_t
+qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops)
+{
+   struct qat_queue *rx_queue, *tx_queue;
+   struct qat_qp *tmp_qp = (struct qat_qp *)qp;
+   uint32_t head;
+   uint32_t resp_counter = 0;
+   uint8_t *resp_msg;
+
+   

[dpdk-dev] [PATCH v3 12/38] crypto/qat: move sym-specific qp code to sym file

[Tomasz Jozwiak]

From: Fiona Trahe 

Move sym qp setup code from qat_qp.c to qat_sym.c

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_qp.c  | 78 ++--
 drivers/crypto/qat/qat_qp.h  |  6 +++
 drivers/crypto/qat/qat_sym.c | 75 ++
 3 files changed, 84 insertions(+), 75 deletions(-)

diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index 5a543f6cb..d1d2be34f 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -20,11 +20,7 @@
 
 #define ADF_MAX_DESC   4096
 #define ADF_MIN_DESC   128
-#define ADF_SYM_TX_RING_DESC_SIZE  128
-#define ADF_SYM_RX_RING_DESC_SIZE  32
-#define ADF_SYM_TX_QUEUE_STARTOFF  2
-/* Offset from bundle start to 1st Sym Tx queue */
-#define ADF_SYM_RX_QUEUE_STARTOFF  10
+
 #define ADF_ARB_REG_SLOT   0x1000
 #define ADF_ARB_RINGSRVARBEN_OFFSET0x19C
 
@@ -74,7 +70,7 @@ queue_dma_zone_reserve(const char *queue_name, uint32_t 
queue_size,
socket_id, RTE_MEMZONE_IOVA_CONTIG, queue_size);
 }
 
-static int qat_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
+int qat_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
struct qat_qp_config *qat_qp_conf)
 {
struct qat_qp *qp;
@@ -174,71 +170,7 @@ static int qat_qp_setup(struct rte_cryptodev *dev, 
uint16_t queue_pair_id,
return -EFAULT;
 }
 
-
-
-int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
-   const struct rte_cryptodev_qp_conf *qp_conf,
-   int socket_id, struct rte_mempool *session_pool __rte_unused)
-{
-   struct qat_qp *qp;
-   int ret = 0;
-   uint32_t i;
-   struct qat_qp_config qat_qp_conf;
-
-   /* If qp is already in use free ring memory and qp metadata. */
-   if (dev->data->queue_pairs[qp_id] != NULL) {
-   ret = qat_sym_qp_release(dev, qp_id);
-   if (ret < 0)
-   return ret;
-   }
-   if (qp_id >= (ADF_NUM_SYM_QPS_PER_BUNDLE *
-   ADF_NUM_BUNDLES_PER_DEV)) {
-   PMD_DRV_LOG(ERR, "qp_id %u invalid for this device", qp_id);
-   return -EINVAL;
-   }
-
-
-   qat_qp_conf.hw_bundle_num = (qp_id/ADF_NUM_SYM_QPS_PER_BUNDLE);
-   qat_qp_conf.tx_ring_num = (qp_id%ADF_NUM_SYM_QPS_PER_BUNDLE) +
-   ADF_SYM_TX_QUEUE_STARTOFF;
-   qat_qp_conf.rx_ring_num = (qp_id%ADF_NUM_SYM_QPS_PER_BUNDLE) +
-   ADF_SYM_RX_QUEUE_STARTOFF;
-   qat_qp_conf.tx_msg_size = ADF_SYM_TX_RING_DESC_SIZE;
-   qat_qp_conf.rx_msg_size = ADF_SYM_RX_RING_DESC_SIZE;
-   qat_qp_conf.build_request = qat_sym_build_request;
-   qat_qp_conf.process_response = qat_sym_process_response;
-   qat_qp_conf.cookie_size = sizeof(struct qat_sym_op_cookie);
-   qat_qp_conf.nb_descriptors = qp_conf->nb_descriptors;
-   qat_qp_conf.socket_id = socket_id;
-   qat_qp_conf.service_str = "sym";
-
-   ret = qat_qp_setup(dev, qp_id, &qat_qp_conf);
-   if (ret != 0)
-   return ret;
-
-   qp = (struct qat_qp *)dev->data->queue_pairs[qp_id];
-
-   for (i = 0; i < qp->nb_descriptors; i++) {
-
-   struct qat_sym_op_cookie *sql_cookie =
-   qp->op_cookies[i];
-
-   sql_cookie->qat_sgl_src_phys_addr =
-   rte_mempool_virt2iova(sql_cookie) +
-   offsetof(struct qat_sym_op_cookie,
-   qat_sgl_list_src);
-
-   sql_cookie->qat_sgl_dst_phys_addr =
-   rte_mempool_virt2iova(sql_cookie) +
-   offsetof(struct qat_sym_op_cookie,
-   qat_sgl_list_dst);
-   }
-
-   return ret;
-
-}
-
-static int qat_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
+int qat_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
 {
struct qat_qp *qp =
(struct qat_qp *)dev->data->queue_pairs[queue_pair_id];
@@ -273,10 +205,6 @@ static int qat_qp_release(struct rte_cryptodev *dev, 
uint16_t queue_pair_id)
 }
 
 
-int qat_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
-{
-   return qat_qp_release(dev, queue_pair_id);
-}
 
 
 static void qat_queue_delete(struct qat_queue *queue)
diff --git a/drivers/crypto/qat/qat_qp.h b/drivers/crypto/qat/qat_qp.h
index edebb8773..0cdf37f61 100644
--- a/drivers/crypto/qat/qat_qp.h
+++ b/drivers/crypto/qat/qat_qp.h
@@ -77,4 +77,10 @@ qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops);
 uint16_t
 qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops);
 
+int
+qat_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id);
+
+int
+qat_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
+   struct qat_q

[dpdk-dev] [PATCH v3 08/38] crypto/qat: make enqueue function generic

[Tomasz Jozwiak]

From: Fiona Trahe 

Queue-handling code in enqueue is made generic, so it can
be used by other services in future. This is done by
 - Removing all sym-specific refs in input params - replace with void ptrs.
 - Wrapping this generic enqueue with the sym-specific enqueue
   called through the API.
 - Setting a fn ptr for build_request in qp on qp creation
 - Passing void * params to this, in the service-specific implementation
   qat_sym_build_request cast back to sym structs.

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_qp.c  |  1 +
 drivers/crypto/qat/qat_sym.c | 46 
 drivers/crypto/qat/qat_sym.h | 11 +
 3 files changed, 38 insertions(+), 20 deletions(-)

diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index fb9c2a7ef..d7d79f1af 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -197,6 +197,7 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t 
queue_pair_id,
struct qat_pmd_private *internals
= dev->data->dev_private;
qp->qat_dev_gen = internals->qat_dev_gen;
+   qp->build_request = qat_sym_build_request;
 
dev->data->queue_pairs[queue_pair_id] = qp;
return 0;
diff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c
index 2dfdc9cce..4e404749a 100644
--- a/drivers/crypto/qat/qat_sym.c
+++ b/drivers/crypto/qat/qat_sym.c
@@ -86,10 +86,6 @@ bpi_cipher_decrypt(uint8_t *src, uint8_t *dst,
 static inline uint32_t
 adf_modulo(uint32_t data, uint32_t shift);
 
-static inline int
-qat_sym_build_request(struct rte_crypto_op *op, uint8_t *out_msg,
-   struct qat_sym_op_cookie *qat_op_cookie, struct qat_qp *qp);
-
 static inline uint32_t
 qat_bpicipher_preprocess(struct qat_sym_session *ctx,
struct rte_crypto_op *op)
@@ -209,14 +205,12 @@ txq_write_tail(struct qat_qp *qp, struct qat_queue *q) {
q->csr_tail = q->tail;
 }
 
-uint16_t
-qat_sym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
-   uint16_t nb_ops)
+static uint16_t
+qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops)
 {
register struct qat_queue *queue;
struct qat_qp *tmp_qp = (struct qat_qp *)qp;
register uint32_t nb_ops_sent = 0;
-   register struct rte_crypto_op **cur_op = ops;
register int ret;
uint16_t nb_ops_possible = nb_ops;
register uint8_t *base_addr;
@@ -242,8 +236,9 @@ qat_sym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op 
**ops,
}
 
while (nb_ops_sent != nb_ops_possible) {
-   ret = qat_sym_build_request(*cur_op, base_addr + tail,
-   tmp_qp->op_cookies[tail / queue->msg_size], tmp_qp);
+   ret = tmp_qp->build_request(*ops, base_addr + tail,
+   tmp_qp->op_cookies[tail / queue->msg_size],
+   tmp_qp->qat_dev_gen);
if (ret != 0) {
tmp_qp->stats.enqueue_err_count++;
/*
@@ -257,8 +252,8 @@ qat_sym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op 
**ops,
}
 
tail = adf_modulo(tail + queue->msg_size, queue->modulo);
+   ops++;
nb_ops_sent++;
-   cur_op++;
}
 kick_tail:
queue->tail = tail;
@@ -298,6 +293,13 @@ void rxq_free_desc(struct qat_qp *qp, struct qat_queue *q)
q->hw_queue_number, new_head);
 }
 
+uint16_t
+qat_sym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
+   uint16_t nb_ops)
+{
+   return qat_enqueue_op_burst(qp, (void **)ops, nb_ops);
+}
+
 uint16_t
 qat_sym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
uint16_t nb_ops)
@@ -456,9 +458,10 @@ set_cipher_iv_ccm(uint16_t iv_length, uint16_t iv_offset,
iv_length);
 }
 
-static inline int
-qat_sym_build_request(struct rte_crypto_op *op, uint8_t *out_msg,
-   struct qat_sym_op_cookie *qat_op_cookie, struct qat_qp *qp)
+
+int
+qat_sym_build_request(void *in_op, uint8_t *out_msg,
+   void *op_cookie, enum qat_device_gen qat_dev_gen)
 {
int ret = 0;
struct qat_sym_session *ctx;
@@ -471,6 +474,9 @@ qat_sym_build_request(struct rte_crypto_op *op, uint8_t 
*out_msg,
uint32_t min_ofs = 0;
uint64_t src_buf_start = 0, dst_buf_start = 0;
uint8_t do_sgl = 0;
+   struct rte_crypto_op *op = (struct rte_crypto_op *)in_op;
+   struct qat_sym_op_cookie *cookie =
+   (struct qat_sym_op_cookie *)op_cookie;
 
 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
@@ -494,7 +500,7 @@ qat_sym_build_request(struct rte_crypto_op *op, uint8_t 
*out_msg,
return -EINVAL;
}
 
-   if (unlikely(ctx->min_qat_dev_gen > qp->qat_dev_gen)) {
+   if (unlikely(ctx-

[dpdk-dev] [PATCH v3 11/38] crypto/qat: separate sym-specific from generic qp setup

[Tomasz Jozwiak]

From: Fiona Trahe 

Extracted all sym-specific code from qp setup fns, leaving
generic qat_qp_setup fn and helper fns. Created a new
meta-data struct qat_qp_config to hold all the data needed
to create a qp, filled this out in the sym-specific code
and passed to the generic qp_setup fn.
No need now for rx and tx queue_create fns, one generic
queue_create fn replaces these.
Included the service name (e.g. "sym") in the qp memzone
and cookie pool names.

Signed-off-by: Fiona Trahe 
---
 .../qat/qat_adf/adf_transport_access_macros.h |   2 +
 drivers/crypto/qat/qat_qp.c   | 220 ++
 drivers/crypto/qat/qat_qp.h   |  17 ++
 3 files changed, 137 insertions(+), 102 deletions(-)

diff --git a/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h 
b/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h
index bfdbc979f..8b88b69de 100644
--- a/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h
+++ b/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h
@@ -52,6 +52,8 @@
 
 #define ADF_NUM_BUNDLES_PER_DEV 1
 #define ADF_NUM_SYM_QPS_PER_BUNDLE  2
+#define ADF_RING_DIR_TX0
+#define ADF_RING_DIR_RX1
 
 /* Valid internal msg size values */
 #define ADF_MSG_SIZE_32 0x01
diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index 56ea10242..5a543f6cb 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -18,8 +18,8 @@
 
 #include "adf_transport_access_macros.h"
 
-#define ADF_MAX_SYM_DESC   4096
-#define ADF_MIN_SYM_DESC   128
+#define ADF_MAX_DESC   4096
+#define ADF_MIN_DESC   128
 #define ADF_SYM_TX_RING_DESC_SIZE  128
 #define ADF_SYM_RX_RING_DESC_SIZE  32
 #define ADF_SYM_TX_QUEUE_STARTOFF  2
@@ -34,16 +34,9 @@
 
 static int qat_qp_check_queue_alignment(uint64_t phys_addr,
uint32_t queue_size_bytes);
-static int qat_tx_queue_create(struct rte_cryptodev *dev,
-   struct qat_queue *queue, uint8_t id, uint32_t nb_desc,
-   int socket_id);
-static int qat_rx_queue_create(struct rte_cryptodev *dev,
-   struct qat_queue *queue, uint8_t id, uint32_t nb_desc,
-   int socket_id);
 static void qat_queue_delete(struct qat_queue *queue);
 static int qat_queue_create(struct rte_cryptodev *dev,
-   struct qat_queue *queue, uint32_t nb_desc, uint8_t desc_size,
-   int socket_id);
+   struct qat_queue *queue, struct qat_qp_config *, uint8_t dir);
 static int adf_verify_queue_size(uint32_t msg_size, uint32_t msg_num,
uint32_t *queue_size_for_csr);
 static void adf_configure_queues(struct qat_qp *queue);
@@ -81,29 +74,19 @@ queue_dma_zone_reserve(const char *queue_name, uint32_t 
queue_size,
socket_id, RTE_MEMZONE_IOVA_CONTIG, queue_size);
 }
 
-int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
-   const struct rte_cryptodev_qp_conf *qp_conf,
-   int socket_id, struct rte_mempool *session_pool __rte_unused)
+static int qat_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
+   struct qat_qp_config *qat_qp_conf)
 {
struct qat_qp *qp;
struct rte_pci_device *pci_dev;
-   int ret;
char op_cookie_pool_name[RTE_RING_NAMESIZE];
uint32_t i;
 
-   PMD_INIT_FUNC_TRACE();
 
-   /* If qp is already in use free ring memory and qp metadata. */
-   if (dev->data->queue_pairs[queue_pair_id] != NULL) {
-   ret = qat_sym_qp_release(dev, queue_pair_id);
-   if (ret < 0)
-   return ret;
-   }
-
-   if ((qp_conf->nb_descriptors > ADF_MAX_SYM_DESC) ||
-   (qp_conf->nb_descriptors < ADF_MIN_SYM_DESC)) {
+   if ((qat_qp_conf->nb_descriptors > ADF_MAX_DESC) ||
+   (qat_qp_conf->nb_descriptors < ADF_MIN_DESC)) {
PMD_DRV_LOG(ERR, "Can't create qp for %u descriptors",
-   qp_conf->nb_descriptors);
+   qat_qp_conf->nb_descriptors);
return -EINVAL;
}
 
@@ -115,13 +98,6 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t 
queue_pair_id,
return -EINVAL;
}
 
-   if (queue_pair_id >=
-   (ADF_NUM_SYM_QPS_PER_BUNDLE *
-   ADF_NUM_BUNDLES_PER_DEV)) {
-   PMD_DRV_LOG(ERR, "qp_id %u invalid for this device",
-   queue_pair_id);
-   return -EINVAL;
-   }
/* Allocate the queue pair data structure. */
qp = rte_zmalloc("qat PMD qp metadata",
sizeof(*qp), RTE_CACHE_LINE_SIZE);
@@ -129,9 +105,9 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t 
queue_pair_id,
PMD_DRV_LOG(ERR, "Failed to alloc mem for qp struct");
return -ENOMEM;
}
- 

[dpdk-dev] [PATCH v3 13/38] crypto/qat: remove dependencies on cryptodev from common

[Tomasz Jozwiak]

From: Fiona Trahe 

Remove dependence on rte_cryptodev from common qp code
to facilitate being used by other device types in future.
Transferred required data into qat-specific structures.

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_device.h| 11 -
 drivers/crypto/qat/qat_qp.c| 67 ++
 drivers/crypto/qat/qat_qp.h|  8 ++-
 drivers/crypto/qat/qat_sym.c   | 15 --
 drivers/crypto/qat/rte_qat_cryptodev.c |  4 +-
 5 files changed, 66 insertions(+), 39 deletions(-)

diff --git a/drivers/crypto/qat/qat_device.h b/drivers/crypto/qat/qat_device.h
index 2cb8e7612..64706abae 100644
--- a/drivers/crypto/qat/qat_device.h
+++ b/drivers/crypto/qat/qat_device.h
@@ -14,7 +14,11 @@ extern uint8_t cryptodev_qat_driver_id;
 extern int qat_sym_qp_release(struct rte_cryptodev *dev,
uint16_t queue_pair_id);
 
-/** private data structure for each QAT device */
+/** private data structure for each QAT device.
+ * In this context a QAT device is a device offering only one service,
+ * so there can be more than 1 device on a pci_dev (VF),
+ * one for symmetric crypto, one for compression
+ */
 struct qat_pmd_private {
unsigned int max_nb_queue_pairs;
/**< Max number of queue pairs supported by device */
@@ -23,6 +27,11 @@ struct qat_pmd_private {
enum qat_device_gen qat_dev_gen;
/**< QAT device generation */
const struct rte_cryptodev_capabilities *qat_dev_capabilities;
+   /* QAT device capabilities */
+   struct rte_pci_device *pci_dev;
+   /**< PCI information. */
+   uint8_t dev_id;
+   /**< Device ID for this instance */
 };
 
 int qat_dev_config(struct rte_cryptodev *dev,
diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index d1d2be34f..b831ab420 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -6,7 +6,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -31,7 +30,7 @@
 static int qat_qp_check_queue_alignment(uint64_t phys_addr,
uint32_t queue_size_bytes);
 static void qat_queue_delete(struct qat_queue *queue);
-static int qat_queue_create(struct rte_cryptodev *dev,
+static int qat_queue_create(struct qat_pmd_private *qat_dev,
struct qat_queue *queue, struct qat_qp_config *, uint8_t dir);
 static int adf_verify_queue_size(uint32_t msg_size, uint32_t msg_num,
uint32_t *queue_size_for_csr);
@@ -70,14 +69,19 @@ queue_dma_zone_reserve(const char *queue_name, uint32_t 
queue_size,
socket_id, RTE_MEMZONE_IOVA_CONTIG, queue_size);
 }
 
-int qat_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
+int qat_qp_setup(struct qat_pmd_private *qat_dev,
+   struct qat_qp **qp_addr,
+   uint16_t queue_pair_id,
struct qat_qp_config *qat_qp_conf)
+
 {
struct qat_qp *qp;
-   struct rte_pci_device *pci_dev;
+   struct rte_pci_device *pci_dev = qat_dev->pci_dev;
char op_cookie_pool_name[RTE_RING_NAMESIZE];
uint32_t i;
 
+   PMD_DRV_LOG(DEBUG, "Setup qp %u on device %d gen %d",
+   queue_pair_id, qat_dev->dev_id, qat_dev->qat_dev_gen);
 
if ((qat_qp_conf->nb_descriptors > ADF_MAX_DESC) ||
(qat_qp_conf->nb_descriptors < ADF_MIN_DESC)) {
@@ -86,8 +90,6 @@ int qat_qp_setup(struct rte_cryptodev *dev, uint16_t 
queue_pair_id,
return -EINVAL;
}
 
-   pci_dev = RTE_DEV_TO_PCI(dev->device);
-
if (pci_dev->mem_resource[0].addr == NULL) {
PMD_DRV_LOG(ERR, "Could not find VF config space "
"(UIO driver attached?).");
@@ -114,14 +116,14 @@ int qat_qp_setup(struct rte_cryptodev *dev, uint16_t 
queue_pair_id,
qp->mmap_bar_addr = pci_dev->mem_resource[0].addr;
qp->inflights16 = 0;
 
-   if (qat_queue_create(dev, &(qp->tx_q), qat_qp_conf,
+   if (qat_queue_create(qat_dev, &(qp->tx_q), qat_qp_conf,
ADF_RING_DIR_TX) != 0) {
PMD_INIT_LOG(ERR, "Tx queue create failed "
"queue_pair_id=%u", queue_pair_id);
goto create_err;
}
 
-   if (qat_queue_create(dev, &(qp->rx_q), qat_qp_conf,
+   if (qat_queue_create(qat_dev, &(qp->rx_q), qat_qp_conf,
ADF_RING_DIR_RX) != 0) {
PMD_DRV_LOG(ERR, "Rx queue create failed "
"queue_pair_id=%hu", queue_pair_id);
@@ -134,7 +136,7 @@ int qat_qp_setup(struct rte_cryptodev *dev, uint16_t 
queue_pair_id,
 
snprintf(op_cookie_pool_name, RTE_RING_NAMESIZE, "%s_%s_qp_op_%d_%hu",
pci_dev->driver->driver.name, qat_qp_conf->service_str,
-   dev->data->dev_id, queue_pair_id);
+   qat_dev->dev_id, queue_pair_id);
 
qp->op_cookie_pool = rte_mempool_lookup(op_cookie_pool_name);
if (qp->o

[dpdk-dev] [PATCH v3 09/38] crypto/qat: make dequeue function generic

[Tomasz Jozwiak]

From: Fiona Trahe 

Queue-handling code in dequeue is made generic, so it can
be used by other services in future. This is done by
 - Removing all sym-specific refs in input params - replace with void ptrs.
 - Wrapping this generic dequeue with the sym-specific dequeue
   called through the API.
 - extracting the sym-specific response processing into a new fn.
 - Setting a fn ptr for process_response in qp on qp creation
 - Passing void * params to this, in the service-specific implementation
   qat_sym_process_response cast back to sym structs.

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_qp.c  |   1 +
 drivers/crypto/qat/qat_sym.c | 101 +--
 drivers/crypto/qat/qat_sym.h |  10 
 3 files changed, 72 insertions(+), 40 deletions(-)

diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index d7d79f1af..bae6cf114 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -198,6 +198,7 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t 
queue_pair_id,
= dev->data->dev_private;
qp->qat_dev_gen = internals->qat_dev_gen;
qp->build_request = qat_sym_build_request;
+   qp->process_response = qat_sym_process_response;
 
dev->data->queue_pairs[queue_pair_id] = qp;
return 0;
diff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c
index 4e404749a..2bae913a1 100644
--- a/drivers/crypto/qat/qat_sym.c
+++ b/drivers/crypto/qat/qat_sym.c
@@ -300,70 +300,91 @@ qat_sym_pmd_enqueue_op_burst(void *qp, struct 
rte_crypto_op **ops,
return qat_enqueue_op_burst(qp, (void **)ops, nb_ops);
 }
 
-uint16_t
-qat_sym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
-   uint16_t nb_ops)
+int
+qat_sym_process_response(void **op, uint8_t *resp,
+   __rte_unused void *op_cookie,
+   __rte_unused enum qat_device_gen qat_dev_gen)
+{
+
+   struct icp_qat_fw_comn_resp *resp_msg =
+   (struct icp_qat_fw_comn_resp *)resp;
+   struct rte_crypto_op *rx_op = (struct rte_crypto_op *)(uintptr_t)
+   (resp_msg->opaque_data);
+
+#ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX
+   rte_hexdump(stdout, "qat_response:", (uint8_t *)resp_msg,
+   sizeof(struct icp_qat_fw_comn_resp));
+#endif
+
+   if (ICP_QAT_FW_COMN_STATUS_FLAG_OK !=
+   ICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(
+   resp_msg->comn_hdr.comn_status)) {
+
+   rx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
+   } else {
+   struct qat_sym_session *sess = (struct qat_sym_session *)
+   get_session_private_data(
+   rx_op->sym->session,
+   cryptodev_qat_driver_id);
+
+   if (sess->bpi_ctx)
+   qat_bpicipher_postprocess(sess, rx_op);
+   rx_op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
+   }
+   *op = (void *)rx_op;
+
+   return 0;
+}
+
+static uint16_t
+qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops)
 {
struct qat_queue *rx_queue, *tx_queue;
struct qat_qp *tmp_qp = (struct qat_qp *)qp;
-   uint32_t msg_counter = 0;
-   struct rte_crypto_op *rx_op;
-   struct icp_qat_fw_comn_resp *resp_msg;
uint32_t head;
+   uint32_t resp_counter = 0;
+   uint8_t *resp_msg;
 
rx_queue = &(tmp_qp->rx_q);
tx_queue = &(tmp_qp->tx_q);
head = rx_queue->head;
-   resp_msg = (struct icp_qat_fw_comn_resp *)
-   ((uint8_t *)rx_queue->base_addr + head);
+   resp_msg = (uint8_t *)rx_queue->base_addr + rx_queue->head;
 
while (*(uint32_t *)resp_msg != ADF_RING_EMPTY_SIG &&
-   msg_counter != nb_ops) {
-   rx_op = (struct rte_crypto_op *)(uintptr_t)
-   (resp_msg->opaque_data);
-
-#ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX
-   rte_hexdump(stdout, "qat_response:", (uint8_t *)resp_msg,
-   sizeof(struct icp_qat_fw_comn_resp));
-#endif
-   if (ICP_QAT_FW_COMN_STATUS_FLAG_OK !=
-   ICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(
-   resp_msg->comn_hdr.comn_status)) {
-   rx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
-   } else {
-   struct qat_sym_session *sess =
-   (struct qat_sym_session *)
-   get_session_private_data(
-   rx_op->sym->session,
-   cryptodev_qat_driver_id);
+   resp_counter != nb_ops) {
 
-   if (sess->bpi_ctx)
-   qat_bpicipher_postprocess(sess, rx_op);
-

[dpdk-dev] [PATCH v3 15/38] crypto/qat: create structures to support various generations

[Tomasz Jozwiak]

From: Fiona Trahe 

Create data structures to support different generations
of qat hardware supplying services through different queue pairs.
 - Add two new structs qat_gen_hw_data and qat_qp_hw_dat
 - Add a qat_service_type enum
An array of qat_qp_hw_data elements is
initialised with constants, these are arranged so that the qp_id used
on the API can be used as an index to pick up the qp data to use.
The constants are common to current generations,
new arrays will be added for future generations.

Signed-off-by: Fiona Trahe 
---
 .../qat/qat_adf/adf_transport_access_macros.h |  6 +-
 drivers/crypto/qat/qat_common.h   |  8 ++
 drivers/crypto/qat/qat_device.c   | 21 -
 drivers/crypto/qat/qat_device.h   |  9 ++
 drivers/crypto/qat/qat_qp.c   | 94 ++-
 drivers/crypto/qat/qat_qp.h   | 18 +++-
 drivers/crypto/qat/qat_sym.c  | 27 ++
 7 files changed, 154 insertions(+), 29 deletions(-)

diff --git a/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h 
b/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h
index 8b88b69de..2136d54ab 100644
--- a/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h
+++ b/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h
@@ -51,7 +51,8 @@
 #define ADF_DEFAULT_RING_SIZE ADF_RING_SIZE_16K
 
 #define ADF_NUM_BUNDLES_PER_DEV 1
-#define ADF_NUM_SYM_QPS_PER_BUNDLE  2
+/* Maximum number of qps for any service type */
+#define ADF_MAX_QPS_PER_BUNDLE 4
 #define ADF_RING_DIR_TX0
 #define ADF_RING_DIR_RX1
 
@@ -132,4 +133,5 @@ do { \
 #define WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value) \
ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
ADF_RING_CSR_INT_FLAG_AND_COL, value)
-#endif
+
+#endif /*ADF_TRANSPORT_ACCESS_MACROS_H */
diff --git a/drivers/crypto/qat/qat_common.h b/drivers/crypto/qat/qat_common.h
index 7802e96f9..c3e7bd9a7 100644
--- a/drivers/crypto/qat/qat_common.h
+++ b/drivers/crypto/qat/qat_common.h
@@ -23,6 +23,14 @@ enum qat_device_gen {
QAT_GEN2,
 };
 
+enum qat_service_type {
+   QAT_SERVICE_ASYMMETRIC = 0,
+   QAT_SERVICE_SYMMETRIC,
+   QAT_SERVICE_COMPRESSION,
+   QAT_SERVICE_INVALID
+};
+#define QAT_MAX_SERVICES   (QAT_SERVICE_INVALID)
+
 /**< Common struct for scatter-gather list operations */
 struct qat_alg_buf {
uint32_t len;
diff --git a/drivers/crypto/qat/qat_device.c b/drivers/crypto/qat/qat_device.c
index ac6bd1af6..cdf4f7058 100644
--- a/drivers/crypto/qat/qat_device.c
+++ b/drivers/crypto/qat/qat_device.c
@@ -4,6 +4,21 @@
 
 #include "qat_device.h"
 #include "adf_transport_access_macros.h"
+#include "qat_qp.h"
+
+/* Hardware device information per generation */
+__extension__
+struct qat_gen_hw_data qp_gen_config[] =  {
+   [QAT_GEN1] = {
+   .dev_gen = QAT_GEN1,
+   .qp_hw_data = qat_gen1_qps,
+   },
+   [QAT_GEN2] = {
+   .dev_gen = QAT_GEN2,
+   .qp_hw_data = qat_gen1_qps,
+   /* gen2 has same ring layout as gen1 */
+   },
+};
 
 int qat_dev_config(__rte_unused struct rte_cryptodev *dev,
__rte_unused struct rte_cryptodev_config *config)
@@ -42,12 +57,14 @@ void qat_dev_info_get(struct rte_cryptodev *dev,
struct rte_cryptodev_info *info)
 {
struct qat_pmd_private *internals = dev->data->dev_private;
+   const struct qat_qp_hw_data *sym_hw_qps =
+   qp_gen_config[internals->qat_dev_gen]
+ .qp_hw_data[QAT_SERVICE_SYMMETRIC];
 
PMD_INIT_FUNC_TRACE();
if (info != NULL) {
info->max_nb_queue_pairs =
-   ADF_NUM_SYM_QPS_PER_BUNDLE *
-   ADF_NUM_BUNDLES_PER_DEV;
+   qat_qps_per_service(sym_hw_qps, QAT_SERVICE_SYMMETRIC);
info->feature_flags = dev->feature_flags;
info->capabilities = internals->qat_dev_capabilities;
info->sym.max_nb_sessions = internals->max_nb_sessions;
diff --git a/drivers/crypto/qat/qat_device.h b/drivers/crypto/qat/qat_device.h
index 64706abae..0983e3c2e 100644
--- a/drivers/crypto/qat/qat_device.h
+++ b/drivers/crypto/qat/qat_device.h
@@ -8,6 +8,8 @@
 #include 
 #include "qat_common.h"
 #include "qat_logs.h"
+#include "adf_transport_access_macros.h"
+#include "qat_qp.h"
 
 extern uint8_t cryptodev_qat_driver_id;
 
@@ -34,6 +36,13 @@ struct qat_pmd_private {
/**< Device ID for this instance */
 };
 
+struct qat_gen_hw_data {
+   enum qat_device_gen dev_gen;
+   const struct qat_qp_hw_data (*qp_hw_data)[ADF_MAX_QPS_PER_BUNDLE];
+};
+
+extern struct qat_gen_hw_data qp_gen_config[];
+
 int qat_dev_config(struct rte_cryptodev *dev,
struct rte_cryptodev_config *config);
 int qat_dev_start(struct rte_cryptodev *dev);
dif

[dpdk-dev] [PATCH v3 14/38] crypto/qat: move defines from sym to qp header file

[Tomasz Jozwiak]

From: Fiona Trahe 

Move defines related to coalescing from sym header file to qp header
file as these will be common for all services.

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_qp.h  | 7 +++
 drivers/crypto/qat/qat_sym.h | 7 ---
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/qat/qat_qp.h b/drivers/crypto/qat/qat_qp.h
index 7bd8fdcec..8cf072c55 100644
--- a/drivers/crypto/qat/qat_qp.h
+++ b/drivers/crypto/qat/qat_qp.h
@@ -7,6 +7,13 @@
 #include "qat_common.h"
 #include "qat_device.h"
 
+#define QAT_CSR_HEAD_WRITE_THRESH 32U
+/* number of requests to accumulate before writing head CSR */
+#define QAT_CSR_TAIL_WRITE_THRESH 32U
+/* number of requests to accumulate before writing tail CSR */
+#define QAT_CSR_TAIL_FORCE_WRITE_THRESH 256U
+/* number of inflights below which no tail write coalescing should occur */
+
 typedef int (*build_request_t)(void *op,
uint8_t *req, void *op_cookie,
enum qat_device_gen qat_dev_gen);
diff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h
index 39574eeb6..b92ec72de 100644
--- a/drivers/crypto/qat/qat_sym.h
+++ b/drivers/crypto/qat/qat_sym.h
@@ -20,13 +20,6 @@
(((num) + (align) - 1) & ~((align) - 1))
 #define QAT_64_BTYE_ALIGN_MASK (~0x3f)
 
-#define QAT_CSR_HEAD_WRITE_THRESH 32U
-/* number of requests to accumulate before writing head CSR */
-#define QAT_CSR_TAIL_WRITE_THRESH 32U
-/* number of requests to accumulate before writing tail CSR */
-#define QAT_CSR_TAIL_FORCE_WRITE_THRESH 256U
-/* number of inflights below which no tail write coalescing should occur */
-
 struct qat_sym_session;
 
 int
-- 
2.17.0

[dpdk-dev] [PATCH v3 19/38] crypto/qat: use generic driver name for PCI registration

[Tomasz Jozwiak]

From: Fiona Trahe 

The QAT PMD used to register with PCI using the name "crypto_qat".
Keep this name for the driver registered with cryptodev
and use a more generic name "qat" for the PCI registration.
This paves the way for the PCI device to host other services.

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_common.h|  2 ++
 drivers/crypto/qat/rte_qat_cryptodev.c | 25 ++---
 2 files changed, 20 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/qat/qat_common.h b/drivers/crypto/qat/qat_common.h
index 77ffc8f72..63e5569ea 100644
--- a/drivers/crypto/qat/qat_common.h
+++ b/drivers/crypto/qat/qat_common.h
@@ -11,6 +11,8 @@
 /**< Intel(R) QAT Symmetric Crypto PMD device name */
 #define CRYPTODEV_NAME_QAT_SYM_PMD crypto_qat
 
+/**< Intel(R) QAT device name for PCI registration */
+#define QAT_PCI_NAME   qat
 /*
  * Maximum number of SGL entries
  */
diff --git a/drivers/crypto/qat/rte_qat_cryptodev.c 
b/drivers/crypto/qat/rte_qat_cryptodev.c
index 6ab870cad..ad8a56374 100644
--- a/drivers/crypto/qat/rte_qat_cryptodev.c
+++ b/drivers/crypto/qat/rte_qat_cryptodev.c
@@ -234,16 +234,27 @@ static int qat_pci_remove(struct rte_pci_device *pci_dev)
 
 }
 
+
+/* An rte_driver is needed in the registration of both the device and the 
driver
+ * with cryptodev.
+ * The actual qat pci's rte_driver can't be used as its name represents
+ * the whole pci device with all services. Think of this as a holder for a name
+ * for the crypto part of the pci device.
+ */
+static const char qat_sym_drv_name[] = RTE_STR(CRYPTODEV_NAME_QAT_SYM_PMD);
+static struct rte_driver cryptodev_qat_sym_driver = {
+   .name = qat_sym_drv_name,
+   .alias = qat_sym_drv_name
+};
+static struct cryptodev_driver qat_crypto_drv;
+RTE_PMD_REGISTER_CRYPTO_DRIVER(qat_crypto_drv, cryptodev_qat_sym_driver,
+   cryptodev_qat_driver_id);
+
 static struct rte_pci_driver rte_qat_pmd = {
.id_table = pci_id_qat_map,
.drv_flags = RTE_PCI_DRV_NEED_MAPPING,
.probe = qat_pci_probe,
.remove = qat_pci_remove
 };
-
-static struct cryptodev_driver qat_crypto_drv;
-
-RTE_PMD_REGISTER_PCI(CRYPTODEV_NAME_QAT_SYM_PMD, rte_qat_pmd);
-RTE_PMD_REGISTER_PCI_TABLE(CRYPTODEV_NAME_QAT_SYM_PMD, pci_id_qat_map);
-RTE_PMD_REGISTER_CRYPTO_DRIVER(qat_crypto_drv, rte_qat_pmd.driver,
-   cryptodev_qat_driver_id);
+RTE_PMD_REGISTER_PCI(QAT_PCI_NAME, rte_qat_pmd);
+RTE_PMD_REGISTER_PCI_TABLE(QAT_PCI_NAME, pci_id_qat_map);
-- 
2.17.0

[dpdk-dev] [PATCH v3 16/38] crypto/qat: rename sgl related objects

[Tomasz Jozwiak]

From: Fiona Trahe 

Change SGL (Scatter-Gather List) related structs and member names

Signed-off-by: ArkadiuszX Kusztal 
---
 drivers/crypto/qat/qat_common.h | 10 +-
 drivers/crypto/qat/qat_sym.c| 28 ++--
 2 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/crypto/qat/qat_common.h b/drivers/crypto/qat/qat_common.h
index c3e7bd9a7..193639550 100644
--- a/drivers/crypto/qat/qat_common.h
+++ b/drivers/crypto/qat/qat_common.h
@@ -32,22 +32,22 @@ enum qat_service_type {
 #define QAT_MAX_SERVICES   (QAT_SERVICE_INVALID)
 
 /**< Common struct for scatter-gather list operations */
-struct qat_alg_buf {
+struct qat_flat_buf {
uint32_t len;
uint32_t resrvd;
uint64_t addr;
 } __rte_packed;
 
-struct qat_alg_buf_list {
+struct qat_sgl {
uint64_t resrvd;
uint32_t num_bufs;
uint32_t num_mapped_bufs;
-   struct qat_alg_buf bufers[QAT_SGL_MAX_NUMBER];
+   struct qat_flat_buf buffers[QAT_SGL_MAX_NUMBER];
 } __rte_packed __rte_cache_aligned;
 
 struct qat_sym_op_cookie {
-   struct qat_alg_buf_list qat_sgl_list_src;
-   struct qat_alg_buf_list qat_sgl_list_dst;
+   struct qat_sgl qat_sgl_src;
+   struct qat_sgl qat_sgl_dst;
phys_addr_t qat_sgl_src_phys_addr;
phys_addr_t qat_sgl_dst_phys_addr;
 };
diff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c
index e448dc859..a9beff064 100644
--- a/drivers/crypto/qat/qat_sym.c
+++ b/drivers/crypto/qat/qat_sym.c
@@ -250,20 +250,20 @@ qat_sym_pmd_dequeue_op_burst(void *qp, struct 
rte_crypto_op **ops,
 
 static inline int
 qat_sgl_fill_array(struct rte_mbuf *buf, uint64_t buff_start,
-   struct qat_alg_buf_list *list, uint32_t data_len)
+   struct qat_sgl *list, uint32_t data_len)
 {
int nr = 1;
 
uint32_t buf_len = rte_pktmbuf_iova(buf) -
buff_start + rte_pktmbuf_data_len(buf);
 
-   list->bufers[0].addr = buff_start;
-   list->bufers[0].resrvd = 0;
-   list->bufers[0].len = buf_len;
+   list->buffers[0].addr = buff_start;
+   list->buffers[0].resrvd = 0;
+   list->buffers[0].len = buf_len;
 
if (data_len <= buf_len) {
list->num_bufs = nr;
-   list->bufers[0].len = data_len;
+   list->buffers[0].len = data_len;
return 0;
}
 
@@ -276,15 +276,15 @@ qat_sgl_fill_array(struct rte_mbuf *buf, uint64_t 
buff_start,
return -EINVAL;
}
 
-   list->bufers[nr].len = rte_pktmbuf_data_len(buf);
-   list->bufers[nr].resrvd = 0;
-   list->bufers[nr].addr = rte_pktmbuf_iova(buf);
+   list->buffers[nr].len = rte_pktmbuf_data_len(buf);
+   list->buffers[nr].resrvd = 0;
+   list->buffers[nr].addr = rte_pktmbuf_iova(buf);
 
-   buf_len += list->bufers[nr].len;
+   buf_len += list->buffers[nr].len;
buf = buf->next;
 
if (buf_len > data_len) {
-   list->bufers[nr].len -=
+   list->buffers[nr].len -=
buf_len - data_len;
buf = NULL;
}
@@ -695,7 +695,7 @@ qat_sym_build_request(void *in_op, uint8_t *out_msg,
ICP_QAT_FW_COMN_PTR_TYPE_SET(qat_req->comn_hdr.comn_req_flags,
QAT_COMN_PTR_TYPE_SGL);
ret = qat_sgl_fill_array(op->sym->m_src, src_buf_start,
-   &cookie->qat_sgl_list_src,
+   &cookie->qat_sgl_src,
qat_req->comn_mid.src_length);
if (ret) {
PMD_DRV_LOG(ERR, "QAT PMD Cannot fill sgl array");
@@ -709,7 +709,7 @@ qat_sym_build_request(void *in_op, uint8_t *out_msg,
else {
ret = qat_sgl_fill_array(op->sym->m_dst,
dst_buf_start,
-   &cookie->qat_sgl_list_dst,
+   &cookie->qat_sgl_dst,
qat_req->comn_mid.dst_length);
 
if (ret) {
@@ -859,12 +859,12 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t 
qp_id,
sql_cookie->qat_sgl_src_phys_addr =
rte_mempool_virt2iova(sql_cookie) +
offsetof(struct qat_sym_op_cookie,
-   qat_sgl_list_src);
+   qat_sgl_src);
 
sql_cookie->qat_sgl_dst_phys_addr =
rte_mempool_virt2iova(sql_cookie) +
offsetof(struct qat_sym_op_cookie,
-   qat_sgl_list_dst);
+   qat_sgl_dst);
}
 
return

[dpdk-dev] [PATCH v3 17/38] crypto/qat: move sgl related element to appropriate files

[Tomasz Jozwiak]

From: Fiona Trahe 

Move SGL (Scatter-Gather List) related functions to common file
Move qat_sym_op_cookie struct to sym header file

Signed-off-by: ArkadiuszX Kusztal 
Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/Makefile |  1 +
 drivers/crypto/qat/meson.build  |  1 +
 drivers/crypto/qat/qat_common.c | 53 +
 drivers/crypto/qat/qat_common.h | 11 ---
 drivers/crypto/qat/qat_sym.c| 47 -
 drivers/crypto/qat/qat_sym.h|  7 +
 6 files changed, 67 insertions(+), 53 deletions(-)
 create mode 100644 drivers/crypto/qat/qat_common.c

diff --git a/drivers/crypto/qat/Makefile b/drivers/crypto/qat/Makefile
index 8cb802b9d..902c47ff4 100644
--- a/drivers/crypto/qat/Makefile
+++ b/drivers/crypto/qat/Makefile
@@ -25,6 +25,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_sym.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_device.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_qp.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_sym_session.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_common.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += rte_qat_cryptodev.c
 
 # export include files
diff --git a/drivers/crypto/qat/meson.build b/drivers/crypto/qat/meson.build
index e596006da..12910c377 100644
--- a/drivers/crypto/qat/meson.build
+++ b/drivers/crypto/qat/meson.build
@@ -7,6 +7,7 @@ if not dep.found()
 endif
 sources = files('qat_sym.c', 'qat_qp.c',
'qat_sym_session.c',
+   'qat_common.c',
'rte_qat_cryptodev.c',
'qat_device.c')
 includes += include_directories('qat_adf')
diff --git a/drivers/crypto/qat/qat_common.c b/drivers/crypto/qat/qat_common.c
new file mode 100644
index 0..a8865904f
--- /dev/null
+++ b/drivers/crypto/qat/qat_common.c
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Intel Corporation
+ */
+
+#include "qat_common.h"
+#include "qat_logs.h"
+
+int
+qat_sgl_fill_array(struct rte_mbuf *buf, uint64_t buf_start,
+   struct qat_sgl *list, uint32_t data_len)
+{
+   int nr = 1;
+
+   uint32_t buf_len = rte_pktmbuf_iova(buf) -
+   buf_start + rte_pktmbuf_data_len(buf);
+
+   list->buffers[0].addr = buf_start;
+   list->buffers[0].resrvd = 0;
+   list->buffers[0].len = buf_len;
+
+   if (data_len <= buf_len) {
+   list->num_bufs = nr;
+   list->buffers[0].len = data_len;
+   return 0;
+   }
+
+   buf = buf->next;
+   while (buf) {
+   if (unlikely(nr == QAT_SGL_MAX_NUMBER)) {
+   PMD_DRV_LOG(ERR,
+   "QAT PMD exceeded size of QAT SGL entry(%u)",
+   QAT_SGL_MAX_NUMBER);
+   return -EINVAL;
+   }
+
+   list->buffers[nr].len = rte_pktmbuf_data_len(buf);
+   list->buffers[nr].resrvd = 0;
+   list->buffers[nr].addr = rte_pktmbuf_iova(buf);
+
+   buf_len += list->buffers[nr].len;
+   buf = buf->next;
+
+   if (buf_len > data_len) {
+   list->buffers[nr].len -=
+   buf_len - data_len;
+   buf = NULL;
+   }
+   ++nr;
+   }
+   list->num_bufs = nr;
+
+   return 0;
+}
diff --git a/drivers/crypto/qat/qat_common.h b/drivers/crypto/qat/qat_common.h
index 193639550..77ffc8f72 100644
--- a/drivers/crypto/qat/qat_common.h
+++ b/drivers/crypto/qat/qat_common.h
@@ -6,6 +6,8 @@
 
 #include 
 
+#include 
+
 /**< Intel(R) QAT Symmetric Crypto PMD device name */
 #define CRYPTODEV_NAME_QAT_SYM_PMD crypto_qat
 
@@ -45,11 +47,8 @@ struct qat_sgl {
struct qat_flat_buf buffers[QAT_SGL_MAX_NUMBER];
 } __rte_packed __rte_cache_aligned;
 
-struct qat_sym_op_cookie {
-   struct qat_sgl qat_sgl_src;
-   struct qat_sgl qat_sgl_dst;
-   phys_addr_t qat_sgl_src_phys_addr;
-   phys_addr_t qat_sgl_dst_phys_addr;
-};
+int
+qat_sgl_fill_array(struct rte_mbuf *buf, uint64_t buf_start,
+   struct qat_sgl *list, uint32_t data_len);
 
 #endif /* _QAT_COMMON_H_ */
diff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c
index a9beff064..b74dfa634 100644
--- a/drivers/crypto/qat/qat_sym.c
+++ b/drivers/crypto/qat/qat_sym.c
@@ -248,53 +248,6 @@ qat_sym_pmd_dequeue_op_burst(void *qp, struct 
rte_crypto_op **ops,
return qat_dequeue_op_burst(qp, (void **)ops, nb_ops);
 }
 
-static inline int
-qat_sgl_fill_array(struct rte_mbuf *buf, uint64_t buff_start,
-   struct qat_sgl *list, uint32_t data_len)
-{
-   int nr = 1;
-
-   uint32_t buf_len = rte_pktmbuf_iova(buf) -
-   buff_start + rte_pktmbuf_data_len(buf);
-
-   list->buffers[0].addr = buff_start;
-   list->buffers[0].resrvd = 0;
-   list->buffers[0].len = buf_len;
-
-   if (data_len <= buf_len) {
-   list->num_bufs = nr;
-  

[dpdk-dev] [PATCH v3 21/38] crypto/qat: use common stats structures

[Tomasz Jozwiak]

From: Fiona Trahe 

Split qat_sym_stats_get/reset into 2 functions, a wrapper function calling
a new qat_stats_get/reset function which can be called per service.
Remove cryptodev stats struct from qat_qp, replace with qat_common_stats.
Add links for qat_qp into qat_pci_device using an array per service to
avoid need for a lock and so qp_id for the service can be used as index.

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_common.h | 13 +
 drivers/crypto/qat/qat_device.c |  1 +
 drivers/crypto/qat/qat_device.h |  3 ++
 drivers/crypto/qat/qat_qp.h |  2 +-
 drivers/crypto/qat/qat_sym.c| 86 -
 5 files changed, 91 insertions(+), 14 deletions(-)

diff --git a/drivers/crypto/qat/qat_common.h b/drivers/crypto/qat/qat_common.h
index 63e5569ea..fcf5c4c09 100644
--- a/drivers/crypto/qat/qat_common.h
+++ b/drivers/crypto/qat/qat_common.h
@@ -49,6 +49,19 @@ struct qat_sgl {
struct qat_flat_buf buffers[QAT_SGL_MAX_NUMBER];
 } __rte_packed __rte_cache_aligned;
 
+/** Common, i.e. not service-specific, statistics */
+struct qat_common_stats {
+   uint64_t enqueued_count;
+   /**< Count of all operations enqueued */
+   uint64_t dequeued_count;
+   /**< Count of all operations dequeued */
+
+   uint64_t enqueue_err_count;
+   /**< Total error count on operations enqueued */
+   uint64_t dequeue_err_count;
+   /**< Total error count on operations dequeued */
+};
+
 int
 qat_sgl_fill_array(struct rte_mbuf *buf, uint64_t buf_start,
struct qat_sgl *list, uint32_t data_len);
diff --git a/drivers/crypto/qat/qat_device.c b/drivers/crypto/qat/qat_device.c
index 8ad3162e1..4dfbc84c8 100644
--- a/drivers/crypto/qat/qat_device.c
+++ b/drivers/crypto/qat/qat_device.c
@@ -148,6 +148,7 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev)
}
 
qat_dev = qat_pci_get_dev(qat_dev_id);
+   memset(qat_dev, 0, sizeof(*qat_dev));
snprintf(qat_dev->name, QAT_DEV_NAME_MAX_LEN, "%s", name);
qat_dev->qat_dev_id = qat_dev_id;
qat_dev->pci_dev = pci_dev;
diff --git a/drivers/crypto/qat/qat_device.h b/drivers/crypto/qat/qat_device.h
index 855bf6c1c..d1615e2a7 100644
--- a/drivers/crypto/qat/qat_device.h
+++ b/drivers/crypto/qat/qat_device.h
@@ -50,6 +50,9 @@ struct qat_pci_device {
uint8_t attached : 1;
/**< Flag indicating the device is attached */
 
+   struct qat_qp *qps_in_use[QAT_MAX_SERVICES][ADF_MAX_QPS_PER_BUNDLE];
+   /**< links to qps set up for each service, index same as on API */
+
/* Data relating to symmetric crypto service */
struct qat_sym_dev_private *sym_dev;
/**< link back to cryptodev private data */
diff --git a/drivers/crypto/qat/qat_qp.h b/drivers/crypto/qat/qat_qp.h
index d482d5732..49d9f29d3 100644
--- a/drivers/crypto/qat/qat_qp.h
+++ b/drivers/crypto/qat/qat_qp.h
@@ -78,7 +78,7 @@ struct qat_qp {
uint16_tinflights16;
struct  qat_queue   tx_q;
struct  qat_queue   rx_q;
-   struct  rte_cryptodev_stats stats;
+   struct  qat_common_stats stats;
struct rte_mempool *op_cookie_pool;
void **op_cookies;
uint32_t nb_descriptors;
diff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c
index e77fbe4c4..8007e25d6 100644
--- a/drivers/crypto/qat/qat_sym.c
+++ b/drivers/crypto/qat/qat_sym.c
@@ -717,20 +717,24 @@ qat_sym_build_request(void *in_op, uint8_t *out_msg,
 }
 
 
-void qat_sym_stats_get(struct rte_cryptodev *dev,
-   struct rte_cryptodev_stats *stats)
+static void qat_stats_get(struct qat_pci_device *dev,
+   struct qat_common_stats *stats,
+   enum qat_service_type service)
 {
int i;
-   struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
+   struct qat_qp **qp;
 
-   PMD_INIT_FUNC_TRACE();
-   if (stats == NULL) {
-   PMD_DRV_LOG(ERR, "invalid stats ptr NULL");
+   if (stats == NULL || dev == NULL || service >= QAT_SERVICE_INVALID) {
+   PMD_DRV_LOG(ERR, "invalid param: stats %p, dev %p, service %d",
+   stats, dev, service);
return;
}
-   for (i = 0; i < dev->data->nb_queue_pairs; i++) {
+
+   qp = dev->qps_in_use[service];
+   for (i = 0; i < ADF_MAX_QPS_PER_BUNDLE; i++) {
if (qp[i] == NULL) {
-   PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
+   PMD_DRV_LOG(DEBUG, "Service %d Uninitialised qp %d",
+   service, i);
continue;
}
 
@@ -741,22 +745,74 @@ void qat_sym_stats_get(struct rte_cryptodev *dev,
}
 }
 
-void qat_sym_stats_reset(struct rte_cryptodev *dev)
+void qat_sym_stats_get(struct rte_cryptodev *dev,
+   struct rte_cryptodev_stats *stats)
+{
+   struct qat_common_stats qat_stats = {0};
+   struct 

[dpdk-dev] [PATCH v3 20/38] crypto/qat: move to using new device structure

[Tomasz Jozwiak]

From: Fiona Trahe 

Struct qat_pmd_private held the data needed by cryptodev, common code
now gets most data from struct qat_pci_device instead. qat_pmd_private
is trimmed to hold only sym crypto data and renamed qat_sym_private
to reflect its usage.
Specifically
 - remove max_nb_queue_pairs from qat_pmd_private, get from qp_hw_data
 - remove max_nb_sesssions from qat_pmd_private as not needed.
 - remove qat_gen from qat_pmd_private, get from qat_pci_device instead.
 - use qat_pci_device throughout common code instead of qat_pmd_private
 - rename qat_pmd_private to qat_sym_dev_private - this now holds only
   sym-specific data for the cryptodev API
 - extend pci device name to _qat for clarity, was just 
 - update qp mem and cookiepool names to reflect the appropriate device,
   service and qp.
 - rename qat_dev_info_get() to qat_sym_dev_info_get() as mostly sym,
   not enough common info to warrant a generic fn.

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_device.c| 17 +++-
 drivers/crypto/qat/qat_device.h| 37 +++---
 drivers/crypto/qat/qat_qp.c| 26 +-
 drivers/crypto/qat/qat_qp.h|  4 +--
 drivers/crypto/qat/qat_sym.c   | 11 
 drivers/crypto/qat/qat_sym.h   |  8 --
 drivers/crypto/qat/qat_sym_session.c   |  8 +++---
 drivers/crypto/qat/rte_qat_cryptodev.c | 32 +++---
 8 files changed, 65 insertions(+), 78 deletions(-)

diff --git a/drivers/crypto/qat/qat_device.c b/drivers/crypto/qat/qat_device.c
index 75af1e8bc..8ad3162e1 100644
--- a/drivers/crypto/qat/qat_device.c
+++ b/drivers/crypto/qat/qat_device.c
@@ -57,12 +57,12 @@ int qat_dev_close(struct rte_cryptodev *dev)
return 0;
 }
 
-void qat_dev_info_get(struct rte_cryptodev *dev,
+void qat_sym_dev_info_get(struct rte_cryptodev *dev,
struct rte_cryptodev_info *info)
 {
-   struct qat_pmd_private *internals = dev->data->dev_private;
+   struct qat_sym_dev_private *internals = dev->data->dev_private;
const struct qat_qp_hw_data *sym_hw_qps =
-   qp_gen_config[internals->qat_dev_gen]
+   qp_gen_config[internals->qat_dev->qat_dev_gen]
  .qp_hw_data[QAT_SERVICE_SYMMETRIC];
 
PMD_INIT_FUNC_TRACE();
@@ -71,7 +71,7 @@ void qat_dev_info_get(struct rte_cryptodev *dev,
qat_qps_per_service(sym_hw_qps, QAT_SERVICE_SYMMETRIC);
info->feature_flags = dev->feature_flags;
info->capabilities = internals->qat_dev_capabilities;
-   info->sym.max_nb_sessions = internals->max_nb_sessions;
+   info->sym.max_nb_sessions = RTE_QAT_PMD_MAX_NB_SESSIONS;
info->driver_id = cryptodev_qat_driver_id;
info->pci_dev = RTE_DEV_TO_PCI(dev->device);
}
@@ -83,6 +83,7 @@ qat_pci_get_dev(uint8_t dev_id)
 {
return &qat_pci_devices[dev_id];
 }
+
 static struct qat_pci_device *
 qat_pci_get_named_dev(const char *name)
 {
@@ -133,7 +134,7 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev)
char name[QAT_DEV_NAME_MAX_LEN];
 
rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
-
+   snprintf(name+strlen(name), QAT_DEV_NAME_MAX_LEN-strlen(name), "_qat");
if (qat_pci_get_named_dev(name) != NULL) {
PMD_DRV_LOG(ERR, "QAT device with name %s already allocated!",
name);
@@ -148,6 +149,7 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev)
 
qat_dev = qat_pci_get_dev(qat_dev_id);
snprintf(qat_dev->name, QAT_DEV_NAME_MAX_LEN, "%s", name);
+   qat_dev->qat_dev_id = qat_dev_id;
qat_dev->pci_dev = pci_dev;
switch (qat_dev->pci_dev->id.device_id) {
case 0x0443:
@@ -169,8 +171,8 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev)
 
qat_nb_pci_devices++;
 
-   PMD_DRV_LOG(DEBUG, "QAT device %d allocated, total QATs %d",
-   qat_dev_id, qat_nb_pci_devices);
+   PMD_DRV_LOG(DEBUG, "QAT device %d allocated, name %s, total QATs %d",
+   qat_dev->qat_dev_id, qat_dev->name, qat_nb_pci_devices);
 
return qat_dev;
 }
@@ -185,6 +187,7 @@ qat_pci_device_release(struct rte_pci_device *pci_dev)
return -EINVAL;
 
rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
+   snprintf(name+strlen(name), QAT_DEV_NAME_MAX_LEN-strlen(name), "_qat");
qat_dev = qat_pci_get_named_dev(name);
if (qat_dev != NULL) {
 
diff --git a/drivers/crypto/qat/qat_device.h b/drivers/crypto/qat/qat_device.h
index d83ad632c..855bf6c1c 100644
--- a/drivers/crypto/qat/qat_device.h
+++ b/drivers/crypto/qat/qat_device.h
@@ -32,30 +32,31 @@ extern int qat_sym_qp_release(struct rte_cryptodev *dev,
  *  - config data
  *  - runtime data
  */
+struct qat_sym_dev_private;
 struct qat_pci_device {
 
-   /* data used by all services 

[dpdk-dev] [PATCH v3 22/38] crypto/qat: rename functions which depend on cryptodev

[Tomasz Jozwiak]

From: Fiona Trahe 

Rename all device functions which depend on cryptodev structs.

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_device.c| 8 
 drivers/crypto/qat/qat_device.h| 8 
 drivers/crypto/qat/rte_qat_cryptodev.c | 8 
 3 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/crypto/qat/qat_device.c b/drivers/crypto/qat/qat_device.c
index 4dfbc84c8..8b2ac5a5f 100644
--- a/drivers/crypto/qat/qat_device.c
+++ b/drivers/crypto/qat/qat_device.c
@@ -24,25 +24,25 @@ struct qat_gen_hw_data qp_gen_config[] =  {
 static struct qat_pci_device qat_pci_devices[QAT_MAX_PCI_DEVICES];
 static int qat_nb_pci_devices;
 
-int qat_dev_config(__rte_unused struct rte_cryptodev *dev,
+int qat_sym_dev_config(__rte_unused struct rte_cryptodev *dev,
__rte_unused struct rte_cryptodev_config *config)
 {
PMD_INIT_FUNC_TRACE();
return 0;
 }
 
-int qat_dev_start(__rte_unused struct rte_cryptodev *dev)
+int qat_sym_dev_start(__rte_unused struct rte_cryptodev *dev)
 {
PMD_INIT_FUNC_TRACE();
return 0;
 }
 
-void qat_dev_stop(__rte_unused struct rte_cryptodev *dev)
+void qat_sym_dev_stop(__rte_unused struct rte_cryptodev *dev)
 {
PMD_INIT_FUNC_TRACE();
 }
 
-int qat_dev_close(struct rte_cryptodev *dev)
+int qat_sym_dev_close(struct rte_cryptodev *dev)
 {
int i, ret;
 
diff --git a/drivers/crypto/qat/qat_device.h b/drivers/crypto/qat/qat_device.h
index d1615e2a7..5424a9a94 100644
--- a/drivers/crypto/qat/qat_device.h
+++ b/drivers/crypto/qat/qat_device.h
@@ -84,11 +84,11 @@ struct qat_gen_hw_data {
 
 extern struct qat_gen_hw_data qp_gen_config[];
 
-int qat_dev_config(struct rte_cryptodev *dev,
+int qat_sym_dev_config(struct rte_cryptodev *dev,
struct rte_cryptodev_config *config);
-int qat_dev_start(struct rte_cryptodev *dev);
-void qat_dev_stop(struct rte_cryptodev *dev);
-int qat_dev_close(struct rte_cryptodev *dev);
+int qat_sym_dev_start(struct rte_cryptodev *dev);
+void qat_sym_dev_stop(struct rte_cryptodev *dev);
+int qat_sym_dev_close(struct rte_cryptodev *dev);
 void qat_sym_dev_info_get(struct rte_cryptodev *dev,
struct rte_cryptodev_info *info);
 
diff --git a/drivers/crypto/qat/rte_qat_cryptodev.c 
b/drivers/crypto/qat/rte_qat_cryptodev.c
index 6d807177e..91bb1e590 100644
--- a/drivers/crypto/qat/rte_qat_cryptodev.c
+++ b/drivers/crypto/qat/rte_qat_cryptodev.c
@@ -29,10 +29,10 @@ static const struct rte_cryptodev_capabilities 
qat_gen2_sym_capabilities[] = {
 static struct rte_cryptodev_ops crypto_qat_ops = {
 
/* Device related operations */
-   .dev_configure  = qat_dev_config,
-   .dev_start  = qat_dev_start,
-   .dev_stop   = qat_dev_stop,
-   .dev_close  = qat_dev_close,
+   .dev_configure  = qat_sym_dev_config,
+   .dev_start  = qat_sym_dev_start,
+   .dev_stop   = qat_sym_dev_stop,
+   .dev_close  = qat_sym_dev_close,
.dev_infos_get  = qat_sym_dev_info_get,
 
.stats_get  = qat_sym_stats_get,
-- 
2.17.0

[dpdk-dev] [PATCH v3 18/38] crypto/qat: add QAT PCI device struct

[Tomasz Jozwiak]

From: Fiona Trahe 

- Added struct qat_pci_device to use internally in QAT PMD
   to avoid dependencies on rte_cryptodev or rte_compressdev
 - Added a global array of these
 - Restructured probe/release to separate QAT common init/clear
   from crypto pmd create/destroy.
 - In QAT common part allocated a qat_pci_device and populated it
 - Removed meaningless check in probe for RTE_PROC_PRIMARY

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_device.c| 127 ++
 drivers/crypto/qat/qat_device.h|  60 ++-
 drivers/crypto/qat/rte_qat_cryptodev.c | 140 ++---
 3 files changed, 286 insertions(+), 41 deletions(-)

diff --git a/drivers/crypto/qat/qat_device.c b/drivers/crypto/qat/qat_device.c
index cdf4f7058..75af1e8bc 100644
--- a/drivers/crypto/qat/qat_device.c
+++ b/drivers/crypto/qat/qat_device.c
@@ -20,6 +20,10 @@ struct qat_gen_hw_data qp_gen_config[] =  {
},
 };
 
+
+static struct qat_pci_device qat_pci_devices[QAT_MAX_PCI_DEVICES];
+static int qat_nb_pci_devices;
+
 int qat_dev_config(__rte_unused struct rte_cryptodev *dev,
__rte_unused struct rte_cryptodev_config *config)
 {
@@ -72,3 +76,126 @@ void qat_dev_info_get(struct rte_cryptodev *dev,
info->pci_dev = RTE_DEV_TO_PCI(dev->device);
}
 }
+
+
+static struct qat_pci_device *
+qat_pci_get_dev(uint8_t dev_id)
+{
+   return &qat_pci_devices[dev_id];
+}
+static struct qat_pci_device *
+qat_pci_get_named_dev(const char *name)
+{
+   struct qat_pci_device *dev;
+   unsigned int i;
+
+   if (name == NULL)
+   return NULL;
+
+   for (i = 0; i < QAT_MAX_PCI_DEVICES; i++) {
+   dev = &qat_pci_devices[i];
+
+   if ((dev->attached == QAT_ATTACHED) &&
+   (strcmp(dev->name, name) == 0))
+   return dev;
+   }
+
+   return NULL;
+}
+
+static uint8_t
+qat_pci_find_free_device_index(void)
+{
+   uint8_t dev_id;
+
+   for (dev_id = 0; dev_id < QAT_MAX_PCI_DEVICES; dev_id++) {
+   if (qat_pci_devices[dev_id].attached == QAT_DETACHED)
+   break;
+   }
+   return dev_id;
+}
+
+struct qat_pci_device *
+qat_get_qat_dev_from_pci_dev(struct rte_pci_device *pci_dev)
+{
+   char name[QAT_DEV_NAME_MAX_LEN];
+
+   rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
+
+   return qat_pci_get_named_dev(name);
+}
+
+struct qat_pci_device *
+qat_pci_device_allocate(struct rte_pci_device *pci_dev)
+{
+   struct qat_pci_device *qat_dev;
+   uint8_t qat_dev_id;
+   char name[QAT_DEV_NAME_MAX_LEN];
+
+   rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
+
+   if (qat_pci_get_named_dev(name) != NULL) {
+   PMD_DRV_LOG(ERR, "QAT device with name %s already allocated!",
+   name);
+   return NULL;
+   }
+
+   qat_dev_id = qat_pci_find_free_device_index();
+   if (qat_dev_id == QAT_MAX_PCI_DEVICES) {
+   PMD_DRV_LOG(ERR, "Reached maximum number of QAT devices");
+   return NULL;
+   }
+
+   qat_dev = qat_pci_get_dev(qat_dev_id);
+   snprintf(qat_dev->name, QAT_DEV_NAME_MAX_LEN, "%s", name);
+   qat_dev->pci_dev = pci_dev;
+   switch (qat_dev->pci_dev->id.device_id) {
+   case 0x0443:
+   qat_dev->qat_dev_gen = QAT_GEN1;
+   break;
+   case 0x37c9:
+   case 0x19e3:
+   case 0x6f55:
+   qat_dev->qat_dev_gen = QAT_GEN2;
+   break;
+   default:
+   PMD_DRV_LOG(ERR, "Invalid dev_id, can't determine generation");
+   return NULL;
+   }
+
+   rte_spinlock_init(&qat_dev->arb_csr_lock);
+
+   qat_dev->attached = QAT_ATTACHED;
+
+   qat_nb_pci_devices++;
+
+   PMD_DRV_LOG(DEBUG, "QAT device %d allocated, total QATs %d",
+   qat_dev_id, qat_nb_pci_devices);
+
+   return qat_dev;
+}
+
+int
+qat_pci_device_release(struct rte_pci_device *pci_dev)
+{
+   struct qat_pci_device *qat_dev;
+   char name[QAT_DEV_NAME_MAX_LEN];
+
+   if (pci_dev == NULL)
+   return -EINVAL;
+
+   rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
+   qat_dev = qat_pci_get_named_dev(name);
+   if (qat_dev != NULL) {
+
+   /* Check that there are no service devs still on pci device */
+   if (qat_dev->sym_dev != NULL)
+   return -EBUSY;
+
+   qat_dev->attached = QAT_DETACHED;
+   qat_nb_pci_devices--;
+   }
+   PMD_DRV_LOG(DEBUG, "QAT device %s released, total QATs %d",
+   name, qat_nb_pci_devices);
+   return 0;
+}
diff --git a/drivers/crypto/qat/qat_device.h b/drivers/crypto/qat/qat_device.h
index 0983e3c2e..d83ad632c 100644
--- a/drivers/crypto/qat/qat_device.h
+++ b/drivers/crypto/qat/qat_device.h
@@ -11,15 +11,58 @@
 #i

[dpdk-dev] [PATCH v3 24/38] crypto/qat: add lock around csr access and change logic

[Tomasz Jozwiak]

From: Fiona Trahe 

Add lock around accesses to the arbiter CSR
and use & instead of ^ as ^ not safe if
arb_disable called when already disabled.

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_qp.c | 26 +++---
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index 7b2dc3f90..f26fd0900 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -107,8 +107,10 @@ static int qat_queue_create(struct qat_pci_device *qat_dev,
 static int adf_verify_queue_size(uint32_t msg_size, uint32_t msg_num,
uint32_t *queue_size_for_csr);
 static void adf_configure_queues(struct qat_qp *queue);
-static void adf_queue_arb_enable(struct qat_queue *txq, void *base_addr);
-static void adf_queue_arb_disable(struct qat_queue *txq, void *base_addr);
+static void adf_queue_arb_enable(struct qat_queue *txq, void *base_addr,
+   rte_spinlock_t *lock);
+static void adf_queue_arb_disable(struct qat_queue *txq, void *base_addr,
+   rte_spinlock_t *lock);
 
 
 int qat_qps_per_service(const struct qat_qp_hw_data *qp_hw_data,
@@ -216,7 +218,8 @@ int qat_qp_setup(struct qat_pci_device *qat_dev,
}
 
adf_configure_queues(qp);
-   adf_queue_arb_enable(&qp->tx_q, qp->mmap_bar_addr);
+   adf_queue_arb_enable(&qp->tx_q, qp->mmap_bar_addr,
+   &qat_dev->arb_csr_lock);
 
snprintf(op_cookie_pool_name, RTE_RING_NAMESIZE,
"%s%d_cookies_%s_qp%hu",
@@ -282,7 +285,8 @@ int qat_qp_release(struct qat_qp **qp_addr)
return -EAGAIN;
}
 
-   adf_queue_arb_disable(&(qp->tx_q), qp->mmap_bar_addr);
+   adf_queue_arb_disable(&(qp->tx_q), qp->mmap_bar_addr,
+   &qp->qat_dev->arb_csr_lock);
 
for (i = 0; i < qp->nb_descriptors; i++)
rte_mempool_put(qp->op_cookie_pool, qp->op_cookies[i]);
@@ -443,7 +447,8 @@ static int adf_verify_queue_size(uint32_t msg_size, 
uint32_t msg_num,
return -EINVAL;
 }
 
-static void adf_queue_arb_enable(struct qat_queue *txq, void *base_addr)
+static void adf_queue_arb_enable(struct qat_queue *txq, void *base_addr,
+   rte_spinlock_t *lock)
 {
uint32_t arb_csr_offset =  ADF_ARB_RINGSRVARBEN_OFFSET +
(ADF_ARB_REG_SLOT *
@@ -451,12 +456,16 @@ static void adf_queue_arb_enable(struct qat_queue *txq, 
void *base_addr)
uint32_t value;
 
PMD_INIT_FUNC_TRACE();
+
+   rte_spinlock_lock(lock);
value = ADF_CSR_RD(base_addr, arb_csr_offset);
value |= (0x01 << txq->hw_queue_number);
ADF_CSR_WR(base_addr, arb_csr_offset, value);
+   rte_spinlock_unlock(lock);
 }
 
-static void adf_queue_arb_disable(struct qat_queue *txq, void *base_addr)
+static void adf_queue_arb_disable(struct qat_queue *txq, void *base_addr,
+   rte_spinlock_t *lock)
 {
uint32_t arb_csr_offset =  ADF_ARB_RINGSRVARBEN_OFFSET +
(ADF_ARB_REG_SLOT *
@@ -464,9 +473,12 @@ static void adf_queue_arb_disable(struct qat_queue *txq, 
void *base_addr)
uint32_t value;
 
PMD_INIT_FUNC_TRACE();
+
+   rte_spinlock_lock(lock);
value = ADF_CSR_RD(base_addr, arb_csr_offset);
-   value ^= (0x01 << txq->hw_queue_number);
+   value &= ~(0x01 << txq->hw_queue_number);
ADF_CSR_WR(base_addr, arb_csr_offset, value);
+   rte_spinlock_unlock(lock);
 }
 
 static void adf_configure_queues(struct qat_qp *qp)
-- 
2.17.0

[dpdk-dev] [PATCH v3 23/38] crypto/qat: move code into appropriate files

[Tomasz Jozwiak]

From: Fiona Trahe 

Move all code into appropriate files, no actual code changes. Specifically:
 - Rename rte_qat_cryptodev.c to qat_sym_pmd.c
 - Create qat_sym_pmd.h and populate with fn prototypes for qat_sym_pmd.c
 - Create qat_comp_pmd.c/.h and populate with placeholder functions
 - Create qat_asym_pmd.c/.h and populate with placeholder functions
 - Rename qat_crypto_capabilities.h to qat_sym_capabilities.h
 - Move CRYPTODEV_NAME_QAT_SYM_PMD from qat_common.h to qat_sym_pmd.h
 - Move qat_sym_dev_private from qat_device.h to qat_sym_pmd.h
 - Move prototype for qat_sym_dev_info_get frm qat_device.h 2 qat_sym_pmd.h
 - Move all qat_device.c sym dev_ops fns to qat_sym_pmd.c file
 - Move all qat_sym.c dev_ops fns to qat_sym_pmd.c file
 - Remove unused header file #includes from all files.
 - Move pci_id_qat_map, probe/release/register from
   rte_qat_cryptodev.c to qat_device.c
 - Moved stray comment for bpi_cipher_ctx_init() from qat_sym.c
   to qat_sym_session.c
 - Changed all files to use SPDX license header

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/Makefile   |   4 +-
 drivers/crypto/qat/meson.build|  11 +-
 drivers/crypto/qat/qat_asym_pmd.c |  17 +
 drivers/crypto/qat/qat_asym_pmd.h |  15 +
 drivers/crypto/qat/qat_common.c   |  54 +++
 drivers/crypto/qat/qat_common.h   |  15 +-
 drivers/crypto/qat/qat_comp_pmd.c |  18 +
 drivers/crypto/qat/qat_comp_pmd.h |  29 ++
 drivers/crypto/qat/qat_device.c   | 141 +---
 drivers/crypto/qat/qat_device.h   |  31 +-
 drivers/crypto/qat/qat_qp.c   |   2 +-
 drivers/crypto/qat/qat_qp.h   |   9 +-
 drivers/crypto/qat/qat_sym.c  | 246 ++---
 drivers/crypto/qat/qat_sym.h  |  28 +-
 ..._capabilities.h => qat_sym_capabilities.h} |   6 +-
 drivers/crypto/qat/qat_sym_pmd.c  | 326 ++
 drivers/crypto/qat/qat_sym_pmd.h  |  39 +++
 drivers/crypto/qat/qat_sym_session.c  |  17 +-
 drivers/crypto/qat/qat_sym_session.h  |   2 +-
 drivers/crypto/qat/rte_qat_cryptodev.c| 258 --
 20 files changed, 665 insertions(+), 603 deletions(-)
 create mode 100644 drivers/crypto/qat/qat_asym_pmd.c
 create mode 100644 drivers/crypto/qat/qat_asym_pmd.h
 create mode 100644 drivers/crypto/qat/qat_comp_pmd.c
 create mode 100644 drivers/crypto/qat/qat_comp_pmd.h
 rename drivers/crypto/qat/{qat_crypto_capabilities.h => 
qat_sym_capabilities.h} (99%)
 create mode 100644 drivers/crypto/qat/qat_sym_pmd.c
 create mode 100644 drivers/crypto/qat/qat_sym_pmd.h
 delete mode 100644 drivers/crypto/qat/rte_qat_cryptodev.c

diff --git a/drivers/crypto/qat/Makefile b/drivers/crypto/qat/Makefile
index 902c47ff4..d467683fd 100644
--- a/drivers/crypto/qat/Makefile
+++ b/drivers/crypto/qat/Makefile
@@ -26,7 +26,9 @@ SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_device.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_qp.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_sym_session.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_common.c
-SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += rte_qat_cryptodev.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_sym_pmd.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_asym_pmd.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat_comp_pmd.c
 
 # export include files
 SYMLINK-y-include +=
diff --git a/drivers/crypto/qat/meson.build b/drivers/crypto/qat/meson.build
index 12910c377..e22e08fba 100644
--- a/drivers/crypto/qat/meson.build
+++ b/drivers/crypto/qat/meson.build
@@ -5,11 +5,12 @@ dep = dependency('libcrypto', required: false)
 if not dep.found()
build = false
 endif
-sources = files('qat_sym.c', 'qat_qp.c',
-   'qat_sym_session.c',
-   'qat_common.c',
-   'rte_qat_cryptodev.c',
-   'qat_device.c')
+sources = files('qat_common.c',
+   'qat_qp.c',
+   'qat_device.c',
+   'qat_sym_pmd.c', 'qat_sym.c', 'qat_sym_session.c',
+   'qat_asym_pmd.c',
+   'qat_comp_pmd.c')
 includes += include_directories('qat_adf')
 deps += ['bus_pci']
 ext_deps += dep
diff --git a/drivers/crypto/qat/qat_asym_pmd.c 
b/drivers/crypto/qat/qat_asym_pmd.c
new file mode 100644
index 0..8d36300ac
--- /dev/null
+++ b/drivers/crypto/qat/qat_asym_pmd.c
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Intel Corporation
+ */
+
+#include "qat_asym_pmd.h"
+
+int
+qat_asym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused)
+{
+   return 0;
+}
+
+int
+qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused)
+{
+   return 0;
+}
diff --git a/drivers/crypto/qat/qat_asym_pmd.h 
b/drivers/crypto/qat/qat_asym_pmd.h
new file mode 100644
index 0..0465e0300
--- /dev/null
+++ b/drivers/crypto/qat/qat_asym_pmd.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Intel Corpora

[dpdk-dev] [PATCH v3 26/38] crypto/qat: rename variables

[Tomasz Jozwiak]

From: Fiona Trahe 

Renamed sgl_cookie to cookie and qp_gen_config
to qat_gen_config, as it is intended to hold
more than just queue pair data.

Signed-off-by: Fiona Trahe 
Signed-off-by: Tomasz Jozwiak 
---
 drivers/crypto/qat/qat_device.c  |  2 +-
 drivers/crypto/qat/qat_device.h  |  2 +-
 drivers/crypto/qat/qat_sym_pmd.c | 14 +++---
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/crypto/qat/qat_device.c b/drivers/crypto/qat/qat_device.c
index c9d4b32ed..a0e414905 100644
--- a/drivers/crypto/qat/qat_device.c
+++ b/drivers/crypto/qat/qat_device.c
@@ -10,7 +10,7 @@
 
 /* Hardware device information per generation */
 __extension__
-struct qat_gen_hw_data qp_gen_config[] =  {
+struct qat_gen_hw_data qat_gen_config[] =  {
[QAT_GEN1] = {
.dev_gen = QAT_GEN1,
.qp_hw_data = qat_gen1_qps,
diff --git a/drivers/crypto/qat/qat_device.h b/drivers/crypto/qat/qat_device.h
index fd20a0147..4201a1c71 100644
--- a/drivers/crypto/qat/qat_device.h
+++ b/drivers/crypto/qat/qat_device.h
@@ -62,7 +62,7 @@ struct qat_gen_hw_data {
const struct qat_qp_hw_data (*qp_hw_data)[ADF_MAX_QPS_ON_ANY_SERVICE];
 };
 
-extern struct qat_gen_hw_data qp_gen_config[];
+extern struct qat_gen_hw_data qat_gen_config[];
 
 struct qat_pci_device *
 qat_pci_device_allocate(struct rte_pci_device *pci_dev);
diff --git a/drivers/crypto/qat/qat_sym_pmd.c b/drivers/crypto/qat/qat_sym_pmd.c
index aa71b4641..e6760b8f8 100644
--- a/drivers/crypto/qat/qat_sym_pmd.c
+++ b/drivers/crypto/qat/qat_sym_pmd.c
@@ -68,7 +68,7 @@ static void qat_sym_dev_info_get(struct rte_cryptodev *dev,
 {
struct qat_sym_dev_private *internals = dev->data->dev_private;
const struct qat_qp_hw_data *sym_hw_qps =
-   qp_gen_config[internals->qat_dev->qat_dev_gen]
+   qat_gen_config[internals->qat_dev->qat_dev_gen]
  .qp_hw_data[QAT_SERVICE_SYMMETRIC];
 
PMD_INIT_FUNC_TRACE();
@@ -143,7 +143,7 @@ static int qat_sym_qp_setup(struct rte_cryptodev *dev, 
uint16_t qp_id,
(struct qat_qp **)&(dev->data->queue_pairs[qp_id]);
struct qat_sym_dev_private *qat_private = dev->data->dev_private;
const struct qat_qp_hw_data *sym_hw_qps =
-   qp_gen_config[qat_private->qat_dev->qat_dev_gen]
+   qat_gen_config[qat_private->qat_dev->qat_dev_gen]
  .qp_hw_data[QAT_SERVICE_SYMMETRIC];
const struct qat_qp_hw_data *qp_hw_data = sym_hw_qps + qp_id;
 
@@ -178,16 +178,16 @@ static int qat_sym_qp_setup(struct rte_cryptodev *dev, 
uint16_t qp_id,
 
for (i = 0; i < qp->nb_descriptors; i++) {
 
-   struct qat_sym_op_cookie *sql_cookie =
+   struct qat_sym_op_cookie *cookie =
qp->op_cookies[i];
 
-   sql_cookie->qat_sgl_src_phys_addr =
-   rte_mempool_virt2iova(sql_cookie) +
+   cookie->qat_sgl_src_phys_addr =
+   rte_mempool_virt2iova(cookie) +
offsetof(struct qat_sym_op_cookie,
qat_sgl_src);
 
-   sql_cookie->qat_sgl_dst_phys_addr =
-   rte_mempool_virt2iova(sql_cookie) +
+   cookie->qat_sgl_dst_phys_addr =
+   rte_mempool_virt2iova(cookie) +
offsetof(struct qat_sym_op_cookie,
qat_sgl_dst);
}
-- 
2.17.0

[dpdk-dev] [PATCH v3 27/38] crypto/qat: modify debug message

[Tomasz Jozwiak]

From: Fiona Trahe 

Removed crypto reference in common debug message.

Signed-off-by: Fiona Trahe 
Signed-off-by: Tomasz Jozwiak 
---
 drivers/crypto/qat/qat_common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/crypto/qat/qat_common.c b/drivers/crypto/qat/qat_common.c
index 5d6779757..c10c1421a 100644
--- a/drivers/crypto/qat/qat_common.c
+++ b/drivers/crypto/qat/qat_common.c
@@ -103,5 +103,5 @@ void qat_stats_reset(struct qat_pci_device *dev,
memset(&(qp[i]->stats), 0, sizeof(qp[i]->stats));
}
 
-   PMD_DRV_LOG(DEBUG, "QAT crypto: %d stats cleared", service);
+   PMD_DRV_LOG(DEBUG, "QAT: %d stats cleared", service);
 }
-- 
2.17.0

[dpdk-dev] [PATCH v3 25/38] crypto/qat: remove incorrect usage of bundle number

[Tomasz Jozwiak]

From: Fiona Trahe 

As bundle_num is included in qat_gen1_qps static array
there shouldn't be a multiplier used in qat_qps_per_service()
Then removed ADF_NUM_BUNDLES_PER_DEV as no longer used.
Also renamed ADF_MAX_QPS_PER_BUNDLE to ADF_MAX_QPS_ON_ANY_SERVICE
and reduced from 4 to 2 which is enough for all current devices.

Signed-off-by: Fiona Trahe 
---
 .../qat/qat_adf/adf_transport_access_macros.h |  5 ++---
 drivers/crypto/qat/qat_common.c   |  4 ++--
 drivers/crypto/qat/qat_device.h   |  4 ++--
 drivers/crypto/qat/qat_qp.c   | 19 ---
 drivers/crypto/qat/qat_qp.h   |  2 +-
 5 files changed, 11 insertions(+), 23 deletions(-)

diff --git a/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h 
b/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h
index 2136d54ab..1eef5513f 100644
--- a/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h
+++ b/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h
@@ -50,9 +50,8 @@
 #define ADF_MAX_RING_SIZE ADF_RING_SIZE_4M
 #define ADF_DEFAULT_RING_SIZE ADF_RING_SIZE_16K
 
-#define ADF_NUM_BUNDLES_PER_DEV 1
-/* Maximum number of qps for any service type */
-#define ADF_MAX_QPS_PER_BUNDLE 4
+/* Maximum number of qps on a device for any service type */
+#define ADF_MAX_QPS_ON_ANY_SERVICE 2
 #define ADF_RING_DIR_TX0
 #define ADF_RING_DIR_RX1
 
diff --git a/drivers/crypto/qat/qat_common.c b/drivers/crypto/qat/qat_common.c
index f1759ea76..5d6779757 100644
--- a/drivers/crypto/qat/qat_common.c
+++ b/drivers/crypto/qat/qat_common.c
@@ -67,7 +67,7 @@ void qat_stats_get(struct qat_pci_device *dev,
}
 
qp = dev->qps_in_use[service];
-   for (i = 0; i < ADF_MAX_QPS_PER_BUNDLE; i++) {
+   for (i = 0; i < ADF_MAX_QPS_ON_ANY_SERVICE; i++) {
if (qp[i] == NULL) {
PMD_DRV_LOG(DEBUG, "Service %d Uninitialised qp %d",
service, i);
@@ -94,7 +94,7 @@ void qat_stats_reset(struct qat_pci_device *dev,
}
 
qp = dev->qps_in_use[service];
-   for (i = 0; i < ADF_MAX_QPS_PER_BUNDLE; i++) {
+   for (i = 0; i < ADF_MAX_QPS_ON_ANY_SERVICE; i++) {
if (qp[i] == NULL) {
PMD_DRV_LOG(DEBUG, "Service %d Uninitialised qp %d",
service, i);
diff --git a/drivers/crypto/qat/qat_device.h b/drivers/crypto/qat/qat_device.h
index fd1819354..fd20a0147 100644
--- a/drivers/crypto/qat/qat_device.h
+++ b/drivers/crypto/qat/qat_device.h
@@ -44,7 +44,7 @@ struct qat_pci_device {
uint8_t attached : 1;
/**< Flag indicating the device is attached */
 
-   struct qat_qp *qps_in_use[QAT_MAX_SERVICES][ADF_MAX_QPS_PER_BUNDLE];
+   struct qat_qp *qps_in_use[QAT_MAX_SERVICES][ADF_MAX_QPS_ON_ANY_SERVICE];
/**< links to qps set up for each service, index same as on API */
 
/* Data relating to symmetric crypto service */
@@ -59,7 +59,7 @@ struct qat_pci_device {
 
 struct qat_gen_hw_data {
enum qat_device_gen dev_gen;
-   const struct qat_qp_hw_data (*qp_hw_data)[ADF_MAX_QPS_PER_BUNDLE];
+   const struct qat_qp_hw_data (*qp_hw_data)[ADF_MAX_QPS_ON_ANY_SERVICE];
 };
 
 extern struct qat_gen_hw_data qp_gen_config[];
diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index f26fd0900..9938c1493 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -29,7 +29,7 @@
 
 __extension__
 const struct qat_qp_hw_data qat_gen1_qps[QAT_MAX_SERVICES]
-[ADF_MAX_QPS_PER_BUNDLE] = {
+[ADF_MAX_QPS_ON_ANY_SERVICE] = {
/* queue pairs which provide an asymmetric crypto service */
[QAT_SERVICE_ASYMMETRIC] = {
{
@@ -42,14 +42,11 @@ const struct qat_qp_hw_data qat_gen1_qps[QAT_MAX_SERVICES]
 
}, {
.service_type = QAT_SERVICE_ASYMMETRIC,
+   .hw_bundle_num = 0,
.tx_ring_num = 1,
.rx_ring_num = 9,
.tx_msg_size = 64,
.rx_msg_size = 32,
-   }, {
-   .service_type = QAT_SERVICE_INVALID,
-   }, {
-   .service_type = QAT_SERVICE_INVALID,
}
},
/* queue pairs which provide a symmetric crypto service */
@@ -69,10 +66,6 @@ const struct qat_qp_hw_data qat_gen1_qps[QAT_MAX_SERVICES]
.rx_ring_num = 11,
.tx_msg_size = 128,
.rx_msg_size = 32,
-   }, {
-   .service_type = QAT_SERVICE_INVALID,
-   }, {
-   .service_type = QAT_SERVICE_INVALID,
}
},
/* queue pairs which provide a compression service *

[dpdk-dev] [PATCH v3 28/38] crypto/qat: free cookie pool on queue creation error

[Tomasz Jozwiak]

From: Fiona Trahe 

Signed-off-by: Fiona Trahe 
Signed-off-by: Tomasz Jozwiak 
---
 drivers/crypto/qat/qat_qp.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index 9938c1493..569eace57 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -248,6 +248,9 @@ int qat_qp_setup(struct qat_pci_device *qat_dev,
return 0;
 
 create_err:
+   if (qp->op_cookie_pool)
+   rte_mempool_free(qp->op_cookie_pool);
+   rte_free(qp->op_cookies);
rte_free(qp);
return -EFAULT;
 }
-- 
2.17.0

[dpdk-dev] [PATCH v3 29/38] crypto/qat: remove unused macro

[Tomasz Jozwiak]

From: Fiona Trahe 

Signed-off-by: Fiona Trahe 
Signed-off-by: Tomasz Jozwiak 
---
 drivers/crypto/qat/qat_sym.h | 6 --
 1 file changed, 6 deletions(-)

diff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h
index d887dc126..e46448bd2 100644
--- a/drivers/crypto/qat/qat_sym.h
+++ b/drivers/crypto/qat/qat_sym.h
@@ -9,12 +9,6 @@
 
 #include "qat_common.h"
 
-/*
- * This macro rounds up a number to a be a multiple of
- * the alignment when the alignment is a power of 2
- */
-#define ALIGN_POW2_ROUNDUP(num, align) \
-   (((num) + (align) - 1) & ~((align) - 1))
 #define QAT_64_BTYE_ALIGN_MASK (~0x3f)
 
 struct qat_sym_session;
-- 
2.17.0

[dpdk-dev] [PATCH v3 30/38] crypto/qat: move macro to common file

[Tomasz Jozwiak]

From: Fiona Trahe 

QAT_64_BTYE_ALIGN_MASK macro is not specific to
symmetric crypto, but it is common for other
future services.

Signed-off-by: Fiona Trahe 
Signed-off-by: Tomasz Jozwiak 
---
 drivers/crypto/qat/qat_common.h | 2 ++
 drivers/crypto/qat/qat_sym.h| 2 --
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/qat/qat_common.h b/drivers/crypto/qat/qat_common.h
index 8ecebe954..db85d5482 100644
--- a/drivers/crypto/qat/qat_common.h
+++ b/drivers/crypto/qat/qat_common.h
@@ -15,6 +15,8 @@
  */
 #define QAT_SGL_MAX_NUMBER 16
 
+#define QAT_64_BTYE_ALIGN_MASK (~0x3f)
+
 /* Intel(R) QuickAssist Technology device generation is enumerated
  * from one according to the generation of the device
  */
diff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h
index e46448bd2..bdb672be4 100644
--- a/drivers/crypto/qat/qat_sym.h
+++ b/drivers/crypto/qat/qat_sym.h
@@ -9,8 +9,6 @@
 
 #include "qat_common.h"
 
-#define QAT_64_BTYE_ALIGN_MASK (~0x3f)
-
 struct qat_sym_session;
 
 struct qat_sym_op_cookie {
-- 
2.17.0

[dpdk-dev] [PATCH v3 31/38] crypto/qat: register appropriately named device

[Tomasz Jozwiak]

From: Fiona Trahe 

For every QAT PCI device probed, populate a local rte_device
containing an rte_driver. The rte_driver was created in a previous
patch to provide a crypto-specific driver name: "crypto_qat".
This was previously only used for driver registration, now it's also
used in device creation.
This allows applications to find devices driven by "crypto_qat".

Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_device.h  |  5 +
 drivers/crypto/qat/qat_sym_pmd.c | 38 
 2 files changed, 29 insertions(+), 14 deletions(-)

diff --git a/drivers/crypto/qat/qat_device.h b/drivers/crypto/qat/qat_device.h
index 4201a1c71..3df6520c3 100644
--- a/drivers/crypto/qat/qat_device.h
+++ b/drivers/crypto/qat/qat_device.h
@@ -50,6 +50,11 @@ struct qat_pci_device {
/* Data relating to symmetric crypto service */
struct qat_sym_dev_private *sym_dev;
/**< link back to cryptodev private data */
+   struct rte_device sym_rte_dev;
+   /**< This represents the crypto subset of this pci device.
+* Register with this rather than with the one in
+* pci_dev so that its driver can have a crypto-specific name
+*/
 
/* Data relating to compression service */
 
diff --git a/drivers/crypto/qat/qat_sym_pmd.c b/drivers/crypto/qat/qat_sym_pmd.c
index e6760b8f8..28e579b77 100644
--- a/drivers/crypto/qat/qat_sym_pmd.c
+++ b/drivers/crypto/qat/qat_sym_pmd.c
@@ -232,6 +232,18 @@ qat_sym_pmd_dequeue_op_burst(void *qp, struct 
rte_crypto_op **ops,
return qat_dequeue_op_burst(qp, (void **)ops, nb_ops);
 }
 
+/* An rte_driver is needed in the registration of both the device and the 
driver
+ * with cryptodev.
+ * The actual qat pci's rte_driver can't be used as its name represents
+ * the whole pci device with all services. Think of this as a holder for a name
+ * for the crypto part of the pci device.
+ */
+static const char qat_sym_drv_name[] = RTE_STR(CRYPTODEV_NAME_QAT_SYM_PMD);
+static const struct rte_driver cryptodev_qat_sym_driver = {
+   .name = qat_sym_drv_name,
+   .alias = qat_sym_drv_name
+};
+
 int
 qat_sym_dev_create(struct qat_pci_device *qat_pci_dev)
 {
@@ -249,12 +261,19 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev)
qat_pci_dev->name, "sym");
PMD_DRV_LOG(DEBUG, "Creating QAT SYM device %s", name);
 
+   /* Populate subset device to use in cryptodev device creation */
+   qat_pci_dev->sym_rte_dev.driver = &cryptodev_qat_sym_driver;
+   qat_pci_dev->sym_rte_dev.numa_node =
+   qat_pci_dev->pci_dev->device.numa_node;
+   qat_pci_dev->sym_rte_dev.devargs = NULL;
+
cryptodev = rte_cryptodev_pmd_create(name,
-   &qat_pci_dev->pci_dev->device, &init_params);
+   &(qat_pci_dev->sym_rte_dev), &init_params);
 
if (cryptodev == NULL)
return -ENODEV;
 
+   qat_pci_dev->sym_rte_dev.name = cryptodev->data->name;
cryptodev->driver_id = cryptodev_qat_driver_id;
cryptodev->dev_ops = &crypto_qat_ops;
 
@@ -287,7 +306,7 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev)
}
 
PMD_DRV_LOG(DEBUG, "Created QAT SYM device %s as cryptodev instance %d",
-   name, internals->sym_dev_id);
+   cryptodev->data->name, internals->sym_dev_id);
return 0;
 }
 
@@ -304,23 +323,14 @@ qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev)
/* free crypto device */
cryptodev = rte_cryptodev_pmd_get_dev(qat_pci_dev->sym_dev->sym_dev_id);
rte_cryptodev_pmd_destroy(cryptodev);
+   qat_pci_dev->sym_rte_dev.name = NULL;
qat_pci_dev->sym_dev = NULL;
 
return 0;
 }
 
 
-/* An rte_driver is needed in the registration of both the device and the 
driver
- * with cryptodev.
- * The actual qat pci's rte_driver can't be used as its name represents
- * the whole pci device with all services. Think of this as a holder for a name
- * for the crypto part of the pci device.
- */
-static const char qat_sym_drv_name[] = RTE_STR(CRYPTODEV_NAME_QAT_SYM_PMD);
-static struct rte_driver cryptodev_qat_sym_driver = {
-   .name = qat_sym_drv_name,
-   .alias = qat_sym_drv_name
-};
 static struct cryptodev_driver qat_crypto_drv;
-RTE_PMD_REGISTER_CRYPTO_DRIVER(qat_crypto_drv, cryptodev_qat_sym_driver,
+RTE_PMD_REGISTER_CRYPTO_DRIVER(qat_crypto_drv,
+   cryptodev_qat_sym_driver,
cryptodev_qat_driver_id);
-- 
2.17.0

[dpdk-dev] [PATCH v3 33/38] crypto/qat: optimize adf modulo function

[Tomasz Jozwiak]

From: Fiona Trahe 

Signed-off-by: Tomasz Jozwiak 
Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_qp.c | 19 ---
 drivers/crypto/qat/qat_qp.h |  2 +-
 2 files changed, 9 insertions(+), 12 deletions(-)

diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index 569eace57..b84ba643c 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -376,7 +376,7 @@ qat_queue_create(struct qat_pci_device *qat_dev, struct 
qat_queue *queue,
 
queue->max_inflights = ADF_MAX_INFLIGHTS(queue->queue_size,
ADF_BYTES_TO_MSG_SIZE(desc_size));
-   queue->modulo = ADF_RING_SIZE_MODULO(queue->queue_size);
+   queue->modulo_mask = (1 << ADF_RING_SIZE_MODULO(queue->queue_size)) - 1;
 
if (queue->max_inflights < 2) {
PMD_DRV_LOG(ERR, "Invalid num inflights");
@@ -401,11 +401,11 @@ qat_queue_create(struct qat_pci_device *qat_dev, struct 
qat_queue *queue,
queue->hw_queue_number, queue_base);
 
PMD_DRV_LOG(DEBUG, "RING: Name:%s, size in CSR: %u, in bytes %u,"
-   " nb msgs %u, msg_size %u, max_inflights %u modulo %u",
+   " nb msgs %u, msg_size %u, max_inflights %u modulo mask %u",
queue->memz_name,
queue->queue_size, queue_size_bytes,
qp_conf->nb_descriptors, desc_size,
-   queue->max_inflights, queue->modulo);
+   queue->max_inflights, queue->modulo_mask);
 
return 0;
 
@@ -494,13 +494,9 @@ static void adf_configure_queues(struct qat_qp *qp)
queue->hw_queue_number, queue_config);
 }
 
-
-static inline uint32_t adf_modulo(uint32_t data, uint32_t shift)
+static inline uint32_t adf_modulo(uint32_t data, uint32_t modulo_mask)
 {
-   uint32_t div = data >> shift;
-   uint32_t mult = div << shift;
-
-   return data - mult;
+   return data & modulo_mask;
 }
 
 static inline void
@@ -584,7 +580,7 @@ qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops)
goto kick_tail;
}
 
-   tail = adf_modulo(tail + queue->msg_size, queue->modulo);
+   tail = adf_modulo(tail + queue->msg_size, queue->modulo_mask);
ops++;
nb_ops_sent++;
}
@@ -620,7 +616,8 @@ qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops)
tmp_qp->op_cookies[head / rx_queue->msg_size],
tmp_qp->qat_dev_gen);
 
-   head = adf_modulo(head + rx_queue->msg_size, rx_queue->modulo);
+   head = adf_modulo(head + rx_queue->msg_size,
+ rx_queue->modulo_mask);
 
resp_msg = (uint8_t *)rx_queue->base_addr + head;
ops++;
diff --git a/drivers/crypto/qat/qat_qp.h b/drivers/crypto/qat/qat_qp.h
index 6f07bd67c..764125d59 100644
--- a/drivers/crypto/qat/qat_qp.h
+++ b/drivers/crypto/qat/qat_qp.h
@@ -59,7 +59,7 @@ struct qat_queue {
rte_iova_t  base_phys_addr; /* Queue physical address */
uint32_thead;   /* Shadow copy of the head */
uint32_ttail;   /* Shadow copy of the tail */
-   uint32_tmodulo;
+   uint32_tmodulo_mask;
uint32_tmsg_size;
uint16_tmax_inflights;
uint32_tqueue_size;
-- 
2.17.0

[dpdk-dev] [PATCH v3 34/38] crypto/qat: remove unused arguments

[Tomasz Jozwiak]

From: Fiona Trahe 

Process response function is only implemented
for crypto symmetric operations, which do not require
some of the arguments.
Therefore, these arguments can be removed from the
function prototype.

Signed-off-by: Tomasz Jozwiak 
Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_qp.c  | 4 +---
 drivers/crypto/qat/qat_qp.h  | 4 +---
 drivers/crypto/qat/qat_sym.c | 4 +---
 drivers/crypto/qat/qat_sym.h | 4 +---
 4 files changed, 4 insertions(+), 12 deletions(-)

diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index b84ba643c..0fdec0da0 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -612,9 +612,7 @@ qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops)
while (*(uint32_t *)resp_msg != ADF_RING_EMPTY_SIG &&
resp_counter != nb_ops) {
 
-   tmp_qp->process_response(ops, resp_msg,
-   tmp_qp->op_cookies[head / rx_queue->msg_size],
-   tmp_qp->qat_dev_gen);
+   tmp_qp->process_response(ops, resp_msg);
 
head = adf_modulo(head + rx_queue->msg_size,
  rx_queue->modulo_mask);
diff --git a/drivers/crypto/qat/qat_qp.h b/drivers/crypto/qat/qat_qp.h
index 764125d59..eb9188410 100644
--- a/drivers/crypto/qat/qat_qp.h
+++ b/drivers/crypto/qat/qat_qp.h
@@ -21,9 +21,7 @@ typedef int (*build_request_t)(void *op,
enum qat_device_gen qat_dev_gen);
 /**< Build a request from an op. */
 
-typedef int (*process_response_t)(void **ops,
-   uint8_t *resp, void *op_cookie,
-   enum qat_device_gen qat_dev_gen);
+typedef int (*process_response_t)(void **ops, uint8_t *resp);
 /**< Process a response descriptor and return the associated op. */
 
 /**
diff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c
index 15244d113..f613adce6 100644
--- a/drivers/crypto/qat/qat_sym.c
+++ b/drivers/crypto/qat/qat_sym.c
@@ -661,9 +661,7 @@ qat_sym_build_request(void *in_op, uint8_t *out_msg,
 }
 
 int
-qat_sym_process_response(void **op, uint8_t *resp,
-   __rte_unused void *op_cookie,
-   __rte_unused enum qat_device_gen qat_dev_gen)
+qat_sym_process_response(void **op, uint8_t *resp)
 {
 
struct icp_qat_fw_comn_resp *resp_msg =
diff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h
index bdb672be4..dffd5f369 100644
--- a/drivers/crypto/qat/qat_sym.h
+++ b/drivers/crypto/qat/qat_sym.h
@@ -22,8 +22,6 @@ int
 qat_sym_build_request(void *in_op, uint8_t *out_msg,
void *op_cookie, enum qat_device_gen qat_dev_gen);
 int
-qat_sym_process_response(void **op, uint8_t *resp,
-   __rte_unused void *op_cookie,
-   __rte_unused enum qat_device_gen qat_dev_gen);
+qat_sym_process_response(void **op, uint8_t *resp);
 
 #endif /* _QAT_SYM_H_ */
-- 
2.17.0

[dpdk-dev] [PATCH v3 32/38] crypto/qat: add max PCI devices to config file

[Tomasz Jozwiak]

From: Fiona Trahe 

Added CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES to
build config files.

Signed-off-by: Tomasz Jozwiak 
---
 config/common_base  | 5 -
 config/rte_config.h | 2 ++
 drivers/crypto/qat/qat_device.c | 8 
 drivers/crypto/qat/qat_device.h | 2 --
 4 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/config/common_base b/config/common_base
index 6b0d1cbbb..cf0741199 100644
--- a/config/common_base
+++ b/config/common_base
@@ -495,7 +495,10 @@ CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_DRIVER=n
 # on a single QuickAssist device.
 #
 CONFIG_RTE_QAT_PMD_MAX_NB_SESSIONS=2048
-
+#
+# Max. number of QuickAssist devices, which can be detected and attached
+#
+CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
 #
 # Compile PMD for virtio crypto devices
 #
diff --git a/config/rte_config.h b/config/rte_config.h
index a1d01759e..e353d8d6d 100644
--- a/config/rte_config.h
+++ b/config/rte_config.h
@@ -91,6 +91,8 @@
  */
 /* QuickAssist device */
 #define RTE_QAT_PMD_MAX_NB_SESSIONS 2048
+/* Max. number of QuickAssist devices which can be attached */
+#define RTE_PMD_QAT_MAX_PCI_DEVICES 48
 
 /* virtio crypto defines */
 #define RTE_VIRTIO_CRYPTO_PMD_MAX_NB_SESSIONS 1024
diff --git a/drivers/crypto/qat/qat_device.c b/drivers/crypto/qat/qat_device.c
index a0e414905..0cab2e928 100644
--- a/drivers/crypto/qat/qat_device.c
+++ b/drivers/crypto/qat/qat_device.c
@@ -23,7 +23,7 @@ struct qat_gen_hw_data qat_gen_config[] =  {
 };
 
 
-static struct qat_pci_device qat_pci_devices[QAT_MAX_PCI_DEVICES];
+static struct qat_pci_device qat_pci_devices[RTE_PMD_QAT_MAX_PCI_DEVICES];
 static int qat_nb_pci_devices;
 
 /*
@@ -62,7 +62,7 @@ qat_pci_get_named_dev(const char *name)
if (name == NULL)
return NULL;
 
-   for (i = 0; i < QAT_MAX_PCI_DEVICES; i++) {
+   for (i = 0; i < RTE_PMD_QAT_MAX_PCI_DEVICES; i++) {
dev = &qat_pci_devices[i];
 
if ((dev->attached == QAT_ATTACHED) &&
@@ -78,7 +78,7 @@ qat_pci_find_free_device_index(void)
 {
uint8_t dev_id;
 
-   for (dev_id = 0; dev_id < QAT_MAX_PCI_DEVICES; dev_id++) {
+   for (dev_id = 0; dev_id < RTE_PMD_QAT_MAX_PCI_DEVICES; dev_id++) {
if (qat_pci_devices[dev_id].attached == QAT_DETACHED)
break;
}
@@ -111,7 +111,7 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev)
}
 
qat_dev_id = qat_pci_find_free_device_index();
-   if (qat_dev_id == QAT_MAX_PCI_DEVICES) {
+   if (qat_dev_id == RTE_PMD_QAT_MAX_PCI_DEVICES) {
PMD_DRV_LOG(ERR, "Reached maximum number of QAT devices");
return NULL;
}
diff --git a/drivers/crypto/qat/qat_device.h b/drivers/crypto/qat/qat_device.h
index 3df6520c3..e18c8a706 100644
--- a/drivers/crypto/qat/qat_device.h
+++ b/drivers/crypto/qat/qat_device.h
@@ -11,11 +11,9 @@
 #include "adf_transport_access_macros.h"
 #include "qat_qp.h"
 
-
 #define QAT_DETACHED  (0)
 #define QAT_ATTACHED  (1)
 
-#define QAT_MAX_PCI_DEVICES48
 #define QAT_DEV_NAME_MAX_LEN   64
 
 /*
-- 
2.17.0

[dpdk-dev] [PATCH v3 36/38] crypto/qat: check for service type

[Tomasz Jozwiak]

From: Fiona Trahe 

Other services, apart from symmetric crypto,
such as compression, will be added in future patches.
Therefore, the assumption that only symmetric crypto
operations are processed will not be valid anymore,
and service type needs to be checked.

Signed-off-by: Tomasz Jozwiak 
Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_qp.c | 6 +-
 drivers/crypto/qat/qat_qp.h | 1 +
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index b190f2cee..f9d3762d7 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -239,6 +239,7 @@ int qat_qp_setup(struct qat_pci_device *qat_dev,
 
qp->qat_dev_gen = qat_dev->qat_dev_gen;
qp->build_request = qat_qp_conf->build_request;
+   qp->service_type = qat_qp_conf->hw->service_type;
qp->qat_dev = qat_dev;
 
PMD_DRV_LOG(DEBUG, "QP setup complete: id: %d, cookiepool: %s",
@@ -612,7 +613,10 @@ qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops)
while (*(uint32_t *)resp_msg != ADF_RING_EMPTY_SIG &&
resp_counter != nb_ops) {
 
-   qat_sym_process_response(ops, resp_msg);
+   if (tmp_qp->service_type == QAT_SERVICE_SYMMETRIC)
+   qat_sym_process_response(ops, resp_msg);
+   /* add qat_asym_process_response here */
+   /* add qat_comp_process_response here */
 
head = adf_modulo(head + rx_queue->msg_size,
  rx_queue->modulo_mask);
diff --git a/drivers/crypto/qat/qat_qp.h b/drivers/crypto/qat/qat_qp.h
index 0b3d6d3aa..59db945e7 100644
--- a/drivers/crypto/qat/qat_qp.h
+++ b/drivers/crypto/qat/qat_qp.h
@@ -79,6 +79,7 @@ struct qat_qp {
uint32_t nb_descriptors;
enum qat_device_gen qat_dev_gen;
build_request_t build_request;
+   enum qat_service_type service_type;
struct qat_pci_device *qat_dev;
/**< qat device this qp is on */
 } __rte_cache_aligned;
-- 
2.17.0

[dpdk-dev] [PATCH v3 35/38] crypto/qat: make response process function inline

[Tomasz Jozwiak]

From: Fiona Trahe 

Optimize the dequeue function by inlining the response
processing function, assuming only symmetric
operations are supported.

Signed-off-by: Tomasz Jozwiak 
Signed-off-by: Fiona Trahe 
---
 drivers/crypto/qat/qat_qp.c  |   4 +-
 drivers/crypto/qat/qat_qp.h  |   5 --
 drivers/crypto/qat/qat_sym.c | 127 --
 drivers/crypto/qat/qat_sym.h | 131 ++-
 drivers/crypto/qat/qat_sym_pmd.c |   1 -
 5 files changed, 131 insertions(+), 137 deletions(-)

diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index 0fdec0da0..b190f2cee 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -14,6 +14,7 @@
 #include "qat_logs.h"
 #include "qat_device.h"
 #include "qat_qp.h"
+#include "qat_sym.h"
 #include "adf_transport_access_macros.h"
 
 
@@ -238,7 +239,6 @@ int qat_qp_setup(struct qat_pci_device *qat_dev,
 
qp->qat_dev_gen = qat_dev->qat_dev_gen;
qp->build_request = qat_qp_conf->build_request;
-   qp->process_response = qat_qp_conf->process_response;
qp->qat_dev = qat_dev;
 
PMD_DRV_LOG(DEBUG, "QP setup complete: id: %d, cookiepool: %s",
@@ -612,7 +612,7 @@ qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops)
while (*(uint32_t *)resp_msg != ADF_RING_EMPTY_SIG &&
resp_counter != nb_ops) {
 
-   tmp_qp->process_response(ops, resp_msg);
+   qat_sym_process_response(ops, resp_msg);
 
head = adf_modulo(head + rx_queue->msg_size,
  rx_queue->modulo_mask);
diff --git a/drivers/crypto/qat/qat_qp.h b/drivers/crypto/qat/qat_qp.h
index eb9188410..0b3d6d3aa 100644
--- a/drivers/crypto/qat/qat_qp.h
+++ b/drivers/crypto/qat/qat_qp.h
@@ -21,9 +21,6 @@ typedef int (*build_request_t)(void *op,
enum qat_device_gen qat_dev_gen);
 /**< Build a request from an op. */
 
-typedef int (*process_response_t)(void **ops, uint8_t *resp);
-/**< Process a response descriptor and return the associated op. */
-
 /**
  * Structure with data needed for creation of queue pair.
  */
@@ -44,7 +41,6 @@ struct qat_qp_config {
uint32_t cookie_size;
int socket_id;
build_request_t build_request;
-   process_response_t process_response;
const char *service_str;
 };
 
@@ -83,7 +79,6 @@ struct qat_qp {
uint32_t nb_descriptors;
enum qat_device_gen qat_dev_gen;
build_request_t build_request;
-   process_response_t process_response;
struct qat_pci_device *qat_dev;
/**< qat device this qp is on */
 } __rte_cache_aligned;
diff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c
index f613adce6..887d4ebcd 100644
--- a/drivers/crypto/qat/qat_sym.c
+++ b/drivers/crypto/qat/qat_sym.c
@@ -12,44 +12,7 @@
 #include 
 
 #include "qat_logs.h"
-#include "qat_sym_session.h"
 #include "qat_sym.h"
-#include "qat_sym_pmd.h"
-
-#define BYTE_LENGTH8
-/* bpi is only used for partial blocks of DES and AES
- * so AES block len can be assumed as max len for iv, src and dst
- */
-#define BPI_MAX_ENCR_IV_LEN ICP_QAT_HW_AES_BLK_SZ
-
-/** Encrypt a single partial block
- *  Depends on openssl libcrypto
- *  Uses ECB+XOR to do CFB encryption, same result, more performant
- */
-static inline int
-bpi_cipher_encrypt(uint8_t *src, uint8_t *dst,
-   uint8_t *iv, int ivlen, int srclen,
-   void *bpi_ctx)
-{
-   EVP_CIPHER_CTX *ctx = (EVP_CIPHER_CTX *)bpi_ctx;
-   int encrypted_ivlen;
-   uint8_t encrypted_iv[BPI_MAX_ENCR_IV_LEN];
-   uint8_t *encr = encrypted_iv;
-
-   /* ECB method: encrypt the IV, then XOR this with plaintext */
-   if (EVP_EncryptUpdate(ctx, encrypted_iv, &encrypted_ivlen, iv, ivlen)
-   <= 0)
-   goto cipher_encrypt_err;
-
-   for (; srclen != 0; --srclen, ++dst, ++src, ++encr)
-   *dst = *src ^ *encr;
-
-   return 0;
-
-cipher_encrypt_err:
-   PMD_DRV_LOG(ERR, "libcrypto ECB cipher encrypt failed");
-   return -EINVAL;
-}
 
 /** Decrypt a single partial block
  *  Depends on openssl libcrypto
@@ -136,62 +99,6 @@ qat_bpicipher_preprocess(struct qat_sym_session *ctx,
return sym_op->cipher.data.length - last_block_len;
 }
 
-static inline uint32_t
-qat_bpicipher_postprocess(struct qat_sym_session *ctx,
-   struct rte_crypto_op *op)
-{
-   int block_len = qat_cipher_get_block_size(ctx->qat_cipher_alg);
-   struct rte_crypto_sym_op *sym_op = op->sym;
-   uint8_t last_block_len = block_len > 0 ?
-   sym_op->cipher.data.length % block_len : 0;
-
-   if (last_block_len > 0 &&
-   ctx->qat_dir == ICP_QAT_HW_CIPHER_ENCRYPT) {
-
-   /* Encrypt last block */
-   uint8_t *last_block, *dst, *iv;
-   uint32_t last_block_offset;
-
-

[dpdk-dev] [PATCH v3 37/38] doc/qat: specify QAT driver and device name formats

[Tomasz Jozwiak]

From: Fiona Trahe 

Document the driver and device naming formats.
Changed the underscores alignment.

Signed-off-by: Fiona Trahe 
Signed-off-by: Tomasz Jozwiak 
---
 doc/guides/cryptodevs/qat.rst | 12 
 1 file changed, 12 insertions(+)

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index 8c8fefaa0..22a2c715d 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -359,3 +359,15 @@ length of data to authenticate (op.sym.auth.data.length) 
must be the length
 of all the items described above, including the padding at the end.
 Also, offset of data to authenticate (op.sym.auth.data.offset)
 must be such that points at the start of the COUNT bytes.
+
+Device and driver naming
+
+
+The qat crypto driver name is "crypto_qat".
+This name is passed to the dpdk-test-crypto-perf tool in the -devtype 
parameter.
+The rte_cryptodev_devices_get() can return the devices exposed by a driver.
+
+Each qat crypto device has a unique name, in format
+_, e.g. ":41:01.0_qat_sym".
+This name can be passed to rte_cryptodev_get_dev_id() to get the device_id.
+This is also the format of the slave parameter passed to the crypto scheduler.
-- 
2.17.0

[dpdk-dev] [PATCH v3 38/38] crypto/qat: remove configurable max number of sessions

[Tomasz Jozwiak]

This patch removes CONFIG_RTE_QAT_PMD_MAX_NB_SESSIONS
from common_base, config/rte_config.h files and
defines QAT_SYM_PMD_MAX_NB_SESSIONS inside qat_sym_pmd.h
file instead.

Signed-off-by: Tomasz Jozwiak 
Acked-by: Fiona Trahe 
---
 config/common_base   | 5 -
 config/rte_config.h  | 5 -
 drivers/crypto/qat/qat_sym_pmd.c | 4 ++--
 drivers/crypto/qat/qat_sym_pmd.h | 1 +
 4 files changed, 3 insertions(+), 12 deletions(-)

diff --git a/config/common_base b/config/common_base
index cf0741199..f03f9c390 100644
--- a/config/common_base
+++ b/config/common_base
@@ -491,11 +491,6 @@ CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_TX=n
 CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_RX=n
 CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_DRIVER=n
 #
-# Number of sessions to create in the session memory pool
-# on a single QuickAssist device.
-#
-CONFIG_RTE_QAT_PMD_MAX_NB_SESSIONS=2048
-#
 # Max. number of QuickAssist devices, which can be detected and attached
 #
 CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
diff --git a/config/rte_config.h b/config/rte_config.h
index e353d8d6d..0ba0ead7e 100644
--- a/config/rte_config.h
+++ b/config/rte_config.h
@@ -85,12 +85,7 @@
 
 /** driver defines /
 
-/*
- * Number of sessions to create in the session memory pool
- * on a single instance of crypto HW device.
- */
 /* QuickAssist device */
-#define RTE_QAT_PMD_MAX_NB_SESSIONS 2048
 /* Max. number of QuickAssist devices which can be attached */
 #define RTE_PMD_QAT_MAX_PCI_DEVICES 48
 
diff --git a/drivers/crypto/qat/qat_sym_pmd.c b/drivers/crypto/qat/qat_sym_pmd.c
index 6b39b32f8..c94a8a197 100644
--- a/drivers/crypto/qat/qat_sym_pmd.c
+++ b/drivers/crypto/qat/qat_sym_pmd.c
@@ -77,7 +77,7 @@ static void qat_sym_dev_info_get(struct rte_cryptodev *dev,
qat_qps_per_service(sym_hw_qps, QAT_SERVICE_SYMMETRIC);
info->feature_flags = dev->feature_flags;
info->capabilities = internals->qat_dev_capabilities;
-   info->sym.max_nb_sessions = RTE_QAT_PMD_MAX_NB_SESSIONS;
+   info->sym.max_nb_sessions = QAT_SYM_PMD_MAX_NB_SESSIONS;
info->driver_id = cryptodev_qat_driver_id;
info->pci_dev = RTE_DEV_TO_PCI(dev->device);
}
@@ -250,7 +250,7 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev)
.name = "",
.socket_id = qat_pci_dev->pci_dev->device.numa_node,
.private_data_size = sizeof(struct qat_sym_dev_private),
-   .max_nb_sessions = RTE_QAT_PMD_MAX_NB_SESSIONS
+   .max_nb_sessions = QAT_SYM_PMD_MAX_NB_SESSIONS
};
char name[RTE_CRYPTODEV_NAME_MAX_LEN];
struct rte_cryptodev *cryptodev;
diff --git a/drivers/crypto/qat/qat_sym_pmd.h b/drivers/crypto/qat/qat_sym_pmd.h
index efa3b0775..80a198741 100644
--- a/drivers/crypto/qat/qat_sym_pmd.h
+++ b/drivers/crypto/qat/qat_sym_pmd.h
@@ -13,6 +13,7 @@
 
 /**< Intel(R) QAT Symmetric Crypto PMD device name */
 #define CRYPTODEV_NAME_QAT_SYM_PMD crypto_qat
+#define QAT_SYM_PMD_MAX_NB_SESSIONS2048
 
 extern uint8_t cryptodev_qat_driver_id;
 
-- 
2.17.0

Re: [dpdk-dev] [PATCH 7/7] net/mlx5: add parameter for port representors

[Adrien Mazarguil]

On Tue, Jun 12, 2018 at 02:44:12PM +, Xueming(Steven) Li wrote:

> > +   if (dpdk_dev->devargs) {
> > +   ret = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
> > +   if (ret)
> > +   goto error;
> > +   } else {
> > +   memset(ð_da, 0, sizeof(eth_da));
> > +   }
> >  next:
> > +   if (j) {
> > +   unsigned int k;
> > +
> > +   for (k = 0; k < eth_da.nb_representor_ports; ++k)
> > +   if (eth_da.representor_ports[k] == j - 1)
> > +   break;
> > +   if (k == eth_da.nb_representor_ports)
> > +   goto skip;
> > +   }
> > errno = 0;
> > ctx = mlx5_glue->open_device(ibv_dev[j]);
> > if (!ctx) {
> > @@ -1187,6 +1211,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
> > goto error;
> > ++n;
> > }
> > +skip:
> > if (ibv_dev[++j])
> > goto next;
> 
> int rte_eth_dev_attach(const char *devargs, uint16_t *port_id);
> The rte_eth_dev_attach api attach one device a time as only one *port_id 
> parameter.
> Dev argument "82:0.0,representer[a-b] will register multiple devices in one 
> call,
> is this correct behavior?

Yes, this is how the representor argument is documented and supposed to be
used. This probing approach is obviously not compatible with representors
hot-plugging, for which something will have to be devised if needed.

> I ask this because this caused testpmd CLI "port attach" 
> crash due to only the last registered port id returned.

I reproduced this crash and determined it is caused by a bug in
testpmd. I'll submit a separate fix for it.

-- 
Adrien Mazarguil
6WIND

Re: [dpdk-dev] [PATCH 02/22] bus/vdev: enable one device scan

[Zhang, Qi Z]

> -Original Message-
> From: Shreyansh Jain [mailto:shreyansh.j...@nxp.com]
> Sent: Friday, June 8, 2018 8:08 PM
> To: Zhang, Qi Z 
> Cc: tho...@monjalon.net; Burakov, Anatoly ;
> Ananyev, Konstantin ; dev@dpdk.org;
> Richardson, Bruce ; Yigit, Ferruh
> ; Shelton, Benjamin H
> ; Vangati, Narender
> 
> Subject: Re: [dpdk-dev] [PATCH 02/22] bus/vdev: enable one device scan
> 
> On 6/7/2018 6:08 PM, Qi Zhang wrote:
> > Implemented the bus ops scan_one, besides this improve the scan
> > efficiency in hotplug case, it aslo avoid sync IPC invoke (which
>   
>   also
> 
> > happens in vdev->scan on secondary process). The benifit is it
> ^^^
> benefit
> 
> > removes the potiential deadlock in the case when secondary process
>^^
>potential
> 
> > receive a request from primary process to attach a new device, since
> > vdev->scan will be invoked on mp thread itself at this case.
>   ^^^
>   in that
> 
> 
> Besides the above spells, is it possible to re-write the commit?
> You mention it "...improves the scan efficiency..." - how? Is that an implicit
> output of introducing the new scan_one for vdev?

"Improve scan efficiency" should be general to all buses in hot plug case.
since compare to bus->scan, bus->scan_one no need to iterate all devargs.
But yes, it's not the original purpose for this patch set, but a bonus.

I will re-write comment with below format to make it more clear.
The patch implemented bus ops scan_one for vdev, it gives two benefits
1. improve scan efficiency 
2. avoid sync IPC invoke .

Regards
Qi

> 
> >
> > Signed-off-by: Qi Zhang 
> > ---
> >   drivers/bus/vdev/vdev.c | 30 ++
> >   1 file changed, 30 insertions(+)
> >
> > diff --git a/drivers/bus/vdev/vdev.c b/drivers/bus/vdev/vdev.c index
> > 6139dd551..cdbd77df0 100644
> > --- a/drivers/bus/vdev/vdev.c
> > +++ b/drivers/bus/vdev/vdev.c
> > @@ -467,6 +467,35 @@ vdev_scan(void)
> > return 0;
> >   }
> >
> 
> [...]

Re: [dpdk-dev] [PATCH 01/22] eal: introduce one device scan

[Zhang, Qi Z]

Hi Shreyansh:
Thanks for your review.
Will fix base on your comments in v2.
Regards
Qi

> -Original Message-
> From: Shreyansh Jain [mailto:shreyansh.j...@nxp.com]
> Sent: Friday, June 8, 2018 7:12 PM
> To: Zhang, Qi Z 
> Cc: tho...@monjalon.net; Burakov, Anatoly ;
> Ananyev, Konstantin ; dev@dpdk.org;
> Richardson, Bruce ; Yigit, Ferruh
> ; Shelton, Benjamin H
> ; Vangati, Narender
> 
> Subject: Re: [dpdk-dev] [PATCH 01/22] eal: introduce one device scan
> 
> On 6/7/2018 6:08 PM, Qi Zhang wrote:
> > When hot plug a new device, it is not necessary to scan everything on
> > the bus since the devname and devargs are already there. So new
> > rte_bus ops "scan_one" is introduced, bus driver can implement this
> > function to simply the hotplug process.
>   ^
>   simplify
> 
> >
> > Signed-off-by: Qi Zhang 
> > ---
> >   lib/librte_eal/common/eal_common_dev.c  | 17 +
> >   lib/librte_eal/common/include/rte_bus.h |  4 
> >   2 files changed, 17 insertions(+), 4 deletions(-)
> >
> > diff --git a/lib/librte_eal/common/eal_common_dev.c
> > b/lib/librte_eal/common/eal_common_dev.c
> > index 61cb3b162..1ad033536 100644
> > --- a/lib/librte_eal/common/eal_common_dev.c
> > +++ b/lib/librte_eal/common/eal_common_dev.c
> > @@ -147,11 +147,20 @@ int __rte_experimental
> rte_eal_hotplug_add(const char *busname, const char *devn
> > if (ret)
> > goto err_devarg;
> >
> > -   ret = bus->scan();
> > -   if (ret)
> > -   goto err_devarg;
> > +   /**
> > +* if bus support to scan specific device by devargs,
> > +* we don't need to scan all devices on the bus.
> > +*/
> > +   if (bus->scan_one) {
> > +   dev = bus->scan_one(da);
> > +   } else {
> > +   ret = bus->scan();
> > +   if (ret)
> > +   goto err_devarg;
> > +
> > +   dev = bus->find_device(NULL, cmp_detached_dev_name,
> devname);
> > +   }
> >
> > -   dev = bus->find_device(NULL, cmp_detached_dev_name, devname);
> > if (dev == NULL) {
> > RTE_LOG(ERR, EAL, "Cannot find unplugged device (%s)\n",
> > devname);
> > diff --git a/lib/librte_eal/common/include/rte_bus.h
> > b/lib/librte_eal/common/include/rte_bus.h
> > index eb9eded4e..b15cff892 100644
> > --- a/lib/librte_eal/common/include/rte_bus.h
> > +++ b/lib/librte_eal/common/include/rte_bus.h
> > @@ -83,6 +83,7 @@ enum rte_iova_mode {
> >*/
> >   typedef int (*rte_bus_scan_t)(void);
> >
> > +typedef struct rte_device *(*rte_bus_scan_one_t)(struct rte_devargs
> > +*);
> 
> You should add comments over the declaration, just like the other similar
> declarations.
> And, a new line should be here.
> 
> >   /**
> >* Implementation specific probe function which is responsible for
> linking
> >* devices on that bus with applicable drivers.
> > @@ -95,6 +96,8 @@ typedef int (*rte_bus_scan_t)(void);
> >*/
> >   typedef int (*rte_bus_probe_t)(void);
> >
> > +
> > +
> 
> And please remove the extra lines added above in next version of patch.
> 
> >   /**
> >* Device iterator to find a device on a bus.
> >*
> > @@ -204,6 +207,7 @@ struct rte_bus {
> > TAILQ_ENTRY(rte_bus) next;   /**< Next bus object in linked list
> */
> > const char *name;/**< Name of the bus */
> > rte_bus_scan_t scan; /**< Scan for devices attached to
> bus */
> > +   rte_bus_scan_one_t scan_one; /**< Scan one device by devargs */
> 
> I think you mean "Scan one device using devargs" rather than "Scan one
> device by devargs".
> 
> > rte_bus_probe_t probe;   /**< Probe devices on bus */
> > rte_bus_find_device_t find_device; /**< Find a device on the bus
> */
> > rte_bus_plug_t plug; /**< Probe single device for drivers
> */
> >

Re: [dpdk-dev] 16.11.7 (LTS) patches review and test

[Luca Boccassi]

On Fri, 2018-06-08 at 10:17 +0100, Luca Boccassi wrote:
> On Thu, 2018-05-31 at 11:25 +0100, Luca Boccassi wrote:
> > Hi all,
> > 
> > Here is a list of patches targeted for LTS release 16.11.7. Please
> > help review and test. The planned date for the final release is
> > Monday,
> > June the 11th.
> > Before that, please shout if anyone has objections with these
> > patches being applied.
> > 
> > Also for the companies committed to running regression tests,
> > please
> > run the tests and report any issue before the release date.
> > 
> > These patches are located at branch 16.11 of dpdk-stable repo:
> >     https://dpdk.org/browse/dpdk-stable/
> > 
> > Thanks.
> > 
> > Luca Boccassi
> 
> Hi,
> 
> The release date for 16.11.7 is being postponed by two days to
> Wednesday the 13th to due to unforeseen delays in some regression
> tests. Apologies for the inconvenience.

Hi,

PF performance tests ran by Intel with FVL40g show a small regression
that is being investigated, so I am postponing the 16.11.7 release to
tomorrow pending confirmation.
Apologies for the inconvenience.

-- 
Kind regards,
Luca Boccassi

Re: [dpdk-dev] [PATCH v1] net/mlx5: fix pmd crash in device probe

[Adrien Mazarguil]

On Tue, Jun 12, 2018 at 07:38:11PM +0800, Xueming Li wrote:
> This patch initializes counter descriptor struct before invoking Verbs
> api to avoid segment fault.
> 
> Fixes: 9a761de8ea14 ("net/mlx5: flow counter support")
> Cc: or...@mellanox.com
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Xueming Li 

Acked-by: Adrien Mazarguil 

-- 
Adrien Mazarguil
6WIND

Re: [dpdk-dev] [PATCH] ethdev: force offloading API rules

[Thomas Monjalon]

08/06/2018 22:01, Thomas Monjalon:
> 08/06/2018 21:51, Ferruh Yigit:
> > On 5/31/2018 1:44 PM, Ferruh Yigit wrote:
> > > The error path was disabled in previous release to let apps to be more
> > > flexible.
> > > 
> > > But this release they are enabled, applications have to obey offload API
> > > rules otherwise they will get errors from following APIs:
> > > rte_eth_dev_configure
> > > rte_eth_rx_queue_setup
> > > rte_eth_tx_queue_setup
> > > 
> > > Signed-off-by: Ferruh Yigit 
> > > ---
> > > Cc: Shahaf Shuler 
> > > Cc: Wei Dai 
> > > Cc: Qi Zhang 
> > > Cc: Andrew Rybchenko 
> > 
> > Any objection to this patch?
> > I really would like to get this early to catch any possible issue.
> 
> Yes you're right.
> Let's merge it.

Acked-by: Thomas Monjalon 

Re: [dpdk-dev] [PATCH] ethdev: force RSS offload rules again

[Thomas Monjalon]

04/06/2018 09:56, Shahaf Shuler:
> Sunday, June 3, 2018 5:15 PM, Ferruh Yigit:
> > Subject: Re: [PATCH] ethdev: force RSS offload rules again
> > 
> > On 6/3/2018 11:41 AM, Shahaf Shuler wrote:
> > > Thursday, May 31, 2018 4:23 PM, Ferruh Yigit:
> > >> Subject: [PATCH] ethdev: force RSS offload rules again
> > >>
> > >> PMDs should provide supported RSS hash functions via
> > >> dev_info.flow_type_rss_offloads variable.
> > >>
> > >> There is a check in ethdev if requested RSS hash function is
> > >> supported by PMD or not.
> > >> This check has been relaxed in previous release to not return an
> > >> error when a non supported has function requested [1], this has been
> > >> done to not break the applications.
> > >>
> > >> Adding the error return back.
> > >> PMDs need to provide correct list of supported hash functions and
> > >> applications need to take care this information before configuring
> > >> the RSS otherwise they will get an error from APIs:
> > >> rte_eth_dev_rss_hash_update()
> > >> rte_eth_dev_configure()
> > >
> > > Are the current app/examples in DPDK tree behave accordingly?
> > 
> > I tried a few which were good but I don't know about all.
> > 
> > That is why we should merge this patch early so that we can detect and fix
> > ones fails.
> 
> Acked-by: Shahaf Shuler 

Acked-by: Thomas Monjalon 

[dpdk-dev] [PATCH] memory: fix alignment in eal_get_virtual_area()

[Dariusz Stojaczyk]

Although the alignment mechanism works as intended, the
`no_align` bool flag was set incorrectly. We were aligning
buffers that didn't need extra alignment, and weren't
aligning ones that really needed it.

Fixes: b7cc54187ea4 ("mem: move virtual area function in common directory")
Cc: anatoly.bura...@intel.com
Cc: sta...@dpdk.org

Signed-off-by: Dariusz Stojaczyk 
---
 lib/librte_eal/common/eal_common_memory.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/librte_eal/common/eal_common_memory.c 
b/lib/librte_eal/common/eal_common_memory.c
index 4f0688f..a7c89f0 100644
--- a/lib/librte_eal/common/eal_common_memory.c
+++ b/lib/librte_eal/common/eal_common_memory.c
@@ -70,7 +70,7 @@ eal_get_virtual_area(void *requested_addr, size_t *size,
 * system page size is the same as requested page size.
 */
no_align = (requested_addr != NULL &&
-   ((uintptr_t)requested_addr & (page_sz - 1)) == 0) ||
+   ((uintptr_t)requested_addr & (page_sz - 1))) ||
page_sz == system_page_sz;
 
do {
-- 
2.7.4

Re: [dpdk-dev] [dpdk-stable] [PATCH] app/testpmd: add sanity checks when retrieving xstats

[Ferruh Yigit]

On 6/7/2018 9:15 AM, David Marchand wrote:
> Testpmd should not expect the xstats names and values arrays to be
> aligned: neither the arrays sizes, nor the order in which the values are.

As far as I can see this assumption is everywhere in API implementation:
xstats names and values are aligned with same order.
The basic stat part of the xstats, implemented in ethdev layer, seems relying on
same assumption. Also looks like "xstat size" and "xstat_names size" used
interchangeably.

And I don't see any case that mentions xstats.id is xstats_name index.
cc'ed Harry, to get more information about initial intention.

the id value in xstats struct looks like duplication, but other than that, is
there any downside of using array index to mach name, value pair?
And do we really need another layer of indirection (and complexity) to mach
simple name,value key pair in xstats?

> 
> This hid some bugs where pmds would either return wrong values count or
> invalid statistics indexes.
> 
> Link: 
> http://dpdk.org/browse/dpdk/commit/?id=5fd4d049692b2fde8bf49c7461b18180a8fd2545
> Link: http://dpdk.org/dev/patchwork/patch/40705/
> 
> Signed-off-by: David Marchand 
> ---
> 
> @stable: when this goes in, I recommend backporting this to all existing
> branches, as it makes it easier to show this kind of pmds bugs.

<...>

Re: [dpdk-dev] [PATCH v4 2/2] net/tap: support TSO (TCP Segment Offload)

[Wiles, Keith]

> On Jun 12, 2018, at 11:31 AM, Ophir Munk  wrote:
> 
> This commit implements TCP segmentation offload in TAP.
> librte_gso library is used to segment large TCP payloads (e.g. packets
> of 64K bytes size) into smaller MTU size buffers.
> By supporting TSO offload capability in software a TAP device can be used
> as a failsafe sub device and be paired with another PCI device which
> supports TSO capability in HW.
> 
> For more details on librte_gso implementation please refer to dpdk
> documentation.
> The number of newly generated TCP TSO segments is limited to 64.
> 
> Reviewed-by: Raslan Darawsheh 
> Signed-off-by: Ophir Munk 
> ---
> drivers/net/tap/Makefile  |   2 +-
> drivers/net/tap/rte_eth_tap.c | 159 +++---
> drivers/net/tap/rte_eth_tap.h |   3 +
> mk/rte.app.mk |   4 +-
> 4 files changed, 138 insertions(+), 30 deletions(-)
> 
> diff --git a/drivers/net/tap/Makefile b/drivers/net/tap/Makefile
> index ccc5c5f..3243365 100644
> --- a/drivers/net/tap/Makefile
> +++ b/drivers/net/tap/Makefile
> @@ -24,7 +24,7 @@ CFLAGS += -I.
> CFLAGS += $(WERROR_FLAGS)
> LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
> LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs -lrte_hash
> -LDLIBS += -lrte_bus_vdev
> +LDLIBS += -lrte_bus_vdev -lrte_gso
> 
> CFLAGS += -DTAP_MAX_QUEUES=$(TAP_MAX_QUEUES)
> 
> diff --git a/drivers/net/tap/rte_eth_tap.c b/drivers/net/tap/rte_eth_tap.c
> index c19f053..62b931f 100644
> --- a/drivers/net/tap/rte_eth_tap.c
> +++ b/drivers/net/tap/rte_eth_tap.c
> @@ -17,6 +17,7 @@
> #include 
> #include 
> 
> +#include 
> #include 
> #include 
> #include 
> @@ -55,6 +56,9 @@
> #define ETH_TAP_CMP_MAC_FMT "0123456789ABCDEFabcdef"
> #define ETH_TAP_MAC_ARG_FMT ETH_TAP_MAC_FIXED "|" ETH_TAP_USR_MAC_FMT
> 
> +#define TAP_GSO_MBUFS_NUM128
> +#define TAP_GSO_MBUF_SEG_SIZE128
> +
> static struct rte_vdev_driver pmd_tap_drv;
> static struct rte_vdev_driver pmd_tun_drv;
> 
> @@ -412,7 +416,8 @@ tap_tx_offload_get_queue_capa(void)
>   return DEV_TX_OFFLOAD_MULTI_SEGS |
>  DEV_TX_OFFLOAD_IPV4_CKSUM |
>  DEV_TX_OFFLOAD_UDP_CKSUM |
> -DEV_TX_OFFLOAD_TCP_CKSUM;
> +DEV_TX_OFFLOAD_TCP_CKSUM |
> +DEV_TX_OFFLOAD_TCP_TSO;
> }
> 
> /* Finalize l4 checksum calculation */
> @@ -479,23 +484,15 @@ tap_tx_l3_cksum(char *packet, uint64_t ol_flags, 
> unsigned int l2_len,
>   }
> }
> 
> -/* Callback to handle sending packets from the tap interface
> - */
> -static uint16_t
> -pmd_tx_burst(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
> +static inline void
> +tap_write_mbufs(struct tx_queue *txq, uint16_t num_mbufs,
> + struct rte_mbuf **pmbufs, uint16_t l234_hlen,
> + uint16_t *num_packets, unsigned long *num_tx_bytes)
> {
> - struct tx_queue *txq = queue;
> - uint16_t num_tx = 0;
> - unsigned long num_tx_bytes = 0;
> - uint32_t max_size;
>   int i;
> 
> - if (unlikely(nb_pkts == 0))
> - return 0;
> -
> - max_size = *txq->mtu + (ETHER_HDR_LEN + ETHER_CRC_LEN + 4);
> - for (i = 0; i < nb_pkts; i++) {
> - struct rte_mbuf *mbuf = bufs[num_tx];
> + for (i = 0; i < num_mbufs; i++) {
> + struct rte_mbuf *mbuf = pmbufs[i];
>   struct iovec iovecs[mbuf->nb_segs + 2];
>   struct tun_pi pi = { .flags = 0, .proto = 0x00 };
>   struct rte_mbuf *seg = mbuf;
> @@ -503,8 +500,7 @@ pmd_tx_burst(void *queue, struct rte_mbuf **bufs, 
> uint16_t nb_pkts)
>   int proto;
>   int n;
>   int j;
> - int k; /* first index in iovecs for copying segments */
> - uint16_t l234_hlen; /* length of layers 2,3,4 headers */
> + int k; /* current index in iovecs for copying segments */
>   uint16_t seg_len; /* length of first segment */
>   uint16_t nb_segs;
>   uint16_t *l4_cksum; /* l4 checksum (pseudo header + payload) */
> @@ -512,10 +508,6 @@ pmd_tx_burst(void *queue, struct rte_mbuf **bufs, 
> uint16_t nb_pkts)
>   uint16_t l4_phdr_cksum = 0; /* TCP/UDP pseudo header checksum */
>   uint16_t is_cksum = 0; /* in case cksum should be offloaded */
> 
> - /* stats.errs will be incremented */
> - if (rte_pktmbuf_pkt_len(mbuf) > max_size)
> - break;
> -
>   l4_cksum = NULL;
>   if (txq->type == ETH_TUNTAP_TYPE_TUN) {
>   /*
> @@ -554,9 +546,8 @@ pmd_tx_burst(void *queue, struct rte_mbuf **bufs, 
> uint16_t nb_pkts)
>   l234_hlen = mbuf->l2_len + mbuf->l3_len + mbuf->l4_len;
>   if (seg_len < l234_hlen)
>   break;
> -
> - /* To change checksums, work on a
> -  * copy of l2, l3 l4 headers.

Adding back in the blank line above would be nice

Re: [dpdk-dev] [PATCH v2] net/bonding: fix link status check

[Ferruh Yigit]

On 2/12/2018 6:26 PM, Chas Williams wrote:
> It's not clear to me that link_properties_valid() is even correct.  Nothing
> prevents an adapter from later negotiating a lower speed and would fail this
> test.  If both adapters are set to autoneg, that should be sufficient but
> nothing enforces the speed match after the slaves are configured.  So what is
> the point of this check?

Reminder of this patch.

This is waiting in the backlog for a long time. It is not even clear if the
patch is still valid or not.

Also based on missing response to Chas' clarification request, I am for
dropping/rejecting the patch.

@Declan, @Radu please chime in if this patch is required/valid.

> 
> On Tue, Feb 6, 2018 at 3:52 PM, Thomas Monjalon  > wrote:
> 
> 17/01/2018 17:02, Ferruh Yigit:
> > On 11/29/2017 3:42 PM, Tomasz Kulasek wrote:
> > > Some devices needs more time to initialize and bring interface up. 
> When
> > > link is down the link properties are not valid, e.g. link_speed is
> > > reported as 0 and this is not a valid speed for slave as well as for 
> whole
> > > bonding.
> > >
> > > During NIC (and bonding) initialization there's concurrency between
> > > updating link status and adding slave to the bonding.
> > >
> > > This patch:
> > >
> > >  - adds delay before configuring bonding (if link is down) to be sure 
> that
> > >    link status of new slave is valid,
> > >  - propagates information about link status from first slave with 
> link up
> > >    instead of first slave at all, to be sure that link speed is valid.
> > >
> > > Fixes: 6abd94d72ab5 ("net/bonding: fix check slaves link properties")
> > > Signed-off-by: Tomasz Kulasek  >
> > > ---
> > > v2 changes:
> > >  - Checkpatch warnings,
> > >  - Improved code style
> > Hi Declan,
> >
> > Any comment on this patch?
> 
> Any news?
> 
> 
> 

Re: [dpdk-dev] [PATCH v1] crypto/qat: add support for 8 byte 3DES

[Trahe, Fiona]

Hi Marko,

> -Original Message-
> From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Kovacevic, Marko
> Sent: Tuesday, June 12, 2018 11:40 AM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo ; Jain, Deepak K
> ; Kovacevic, Marko ; 
> ma...@dpdk.org
> Subject: [dpdk-dev] [PATCH v1] crypto/qat: add support for 8 byte 3DES
> 
> Added extra case to support 8 byte key size
> for 3DES CBC. Also changed capabilities to reflect
> the change.
> 
> Signed-off-by: Marko, Kovacevic 
> ---
>  drivers/crypto/qat/qat_adf/qat_algs.h| 1 +
>  drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 1 +
>  drivers/crypto/qat/qat_crypto_capabilities.h | 2 +-
>  test/test/test_cryptodev_des_test_vectors.h  | 6 --
>  4 files changed, 7 insertions(+), 3 deletions(-)

This piece of QAT code should also be modified to copy K1 to K2 and K3:
if ((cdesc->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_3DES)
&& (cipherkeylen == QAT_3DES_KEY_SZ_OPT2))
/* K3 not provided so use K1 = K3*/
memcpy(cdesc->cd_cur_ptr, cipherkey, padding_size);
else
memset(cdesc->cd_cur_ptr, 0, padding_size);
cdesc->cd_cur_ptr += padding_size;

I can see from the testcode added in the aesni_mb patch, that the test vector 
output
(ciphertext512_des) is the same as for plain DES. So as QAT would pad with 0s, 
this probably
explains why the tests are passing. But I can't see how the test can pass on 
aesni_mb
as K1 is being correctly copied there. I must be missing something?

[dpdk-dev] [PATCH] app/testpmd: fix crash when attaching a device

[Adrien Mazarguil]

Below commit checks global device information to determine if a port uses
the softnic driver once initialized. Problem is that this information is
not available at this point when a port is initialized interactively
through a "port attach XXX" command, crashing testpmd.

This patch systematically initializes global device information to address
this issue.

Fixes: 5b590fbe09b6 ("app/testpmd: add traffic management forwarding mode")
Cc: sta...@dpdk.org
Cc: Jasvinder Singh 

Signed-off-by: Adrien Mazarguil 
---
 app/test-pmd/testpmd.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index 35cf26674..24c199844 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -2355,16 +2355,15 @@ init_port_config(void)
 {
portid_t pid;
struct rte_port *port;
-   struct rte_eth_dev_info dev_info;
 
RTE_ETH_FOREACH_DEV(pid) {
port = &ports[pid];
port->dev_conf.fdir_conf = fdir_conf;
+   rte_eth_dev_info_get(pid, &port->dev_info);
if (nb_rxq > 1) {
-   rte_eth_dev_info_get(pid, &dev_info);
port->dev_conf.rx_adv_conf.rss_conf.rss_key = NULL;
port->dev_conf.rx_adv_conf.rss_conf.rss_hf =
-   rss_hf & dev_info.flow_type_rss_offloads;
+   rss_hf & port->dev_info.flow_type_rss_offloads;
} else {
port->dev_conf.rx_adv_conf.rss_conf.rss_key = NULL;
port->dev_conf.rx_adv_conf.rss_conf.rss_hf = 0;
-- 
2.11.0

Re: [dpdk-dev] [PATCH 1/7] net/cxgbe: query firmware for filter resources

[Ferruh Yigit]

On 6/8/2018 6:58 PM, Rahul Lakkireddy wrote:
> diff --git a/drivers/net/cxgbe/cxgbe_filter.h 
> b/drivers/net/cxgbe/cxgbe_filter.h
> new file mode 100644
> index 0..d69c79e80
> --- /dev/null
> +++ b/drivers/net/cxgbe/cxgbe_filter.h
> @@ -0,0 +1,97 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2014-2018 Chelsio Communications.
> + * All rights reserved.
> + */
> +

Hi Rahul,

This is a new file and copyright starts from 2014, is this intentional?

And @Thomas, @Hemant, are we allowed to have copyright start date in the past
for new files?

Thanks,
ferruh

Re: [dpdk-dev] [PATCH 0/7] cxgbe: add support to offload flows via rte_flow

[Ferruh Yigit]

On 6/8/2018 6:58 PM, Rahul Lakkireddy wrote:
> This series add basic support to offload flows to Chelsio T5/T6 NICs
> via rte_flow API. Chelsio NICs can support wildcard (maskfull) filters
> and exact (maskless) filters. Filters can be created in two regions
> available on Chelsio NICs. The smaller LE-TCAM region can support both
> maskfull and maskless filters; whereas, the larger HASH region can
> support only maskless filters. This series adds support for LE-TCAM
> region. Support for HASH region will be added in subsequent series.
> 
> This series adds support for:
> : IPv4, IPv6, TCP, and UDP.
> : Drop, Queue, and Count.
> 
> Support for more match items and actions will be added in subsequent
> series.
> 
> Patch 1 queries firmware for available filtering resources in the
> underlying device and adds table to manage these resources.
> 
> Patch 2 introduces rte_flow skeleton and implementes validate
> operation.
> 
> Patch 3 exports control queue needed for communicating filter
> create/delete requests with firmware.
> 
> Patch 4 adds firmware API to create filter work requests for
> creating/deleting filters and implements flow create operation.
> 
> Patch 5 adds flow destroy operation.
> 
> Patch 6 adds flow query operation to get filter hit and byte counts.
> 
> Patch 7 adds flow flush operation to delete all filters under specified
> port.
> 
> Thanks,
> Rahul
> 
> 
> Shagun Agrawal (7):
>   net/cxgbe: query firmware for filter resources
>   net/cxgbe: parse and validate flows
>   net/cxgbe: add control queue to communicate filter requests
>   net/cxgbe: implement flow create operation
>   net/cxgbe: implement flow destroy operation
>   net/cxgbe: implement flow query operation
>   net/cxgbe: implement flow flush operation

Series applied to dpdk-next-net/master, thanks.

(I have asked a question about copyright start year, based on answer an update
may require, which can be squashed into this set.)

Re: [dpdk-dev] [PATCH 1/7] net/cxgbe: query firmware for filter resources

[Thomas Monjalon]

13/06/2018 18:41, Ferruh Yigit:
> On 6/8/2018 6:58 PM, Rahul Lakkireddy wrote:
> > diff --git a/drivers/net/cxgbe/cxgbe_filter.h 
> > b/drivers/net/cxgbe/cxgbe_filter.h
> > new file mode 100644
> > index 0..d69c79e80
> > --- /dev/null
> > +++ b/drivers/net/cxgbe/cxgbe_filter.h
> > @@ -0,0 +1,97 @@
> > +/* SPDX-License-Identifier: BSD-3-Clause
> > + * Copyright(c) 2014-2018 Chelsio Communications.
> > + * All rights reserved.
> > + */
> > +
> 
> Hi Rahul,
> 
> This is a new file and copyright starts from 2014, is this intentional?
> 
> And @Thomas, @Hemant, are we allowed to have copyright start date in the past
> for new files?

I prefer having accurate copyright year because it is a quick hint about
how old the file is.
But I think there is no strong legal consequence.

Re: [dpdk-dev] [PATCH 1/7] net/cxgbe: query firmware for filter resources

[Wiles, Keith]

> On Jun 13, 2018, at 11:59 AM, Thomas Monjalon  wrote:
> 
> 13/06/2018 18:41, Ferruh Yigit:
>> On 6/8/2018 6:58 PM, Rahul Lakkireddy wrote:
>>> diff --git a/drivers/net/cxgbe/cxgbe_filter.h 
>>> b/drivers/net/cxgbe/cxgbe_filter.h
>>> new file mode 100644
>>> index 0..d69c79e80
>>> --- /dev/null
>>> +++ b/drivers/net/cxgbe/cxgbe_filter.h
>>> @@ -0,0 +1,97 @@
>>> +/* SPDX-License-Identifier: BSD-3-Clause
>>> + * Copyright(c) 2014-2018 Chelsio Communications.
>>> + * All rights reserved.
>>> + */
>>> +
>> 
>> Hi Rahul,
>> 
>> This is a new file and copyright starts from 2014, is this intentional?
>> 
>> And @Thomas, @Hemant, are we allowed to have copyright start date in the past
>> for new files?
> 
> I prefer having accurate copyright year because it is a quick hint about
> how old the file is.
> But I think there is no strong legal consequence.

I would guess if you have the wrong year and that year was before/after it was 
created then you will have a problem proving it was valid in a given year. Not 
having a real date can cause some problems if we ever have a conflict or law 
suit. We should always update the copyright when we modify a file and the 
correct date when it is created.


Regards,
Keith

[dpdk-dev] [PATCH] mlx5: fix log initialization

[Stephen Hemminger]

The mlx5 driver had two init functions, but this could
cause log initialization to be done after the
other initialization. Also, the name of the function does
not match convention (cut/paste error?).

Fix by initializing log type first at start of the pmd_init.
This also gets rid of having two constructor functions.

Fixes: a170a30d22a8 ("net/mlx5: use dynamic logging")
Signed-off-by: Stephen Hemminger 
---
 drivers/net/mlx5/mlx5.c | 13 +
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index c933e274fe32..6ec4f3178b6b 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1439,6 +1439,11 @@ RTE_INIT(rte_mlx5_pmd_init);
 static void
 rte_mlx5_pmd_init(void)
 {
+   /* Initialize driver log type. */
+   mlx5_logtype = rte_log_register("pmd.net.mlx5");
+   if (mlx5_logtype >= 0)
+   rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
+
/* Build the static tables for Verbs conversion. */
mlx5_set_ptype_table();
mlx5_set_cksum_table();
@@ -1480,11 +1485,3 @@ rte_mlx5_pmd_init(void)
 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");
-
-/** Initialize driver log type. */
-RTE_INIT(vdev_netvsc_init_log)
-{
-   mlx5_logtype = rte_log_register("pmd.net.mlx5");
-   if (mlx5_logtype >= 0)
-   rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
-}
-- 
2.17.1

[dpdk-dev] DPDK Release Status Meeting 06/07/2018

[Mcnamara, John]

DPDK Release Status Meeting 06/07/2018
==

Minutes from the weekly DPDK Release Status Meeting.

The DPDK Release Status Meeting is intended for DPDK Committers to discuss
the status of the master tree and sub-trees, and for project managers to
track progress or milestone dates.

The meeting occurs on Thursdays at 8:30 UTC. If you wish to attend just
send me and email and I will send you the invite.


Minutes 6 June 2018
---

Agenda:

* New Patchwork v2.
* Roadmaps.
* Upcoming changes from Tech Board meeting.
* Proposal deadline.
* Backlog of old patches.
* Proposal Deadline.
* Memory rework.
* Applying patches to master.
* Subtrees.

Stable

* Testing from Intel ongoing.
* Mellanox: 17.11 + 18.02.
* RedHat: putting testing in place.

Participants:

* Intel
* Mellanox
* RedHat
* Broadcom

New Patchwork version.

* Patchwork upgraded to V2.0.2 - Thanks Thomas, Mellanox and Stephen Finucane.
* Now supports "Series" i.e., patchsets for new patches.
* New client available that supports applying a full patch series:
  git-pw: http://patchwork.readthedocs.io/projects/git-pw/en/latest/

Roadmaps

* All contributing companies are encourages to send updated roadmaps for
  18.08 and later: http://dpdk.org/dev/roadmap
* Intel, Mellanox and Broadcom committed to sending updates.

Upcoming changes from Tech Board meeting.

* Explicit time limits for reviews/commits. Acked patches will be committed
  within 2 weeks. This has already been agreed previously and documented:
  
http://dpdk.org/doc/guides/contributing/patches.html#steps-to-getting-your-patch-merged
  There was a new recommendation that non-acked, non-commented files will
  be committed after 3 weeks if there are no objections/comments.

* Weekly merge. Subtrees to be merged on Thursdays. Master on Friday.

Backlog of old patches.

* There is a backlog of old patches:
  http://dpdk.org/dev/patchwork/project/dpdk/list/?order=date
  Need help cleaning this updated

Proposal Deadline

* 8 June
* Other dates: http://dpdk.org/dev/roadmap#dates

Memory rework

* Thomas reported that Mellanox are still seeing issues
* Will interface with Anatoly
* Will check with OvS

Applying patches to master

* Looking for patches to apply early.
* HyperV patches will be applied.

Subtrees

* Net: Not many patches yet
* Virtio: Quiet for now.
* Crypto: Nothing merged yet. 62 patches in the backlog.

Stable

* Testing from Intel ongoing.
* Mellanox: 17.11 + 18.02.
* RedHat: putting testing in place.

[dpdk-dev] Mlx meson build

[Stephen Hemminger]

Is there any chance of getting MLX drivers to build with meson?
It seems like it should be possible to always build with meson if rdma-core is 
present.
The meson build language has ways of checking for necessary dependencies.

Are you working on it for 18.08? or shall I bodge something together.

Re: [dpdk-dev] [PATCH v2] net/ixgbe: add query rule stats support for FDIR

[Lu, Wenzhuo]

Hi,

> -Original Message-
> From: Zhao1, Wei
> Sent: Wednesday, June 13, 2018 4:09 PM
> To: dev@dpdk.org
> Cc: Lu, Wenzhuo ; sta...@dpdk.org; Zhao1, Wei
> 
> Subject: [PATCH v2] net/ixgbe: add query rule stats support for FDIR
> 
> There are many registeres in x550 support stats of flow director filters, for
> example the number of added or removed rules and the number match or
> miss match packet count for this for port, all these important information
> can be read form registeres in x550 and display with command xstats.
> 
> Signed-off-by: Wei Zhao 
Acked-by: Wenzhuo Lu 

Re: [dpdk-dev] [PATCH v2] net/ixgbe: add support for VLAN in IP mode FDIR

[Lu, Wenzhuo]

Hi,

> -Original Message-
> From: Zhao1, Wei
> Sent: Wednesday, June 13, 2018 4:10 PM
> To: dev@dpdk.org
> Cc: Lu, Wenzhuo ; sta...@dpdk.org; Zhao1, Wei
> 
> Subject: [PATCH v2] net/ixgbe: add support for VLAN in IP mode FDIR
> 
> In IP mode FDIR, X550 can support not only 4 tuple parameters but also vlan
> tci in protocol, so add this feature to flow parser.
> 
> Fixes: 11777435c727 ("net/ixgbe: parse flow director filter")
> 
> Signed-off-by: Wei Zhao 
Acked-by: Wenzhuo Lu 

Re: [dpdk-dev] [PATCH v2] net/ixgbe: fix tunnel id format error for FDIR

[Lu, Wenzhuo]

Hi,

> -Original Message-
> From: Zhao1, Wei
> Sent: Wednesday, June 13, 2018 4:11 PM
> To: dev@dpdk.org
> Cc: Lu, Wenzhuo ; sta...@dpdk.org; Zhao1, Wei
> 
> Subject: [PATCH v2] net/ixgbe: fix tunnel id format error for FDIR
> 
> In cloud mode for FDIR, tunnel id should be set as protocol request, the
> lower 8 bits should be set as reserved.
> 
> Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for X550")
> Fixes: 11777435c727 ("net/ixgbe: parse flow director filter")
> 
> Signed-off-by: Wei Zhao 
Acked-by: Wenzhuo Lu 

Re: [dpdk-dev] [PATCH v2] net/ixgbe: fix tunnel type set error for FDIR

[Lu, Wenzhuo]

Hi Wei,


> -Original Message-
> From: Zhao1, Wei
> Sent: Wednesday, June 13, 2018 4:12 PM
> To: dev@dpdk.org
> Cc: Lu, Wenzhuo ; sta...@dpdk.org; Zhao1, Wei
> 
> Subject: [PATCH v2] net/ixgbe: fix tunnel type set error for FDIR
> 
> Tunnel type format should be translated to ixgbe required format before
> register set in FDIR cloud mode, Ans also some register not useful in cloud
> mode but only useful in IP mode should be set to zero as datasheet request.
> 
> Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for X550")
> Fixes: 11777435c727 ("net/ixgbe: parse flow director filter")
> 
> Signed-off-by: Wei Zhao 
> ---
> 
> v2:
> -change register write function for FDIRIPSA and FDIRIPDA.
> 
> ---
>  drivers/net/ixgbe/ixgbe_fdir.c | 17 +
> drivers/net/ixgbe/ixgbe_flow.c |  6 ++
>  2 files changed, 15 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c
> index 67ab627..3feb815 100644
> --- a/drivers/net/ixgbe/ixgbe_fdir.c
> +++ b/drivers/net/ixgbe/ixgbe_fdir.c
> @@ -771,8 +771,15 @@ ixgbe_fdir_filter_to_atr_input(const struct
> rte_eth_fdir_filter *fdir_filter,
>   input->formatted.inner_mac,
>   fdir_filter-
> >input.flow.tunnel_flow.mac_addr.addr_bytes,
>   sizeof(input->formatted.inner_mac));
> - input->formatted.tunnel_type =
> - fdir_filter->input.flow.tunnel_flow.tunnel_type;
> + if (fdir_filter->input.flow.tunnel_flow.tunnel_type ==
> + RTE_FDIR_TUNNEL_TYPE_VXLAN)
> + input->formatted.tunnel_type = 0x8000;
> + else if (fdir_filter->input.flow.tunnel_flow.tunnel_type ==
> + RTE_FDIR_TUNNEL_TYPE_NVGRE)
> + input->formatted.tunnel_type = 0;
Better use macros for 0x8000 and 0. And add comments why these values are used.

Re: [dpdk-dev] [PATCH] net/ixgbe: fix mask bits register set error for FDIR

[Lu, Wenzhuo]

Hi  Wei,

> -Original Message-
> From: Zhao1, Wei
> Sent: Wednesday, June 13, 2018 4:12 PM
> To: dev@dpdk.org
> Cc: Lu, Wenzhuo ; sta...@dpdk.org; Zhao1, Wei
> 
> Subject: [PATCH] net/ixgbe: fix mask bits register set error for FDIR
> 
> MAC address bits in mask registers should be set to zero when the is mac
> mask is 0xFF, otherwise if it is 0x0 these bits should be to 0x3F.
> 
> Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for X550")
> 
> Signed-off-by: Wei Zhao 
> ---
>  drivers/net/ixgbe/ixgbe_fdir.c | 12 +---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c
> index 3feb815..6d97aa3 100644
> --- a/drivers/net/ixgbe/ixgbe_fdir.c
> +++ b/drivers/net/ixgbe/ixgbe_fdir.c
> @@ -394,9 +394,15 @@ fdir_set_input_mask_x550(struct rte_eth_dev *dev)
>   IXGBE_FDIRIP6M_TNI_VNI;
> 
>   if (mode == RTE_FDIR_MODE_PERFECT_TUNNEL) {
> - mac_mask = info->mask.mac_addr_byte_mask;
> - fdiripv6m |= (mac_mask <<
> IXGBE_FDIRIP6M_INNER_MAC_SHIFT)
> - & IXGBE_FDIRIP6M_INNER_MAC;
> + mac_mask = info->mask.mac_addr_byte_mask & 0x3F;
Better not use 0x3f, you can change it to "IXGBE_FDIRIP6M_INNER_MAC >> 
IXGBE_FDIRIP6M_INNER_MAC_SHIFT"

> + if (mac_mask == 0x3F)
> + fdiripv6m &= ~IXGBE_FDIRIP6M_INNER_MAC;
> + else if (mac_mask == 0)
> + fdiripv6m |= IXGBE_FDIRIP6M_INNER_MAC;
> + else{
> + PMD_INIT_LOG(ERR, "invalid mac_addr_byte_mask");
> + return -EINVAL;
I think every byte of the MAC address can be masked. So this is not the invalid 
case. We should support 0x1f, 0xf, 0x7... as before.

> + }
> 
>   switch (info->mask.tunnel_type_mask) {
>   case 0:
> --
> 2.7.5

Re: [dpdk-dev] [PATCH] net/ixgbe: fix mask bits register set error for FDIR

[Zhao1, Wei]

Hi, wenzhuo

> -Original Message-
> From: Lu, Wenzhuo
> Sent: Thursday, June 14, 2018 8:53 AM
> To: Zhao1, Wei ; dev@dpdk.org
> Cc: sta...@dpdk.org
> Subject: RE: [PATCH] net/ixgbe: fix mask bits register set error for FDIR
> 
> Hi  Wei,
> 
> > -Original Message-
> > From: Zhao1, Wei
> > Sent: Wednesday, June 13, 2018 4:12 PM
> > To: dev@dpdk.org
> > Cc: Lu, Wenzhuo ; sta...@dpdk.org; Zhao1, Wei
> > 
> > Subject: [PATCH] net/ixgbe: fix mask bits register set error for FDIR
> >
> > MAC address bits in mask registers should be set to zero when the is
> > mac mask is 0xFF, otherwise if it is 0x0 these bits should be to 0x3F.
> >
> > Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for
> > X550")
> >
> > Signed-off-by: Wei Zhao 
> > ---
> >  drivers/net/ixgbe/ixgbe_fdir.c | 12 +---
> >  1 file changed, 9 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/net/ixgbe/ixgbe_fdir.c
> > b/drivers/net/ixgbe/ixgbe_fdir.c index 3feb815..6d97aa3 100644
> > --- a/drivers/net/ixgbe/ixgbe_fdir.c
> > +++ b/drivers/net/ixgbe/ixgbe_fdir.c
> > @@ -394,9 +394,15 @@ fdir_set_input_mask_x550(struct rte_eth_dev
> *dev)
> > IXGBE_FDIRIP6M_TNI_VNI;
> >
> > if (mode == RTE_FDIR_MODE_PERFECT_TUNNEL) {
> > -   mac_mask = info->mask.mac_addr_byte_mask;
> > -   fdiripv6m |= (mac_mask <<
> > IXGBE_FDIRIP6M_INNER_MAC_SHIFT)
> > -   & IXGBE_FDIRIP6M_INNER_MAC;
> > +   mac_mask = info->mask.mac_addr_byte_mask & 0x3F;
> Better not use 0x3f, you can change it to "IXGBE_FDIRIP6M_INNER_MAC >>
> IXGBE_FDIRIP6M_INNER_MAC_SHIFT"
> 
> > +   if (mac_mask == 0x3F)
> > +   fdiripv6m &= ~IXGBE_FDIRIP6M_INNER_MAC;
> > +   else if (mac_mask == 0)
> > +   fdiripv6m |= IXGBE_FDIRIP6M_INNER_MAC;
> > +   else{
> > +   PMD_INIT_LOG(ERR, "invalid
> mac_addr_byte_mask");
> > +   return -EINVAL;
> I think every byte of the MAC address can be masked. So this is not the
> invalid case. We should support 0x1f, 0xf, 0x7... as before.

Ok, I will commit v3
> 
> > +   }
> >
> > switch (info->mask.tunnel_type_mask) {
> > case 0:
> > --
> > 2.7.5

Re: [dpdk-dev] [PATCH v2] net/ixgbe: fix tunnel type set error for FDIR

[Zhao1, Wei]

Hi,

> -Original Message-
> From: Lu, Wenzhuo
> Sent: Thursday, June 14, 2018 8:42 AM
> To: Zhao1, Wei ; dev@dpdk.org
> Cc: sta...@dpdk.org
> Subject: RE: [PATCH v2] net/ixgbe: fix tunnel type set error for FDIR
> 
> Hi Wei,
> 
> 
> > -Original Message-
> > From: Zhao1, Wei
> > Sent: Wednesday, June 13, 2018 4:12 PM
> > To: dev@dpdk.org
> > Cc: Lu, Wenzhuo ; sta...@dpdk.org; Zhao1, Wei
> > 
> > Subject: [PATCH v2] net/ixgbe: fix tunnel type set error for FDIR
> >
> > Tunnel type format should be translated to ixgbe required format
> > before register set in FDIR cloud mode, Ans also some register not
> > useful in cloud mode but only useful in IP mode should be set to zero as
> datasheet request.
> >
> > Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for
> > X550")
> > Fixes: 11777435c727 ("net/ixgbe: parse flow director filter")
> >
> > Signed-off-by: Wei Zhao 
> > ---
> >
> > v2:
> > -change register write function for FDIRIPSA and FDIRIPDA.
> >
> > ---
> >  drivers/net/ixgbe/ixgbe_fdir.c | 17 +
> > drivers/net/ixgbe/ixgbe_flow.c |  6 ++
> >  2 files changed, 15 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/net/ixgbe/ixgbe_fdir.c
> > b/drivers/net/ixgbe/ixgbe_fdir.c index 67ab627..3feb815 100644
> > --- a/drivers/net/ixgbe/ixgbe_fdir.c
> > +++ b/drivers/net/ixgbe/ixgbe_fdir.c
> > @@ -771,8 +771,15 @@ ixgbe_fdir_filter_to_atr_input(const struct
> > rte_eth_fdir_filter *fdir_filter,
> > input->formatted.inner_mac,
> > fdir_filter-
> > >input.flow.tunnel_flow.mac_addr.addr_bytes,
> > sizeof(input->formatted.inner_mac));
> > -   input->formatted.tunnel_type =
> > -   fdir_filter->input.flow.tunnel_flow.tunnel_type;
> > +   if (fdir_filter->input.flow.tunnel_flow.tunnel_type ==
> > +   RTE_FDIR_TUNNEL_TYPE_VXLAN)
> > +   input->formatted.tunnel_type = 0x8000;
> > +   else if (fdir_filter->input.flow.tunnel_flow.tunnel_type ==
> > +   RTE_FDIR_TUNNEL_TYPE_NVGRE)
> > +   input->formatted.tunnel_type = 0;
> Better use macros for 0x8000 and 0. And add comments why these values
> are used.

Ok, I will add some comment.

Re: [dpdk-dev] [PATCH 01/16] config: add Cavium CPT PMD skeleton

[Jerin Jacob]

-Original Message-
> Date: Fri,  8 Jun 2018 22:15:10 +0530
> From: Anoob Joseph 
> To: Akhil Goyal , Pablo de Lara
>  , Thomas Monjalon 
> Cc: Nithin Dabilpuram , Ankur Dwivedi
>  , Jerin Jacob ,
>  Murthy NSSR , Narayana Prasad
>  , Ragothaman Jayaraman
>  , Srisivasubramanian Srinivasan
>  , dev@dpdk.org
> Subject: [PATCH 01/16] config: add Cavium CPT PMD skeleton
> X-Mailer: git-send-email 2.7.4
> 
> From: Nithin Dabilpuram 
> 
> Add makefile and config file options.
> Also add version map file and maintainers file to
> claim responsibility.
> 
> Signed-off-by: Ankur Dwivedi 
> Signed-off-by: Murthy NSSR 
> Signed-off-by: Nithin Dabilpuram 
> Signed-off-by: Ragothaman Jayaraman 
> Signed-off-by: Srisivasubramanian Srinivasan 
> 
> ---
>  MAINTAINERS|  7 ++
>  config/common_base |  8 ++
>  drivers/crypto/Makefile|  1 +
>  drivers/crypto/cpt/Makefile| 40 
> ++
>  drivers/crypto/cpt/rte_pmd_cpt_version.map |  4 +++
>  mk/rte.app.mk  |  2 +-
>  6 files changed, 61 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/crypto/cpt/Makefile
>  create mode 100644 drivers/crypto/cpt/rte_pmd_cpt_version.map
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4667fa7..1b4a8eb 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -504,6 +504,13 @@ F: drivers/net/octeontx/
>  F: doc/guides/nics/octeontx.rst
>  F: doc/guides/nics/features/octeontx.ini
>  
> +Cavium CPT
> +M: Ankur Dwivedi 
> +M: Nithin Dabilpuram 
> +M: Murthy NSSR 
> +F: drivers/crypto/cpt/
> +F: doc/guides/cryptodevs/cpt.rst

Move this under crypto drivers section if it is not already the case.

> +
>  Chelsio cxgbe
>  M: Rahul Lakkireddy 
>  F: drivers/net/cxgbe/
> diff --git a/config/common_base b/config/common_base
> index 6b0d1cb..85e03a8 100644
> --- a/config/common_base
> +++ b/config/common_base
> @@ -631,6 +631,14 @@ CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=n
>  CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=n
>  
>  #
> +# Compile PMD for Cavium CPT Crypto device
> +#
> +CONFIG_RTE_LIBRTE_PMD_CPT=n

Please enable this option  by default, If there are arm64 specific 
usage then please stub it out so that it can compile on 
all architectures. It will help to verify the API changes
across the architecture by author.(i.e author should not depend arm64
box to verify the compilation changes)
and enable distribution OS support like Ubuntu as they building with
default arm64 config.


> +CONFIG_RTE_LIBRTE_PMD_CPT_DEBUG_INIT=n
> +CONFIG_RTE_LIBRTE_PMD_CPT_DEBUG_RX=n
> +CONFIG_RTE_LIBRTE_PMD_CPT_DEBUG_TX=n

This config option is not required when we are using
dynamic debugging

> +
> +#
>  # Compile raw device support
>  # EXPERIMENTAL: API may change without prior notice
>  #
> diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
> index 1d0c88e..a0515f3 100644
> --- a/drivers/crypto/Makefile
> +++ b/drivers/crypto/Makefile
> @@ -22,5 +22,6 @@ ifeq ($(CONFIG_RTE_LIBRTE_DPAA_BUS),y)
>  DIRS-$(CONFIG_RTE_LIBRTE_PMD_DPAA_SEC) += dpaa_sec
>  endif
>  DIRS-$(CONFIG_RTE_LIBRTE_PMD_VIRTIO_CRYPTO) += virtio
> +DIRS-$(CONFIG_RTE_LIBRTE_PMD_CPT) += cpt
>  
>  include $(RTE_SDK)/mk/rte.subdir.mk
> diff --git a/drivers/crypto/cpt/Makefile b/drivers/crypto/cpt/Makefile
> new file mode 100644
> index 000..b2d950d
> --- /dev/null
> +++ b/drivers/crypto/cpt/Makefile
> @@ -0,0 +1,40 @@
> +
> +include $(RTE_SDK)/mk/rte.vars.mk
> +
> +# library name
> +LIB = librte_pmd_cptvf.a
> +
> +# library version
> +LIBABIVER := 1
> +
> +# build flags
> +CFLAGS += $(WERROR_FLAGS)
> +
> +# external library include paths
> +CFLAGS += -I$(LIBCRYPTO_THUNDERX_PATH)/include
> +LDLIBS += -L$(LIBCRYPTO_THUNDERX_PATH) -lcrypto

What is the external library dependency here? Does look like
it is documented in doc patch.

If there is something, I think, better to change LIBCRYPTO_THUNDERX_PATH
to LIBCRYPTO_OCTEONTX_PATH

> +LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
> +LDLIBS += -lrte_cryptodev
> +LDLIBS += -lrte_pci -lrte_bus_pci
> +
> +VPATH += $(RTE_SDK)/drivers/crypto/cpt/base
> +
> +CFLAGS += -O3
> +#CFLAGS += -DAUTH_SOFT_COMPUTE_IPAD_OPAD
> +#CFLAGS += -DCPT_DEBUG

Remove commented out stuff.

> +
> +SRCS-$(CONFIG_RTE_LIBRTE_PMD_CPT) +=
> +
> +# export include files
> +SYMLINK-y-include +=
> +
> +# versioning export map
> +EXPORT_MAP := rte_pmd_cpt_version.map
> +
> +# library dependencies
> +DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_CPT) += lib/librte_eal
> +DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_CPT) += lib/librte_cryptodev
> +DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_CPT) += lib/librte_mempool lib/librte_mbuf
> +DEPDIRS-$(CONFIG_RTE_LIBRTE_PMD_CPT) += lib/librte_malloc
> +
> +include $(RTE_SDK)/mk/rte.lib.mk
> diff --git a/drivers/crypto/cpt/rte_pmd_cpt_version.map 
> b/drivers/crypto/cpt/rte_pmd_cpt_version.map
> new file mode 100644
> index 000..9b9ab1a
> --- /dev/null
> +++ b/drivers/crypto/cpt/rte_pmd_cpt_version.map
> @@ -0,

Re: [dpdk-dev] [PATCH 02/16] crypto/cpt/base: add hardware definitions Cavium CPT

[Jerin Jacob]

-Original Message-
> Date: Fri,  8 Jun 2018 22:15:11 +0530
> From: Anoob Joseph 
> To: Akhil Goyal , Pablo de Lara
>  , Thomas Monjalon 
> Cc: Nithin Dabilpuram , Ankur Dwivedi
>  , Jerin Jacob ,
>  Murthy NSSR , Narayana Prasad
>  , Ragothaman Jayaraman
>  , Srisivasubramanian Srinivasan
>  , dev@dpdk.org
> Subject: [PATCH 02/16] crypto/cpt/base: add hardware definitions Cavium CPT
> X-Mailer: git-send-email 2.7.4
> 
> From: Nithin Dabilpuram 
> 
> Adds hardware specific definitions for Cavium CPT device.
> 
> Signed-off-by: Ankur Dwivedi 
> Signed-off-by: Murthy NSSR 
> Signed-off-by: Nithin Dabilpuram 
> Signed-off-by: Ragothaman Jayaraman 
> Signed-off-by: Srisivasubramanian Srinivasan 
> 
> ---
>  drivers/crypto/cpt/base/cpt_hw_types.h  | 836 
> 
>  drivers/crypto/cpt/base/mcode_defines.h | 215 
>  2 files changed, 1051 insertions(+)
>  create mode 100644 drivers/crypto/cpt/base/cpt_hw_types.h
>  create mode 100644 drivers/crypto/cpt/base/mcode_defines.h
> 
> diff --git a/drivers/crypto/cpt/base/cpt_hw_types.h 
> b/drivers/crypto/cpt/base/cpt_hw_types.h
> new file mode 100644
> index 000..b4b2af1
> --- /dev/null
> +++ b/drivers/crypto/cpt/base/cpt_hw_types.h
> @@ -0,0 +1,836 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2017 Cavium, Inc
> + */
> +
> +#ifndef __CPT_HW_TYPES_H
> +#define __CPT_HW_TYPES_H
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

Use alphabetical order.

> +
> +#define CPT_INST_SIZE(64)
> +#define CPT_VQ_CHUNK_ALIGN   (128) /**< 128 byte align */
> +#define CPT_NEXT_CHUNK_PTR_SIZE (8)
> +#define CPT_INST_CHUNK_MAX_SIZE (1023)
> +
> +#define CPT_PF_VF_MAILBOX_SIZE   (2)
> +
> +#define CPT_VF_INTR_MBOX_MASK   (1<<0)
> +#define CPT_VF_INTR_DOVF_MASK   (1<<1)
> +#define CPT_VF_INTR_IRDE_MASK   (1<<2)
> +#define CPT_VF_INTR_NWRP_MASK   (1<<3)
> +#define CPT_VF_INTR_SWERR_MASK  (1<<4)
> +#define CPT_VF_INTR_HWERR_MASK  (1<<5)
> +#define CPT_VF_INTR_FAULT_MASK  (1<<6)
> +
> +/*
> + * CPT_INST_S software command definitions
> + * Words EI (0-3)
> + */
> +typedef union {
> + uint64_t u64;
> + struct {
> + uint16_t opcode;
> + uint16_t param1;
> + uint16_t param2;
> + uint16_t dlen;
> + } s;
> +} vq_cmd_word0_t;
> +
> +typedef union {
> + uint64_t u64;
> + struct {
> +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__

Use DPDK primitives for endian checking.

> + uint64_t grp: 3;
> + uint64_t cptr   : 61;
> +#else
> + uint64_t cptr   : 61;
> + uint64_t grp: 3;
> +#endif
> + } s;
> + uint8_t reg_A[8];
> + uint8_t ci_key[16];
> +} mc_kasumi_ctx_t;
> +
> +#define ENC_CTRL(fctx)  fctx.enc.enc_ctrl.e
> +#define AUTH_CTRL(fctx) fctx.auth.auth_ctrl
> +#define P_ENC_CTRL(fctx)  fctx->enc.enc_ctrl.e
> +
> +#define MAX_IVLEN 16
> +#define MAX_KEYLEN 32

If something specific to CPT, IMO, better to start with CPT_ to
avoid name collision.

[dpdk-dev] [PATCH v1] mbuf: fix RTE_ETH_IS_IPV6_HDR comment typo

[Haiyue Wang]

It should be IPv6, not IPv4.

Cc: sta...@dpdk.org

Signed-off-by: Haiyue Wang 
---
 lib/librte_mbuf/rte_mbuf_ptype.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/librte_mbuf/rte_mbuf_ptype.h b/lib/librte_mbuf/rte_mbuf_ptype.h
index 79ea314..01acc66 100644
--- a/lib/librte_mbuf/rte_mbuf_ptype.h
+++ b/lib/librte_mbuf/rte_mbuf_ptype.h
@@ -653,9 +653,9 @@ extern "C" {
 #define  RTE_ETH_IS_IPV4_HDR(ptype) ((ptype) & RTE_PTYPE_L3_IPV4)
 
 /**
- * Check if the (outer) L3 header is IPv4. To avoid comparing IPv4 types one by
- * one, bit 6 is selected to be used for IPv4 only. Then checking bit 6 can
- * determine if it is an IPV4 packet.
+ * Check if the (outer) L3 header is IPv6. To avoid comparing IPv6 types one by
+ * one, bit 6 is selected to be used for IPv6 only. Then checking bit 6 can
+ * determine if it is an IPV6 packet.
  */
 #define  RTE_ETH_IS_IPV6_HDR(ptype) ((ptype) & RTE_PTYPE_L3_IPV6)
 
-- 
2.7.4

Re: [dpdk-dev] [PATCH 03/16] crypto/cpt/base: add hardware initialization API for CPT

[Jerin Jacob]

-Original Message-
> Date: Fri,  8 Jun 2018 22:15:12 +0530
> From: Anoob Joseph 
> To: Akhil Goyal , Pablo de Lara
>  , Thomas Monjalon 
> Cc: Nithin Dabilpuram , Ankur Dwivedi
>  , Jerin Jacob ,
>  Murthy NSSR , Narayana Prasad
>  , Ragothaman Jayaraman
>  , Srisivasubramanian Srinivasan
>  , dev@dpdk.org
> Subject: [PATCH 03/16] crypto/cpt/base: add hardware initialization API for
>  CPT
> X-Mailer: git-send-email 2.7.4
> 
> From: Nithin Dabilpuram 
> 
> Adds hardware device initialization specific api for Cavium CPT device.
> 
> Signed-off-by: Ankur Dwivedi 
> Signed-off-by: Murthy NSSR 
> Signed-off-by: Nithin Dabilpuram 
> Signed-off-by: Ragothaman Jayaraman 
> Signed-off-by: Srisivasubramanian Srinivasan 
> 
> ---
>  drivers/crypto/cpt/base/cpt8xxx_device.c | 200 
>  drivers/crypto/cpt/base/cpt8xxx_device.h |  85 +++
>  drivers/crypto/cpt/base/cpt_debug.h  | 231 +++
>  drivers/crypto/cpt/base/cpt_device.c | 383 
> +++
>  drivers/crypto/cpt/base/cpt_device.h | 162 +
>  drivers/crypto/cpt/base/cpt_vf_mbox.c| 176 ++
>  drivers/crypto/cpt/base/cpt_vf_mbox.h|  60 +
>  7 files changed, 1297 insertions(+)
>  create mode 100644 drivers/crypto/cpt/base/cpt8xxx_device.c
>  create mode 100644 drivers/crypto/cpt/base/cpt8xxx_device.h
>  create mode 100644 drivers/crypto/cpt/base/cpt_debug.h
>  create mode 100644 drivers/crypto/cpt/base/cpt_device.c
>  create mode 100644 drivers/crypto/cpt/base/cpt_device.h
>  create mode 100644 drivers/crypto/cpt/base/cpt_vf_mbox.c
>  create mode 100644 drivers/crypto/cpt/base/cpt_vf_mbox.h
> 
> +#include 
> +#include "cpt_request_mgr.h"
> +#include 
> +
> +#ifdef CPT_DEBUG

Remove CPT_DEBUG. No harming in compiling these definitions either case.
It will avoid the chance of build breakage.

> +static inline void *
> +os_iova2va(phys_addr_t physaddr)
> +{
> + return rte_mem_iova2virt(physaddr);
> +}
> +
> +static inline void __cpt_dump_buffer(const char *prefix_str,
> +  void *buf, size_t len, int rowsize)
> +{
> + size_t i = 0;
> + unsigned char *ptr = (unsigned char *)buf;
> +
> + PRINT("\n%s[%p]", prefix_str, buf);


Something cpt_log() makes more sense than PRINT

> + PRINT("\n%.8lx: ", i);
> +
> + if (buf == NULL) {
> + PRINT("\n!!!NULL ptr\n");
> + abort();
> + }
> +
> + for (i = 0; i < len; i++) {
> + if (i && !(i % rowsize))
> + PRINT("\n%.8lx: ", i);
> + PRINT("%02x ", ptr[i]);
> + }
> + PRINT("\n\n");
> +}
> +
> +static inline void cpt_dump_buffer(const char *prefix_str,
> +void *buf, size_t len)
> +{
> + __cpt_dump_buffer(prefix_str, buf, len, 8);
> +}
> +
> +#define cpt_fn_trace(fmt, ...)   \
> + do {\
> + if (msg_req_trace(debug))   \
> + cpt_info(fmt, ##__VA_ARGS__);   \
> + } while (0)
> +
> +static inline void dump_cpt_request_info(struct cpt_request_info *req,
> +  cpt_inst_s_t *inst)
> +{
> + vq_cmd_word0_t vq_cmd_w0;
> + vq_cmd_word3_t vq_cmd_w3;
> + uint16_t opcode, param1, param2, dlen;
> +
> + vq_cmd_w0.u64 = be64toh(inst->s.ei0);
> + opcode = be16toh(vq_cmd_w0.s.opcode);
> + param1 = be16toh(vq_cmd_w0.s.param1);
> + param2 = be16toh(vq_cmd_w0.s.param2);
> + dlen = be16toh(vq_cmd_w0.s.dlen);
> + vq_cmd_w3.u64 = inst->s.ei3;
> +
> + PRINT("\ncpt Request Info...\n");
> + PRINT("\tdma_mode: %u\n", req->dma_mode);
> + PRINT("\tis_se   : %u\n", req->se_req);
> + PRINT("\tgrp : 0\n");
> +
> + PRINT("\nRequest Info...\n");
> + PRINT("\topcode: 0x%0x\n", opcode);
> + PRINT("\tparam1: 0x%0x\n", param1);
> + PRINT("\tparam2: 0x%0x\n", param2);
> + PRINT("\tdlen: %u\n", dlen);
> + PRINT("\tctx_handle vaddr %p, dma 0x%lx\n",
> +  os_iova2va((uint64_t)vq_cmd_w3.s.cptr),
> +  (uint64_t)vq_cmd_w3.s.cptr);
> +}
> +
> + list_ptr[i*4+0].dma_addr = be64toh(sg_ptr->ptr[0]);
> + list_ptr[i*4+1].dma_addr = be64toh(sg_ptr->ptr[1]);
> + list_ptr[i*4+2].dma_addr = be64toh(sg_ptr->ptr[2]);
> + list_ptr[i*4+3].dma_addr = be64toh(sg_ptr->ptr[3]);

use dpdk primitives for be64toh if possible.

> +
> + list_ptr[i*4+0].vaddr =
> + os_iova2va(list_ptr[i*4+0].dma_addr);
> + list_ptr[i*4+1].vaddr =
> + os_iova2va(list_ptr[i*4+1].dma_addr);
> + list_ptr[i*4+2].vaddr =
> + os_iova2va(list_ptr[i*4+2].dma_addr);
> + list_ptr[i*4+3].vaddr =
> + os_iova2va(list_ptr[i*4+3].d

Re: [dpdk-dev] [PATCH 04/16] crypto/cpt/base: add hardware enq/deq API for CPT

[Jerin Jacob]

-Original Message-
> Date: Fri,  8 Jun 2018 22:15:13 +0530
> From: Anoob Joseph 
> To: Akhil Goyal , Pablo de Lara
>  , Thomas Monjalon 
> Cc: Ankur Dwivedi , Jerin Jacob
>  , Murthy NSSR
>  , Narayana Prasad
>  , Nithin Dabilpuram
>  , Ragothaman Jayaraman
>  , Srisivasubramanian Srinivasan
>  , dev@dpdk.org
> Subject: [PATCH 04/16] crypto/cpt/base: add hardware enq/deq API for CPT
> X-Mailer: git-send-email 2.7.4
> 
> From: Ankur Dwivedi 
> 
> Adds hardware enqueue/dequeue API of instructions to a queue pair
> for Cavium CPT device.
> 
> Signed-off-by: Ankur Dwivedi 
> Signed-off-by: Murthy NSSR 
> Signed-off-by: Nithin Dabilpuram 
> Signed-off-by: Ragothaman Jayaraman 
> Signed-off-by: Srisivasubramanian Srinivasan 
> 
> ---
>  drivers/crypto/cpt/base/cpt.h | 102 +++
>  drivers/crypto/cpt/base/cpt_device.c  |   4 +-
>  drivers/crypto/cpt/base/cpt_request_mgr.c | 424 
> ++
>  drivers/crypto/cpt/base/cpt_request_mgr.h |  75 ++
>  4 files changed, 603 insertions(+), 2 deletions(-)
>  create mode 100644 drivers/crypto/cpt/base/cpt.h
>  create mode 100644 drivers/crypto/cpt/base/cpt_request_mgr.c
>  create mode 100644 drivers/crypto/cpt/base/cpt_request_mgr.h
> 
> diff --git a/drivers/crypto/cpt/base/cpt.h b/drivers/crypto/cpt/base/cpt.h
> new file mode 100644
> index 000..11407ae
> --- /dev/null
> +++ b/drivers/crypto/cpt/base/cpt.h
> @@ -0,0 +1,102 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2017 Cavium, Inc
> + */
> +
> +#ifndef __BASE_CPT_H__
> +#define __BASE_CPT_H__
> +
> +/* Linux Includes */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

alphabetical order

> +
> +/* DPDK includes */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "../cpt_pmd_logs.h"
> +#include "mcode_defines.h"
> +
> +/** @cond __INTERNAL_DOCUMENTATION__ */
> +
> +/* Declarations */
> +typedef struct cpt_instance cpt_instance_t;
> +
> +/*
> + * Generic Defines
> + */
> +
> +/* Buffer pointer */
> +typedef struct buf_ptr {
> + void *vaddr;
> + phys_addr_t dma_addr;
> + uint32_t size;
> + uint32_t resv;
> +} buf_ptr_t;
> +
> +/* IOV Pointer */
> +typedef struct{
> + int buf_cnt;
> + buf_ptr_t bufs[0];
> +} iov_ptr_t;
> +
> +typedef struct app_data {
> + uint64_t pktout;
> + void *marker;
> +} app_data_t;
> +
> +/* Instance operations */
> +
> +/* Enqueue an SE/AE request */
> +int cpt_enqueue_req(cpt_instance_t *inst, void *req, uint8_t flags,
> +   void *event, uint64_t event_flags);
> +
> +/* Dequeue completed SE requests as burst */
> +int32_t cpt_dequeue_burst(cpt_instance_t *instance, uint16_t cnt,
> +   void *resp[], uint8_t cc[]);
> +
> +/* Marks event as done in event driven mode */
> +int32_t cpt_event_mark_done(void *marker, uint8_t *op_error);
> +
> +/* Checks queue full condition */
> +uint16_t cpt_queue_full(cpt_instance_t *instance);
> +
> +/* Misc */
> +uint32_t cpt_get_instance_count(void);
> +
> +#define ENQ_FLAG_SYNC0x01
> +#define ENQ_FLAG_EVENT   0x02
> +#define ENQ_FLAG_NODOORBELL  0x04
> +#define ENQ_FLAG_ONLY_DOORBELL   0x08
> +
> +
> +#define OCTTX_EVENT_TAG(__flags) (__flags & 0x)
> +#define OCTTX_EVENT_GRP(__flags) ((__flags >> 32) & 0x)
> +#define OCTTX_EVENT_TT(__flags) ((__flags >> 48) & 0xff)
> +
> +#define OCTTX_EVENT_FLAGS(__tag, __grp, __tt)\
> + (((uint64_t)__tag & 0x) |\
> +  (((uint64_t)__grp & 0x) << 32) |\
> +  (((uint64_t)__tt & 0xff) << 48))
> +
> +
> +/* cpt instance */
> +struct cpt_instance {
> + /* 0th cache line */
> + uint32_t queue_id;
> + uint64_t rsvd;
> +};
> +

#ifndef __hot
> +#define __hot __attribute__((hot))
#endif

> +/** @endcond */
> +
> +#endif /* __BASE_CPT_H__ */
> diff --git a/drivers/crypto/cpt/base/cpt_device.c 
> b/drivers/crypto/cpt/base/cpt_device.c
> index b7cd5b5..a50e5b8 100644
> --- a/drivers/crypto/cpt/base/cpt_device.c
> +++ b/drivers/crypto/cpt/base/cpt_device.c
> @@ -193,7 +193,7 @@ int cptvf_get_resource(struct cpt_vf *dev,
>   uint64_t *next_ptr;
>   uint64_t pg_sz = sysconf(_SC_PAGESIZE);
>  
> - PMD_DRV_LOG(DEBUG, "Initializing csp resource %s\n", cptvf->dev_name);
> + PMD_DRV_LOG(DEBUG, "Initializing cpt resource %s\n", cptvf->dev_name);
>  
>   cpt_instance = &cptvf->instance;
>  
> @@ -323,7 +323,7 @@ int cptvf_put_resource(cpt_instance_t *instance)
>   return -EINVAL;
>   }
>  
> - PMD_DRV_LOG(DEBUG, "Releasing csp device %s\n", cptvf->dev_name);
> + PMD_DRV_LOG(DEBUG, "Releasing cpt device %s\n", cptvf->dev_name);
>  
>   rz = (struct rte_memzone *)instance->rsvd;
>   rte_memzone_free(rz);
> diff --git a/drivers/crypto/cpt/base/cpt_request_mgr.c 
> b/drivers/crypto/cpt/base/cpt_request_mgr.c
> new file mode 100644
> index 000..8b9b1ff
> --- /dev/null
> +++ 

Re: [dpdk-dev] [PATCH 06/16] crypto/cpt/base: add sym crypto request prepare for CPT

[Jerin Jacob]

-Original Message-
> Date: Fri,  8 Jun 2018 22:15:15 +0530
> From: Anoob Joseph 
> To: Akhil Goyal , Pablo de Lara
>  , Thomas Monjalon 
> Cc: Ankur Dwivedi , Jerin Jacob
>  , Murthy NSSR
>  , Narayana Prasad
>  , Nithin Dabilpuram
>  , Ragothaman Jayaraman
>  , Srisivasubramanian Srinivasan
>  , dev@dpdk.org
> Subject: [PATCH 06/16] crypto/cpt/base: add sym crypto request prepare for
>  CPT
> X-Mailer: git-send-email 2.7.4
> 
> From: Ankur Dwivedi 
> 
> These functions help in preparing symmetric crypto requests
> for the supported cipher/auth/aead. This includes all supported
> algos except Kasumi, Snow3G, Zuc, HMAC_ONLY and HASH_ONLY cases.
> 
> Signed-off-by: Ankur Dwivedi 
> Signed-off-by: Murthy NSSR 
> Signed-off-by: Nithin Dabilpuram 
> Signed-off-by: Ragothaman Jayaraman 
> Signed-off-by: Srisivasubramanian Srinivasan 
> 
> ---
>  drivers/crypto/cpt/base/cpt.h |  129 +
>  drivers/crypto/cpt/base/cpt_ops.c | 1021 
> +
>  2 files changed, 1150 insertions(+)
> 
> diff --git a/drivers/crypto/cpt/base/cpt.h b/drivers/crypto/cpt/base/cpt.h
> index 11407ae..54b1cb6 100644
> --- a/drivers/crypto/cpt/base/cpt.h
> +++ b/drivers/crypto/cpt/base/cpt.h
> @@ -54,6 +54,135 @@
>   void *marker;
>  } app_data_t;
>  
> +/*
> + * Parameters for Flexi Crypto
> + * requests
> + */
> +#define VALID_AAD_BUF 0x01
> +#define VALID_MAC_BUF 0x02
> +#define VALID_IV_BUF 0x04
> +#define SINGLE_BUF_INPLACE 0x08
> +#define SINGLE_BUF_HEADTAILROOM 0x10
> +
> +#define ENCR_IV_OFFSET(__d_offs) ((__d_offs >> 32) & 0x)
> +#define ENCR_OFFSET(__d_offs) ((__d_offs >> 16) & 0x)
> +#define AUTH_OFFSET(__d_offs) (__d_offs & 0x)
> +#define ENCR_DLEN(__d_lens) (__d_lens >> 32)
> +#define AUTH_DLEN(__d_lens) (__d_lens & 0x)
> +
> +typedef struct fc_params {
> + /* 0th cache line */

Does it used in fastpath, if so, make it cache aligned

> + union {
> + buf_ptr_t bufs[1];
> + struct {
> + iov_ptr_t *src_iov;
> + iov_ptr_t *dst_iov;
> + };
> + };
> + void *iv_buf;
> + void *auth_iv_buf;
> + buf_ptr_t meta_buf;
> + buf_ptr_t ctx_buf;
> + uint64_t rsvd2;
> +
> + /* 1st cache line */
> + buf_ptr_t aad_buf;
> + buf_ptr_t mac_buf;
> +
> +} fc_params_t;
> +
> +/*
> + * Parameters for digest
> + * generate requests
> + * Only src_iov, op, ctx_buf, mac_buf, prep_req

Re: [dpdk-dev] [PATCH 1/7] net/cxgbe: query firmware for filter resources

[Hemant Agrawal]

Hi Ferruh,

On 6/8/2018 6:58 PM, Rahul Lakkireddy wrote:
> diff --git a/drivers/net/cxgbe/cxgbe_filter.h 
> b/drivers/net/cxgbe/cxgbe_filter.h
> new file mode 100644
> index 0..d69c79e80
> --- /dev/null
> +++ b/drivers/net/cxgbe/cxgbe_filter.h
> @@ -0,0 +1,97 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2014-2018 Chelsio Communications.
> + * All rights reserved.
> + */
> +

Hi Rahul,

This is a new file and copyright starts from 2014, is this intentional?

And @Thomas, @Hemant, are we allowed to have copyright start date in the past 
for new files?

 [Hemant]  It is good to ask the submitter to re-check on the copyright year. 
But they can decide which copyright year they want to put on the files.  
Typically copyright start can be when the part of the code originated/written 
first time irrespective of submission to DPDK.

Some companies also requires that you keep on updating the copyright year when 
you are changing the code. While others think that git history is sufficient to 
keep that track, you need not to update the copyright year. 

Regards,
Hemant