from:"Gowrishankar Muthukrishnan"

[dpdk-dev] [PATCH v3 0/6] enable lpm, acl and other missing libraries in ppc64le

2016-07-16 Thread Gowrishankar Muthukrishnan

This patchset enables LPM, ACL and other few missing libs in ppc64le and also
address few patches in related examples (ip_pipeline and l3fwd).

Test report:
LPM and ACL unit tests passed.

RTE>>acl_autotest 
ACL: allocation of 25166728 bytes on socket 33 for ACL_acl_ctx failed
ACL: rte_acl_add_rules(acl_ctx): rule #1 is invalid
ACL: rte_acl_ipv4vlan_add_rules: rule #1 is invalid
ACL: rte_acl_ipv4vlan_add_rules: rule #1 is invalid
ACL: rte_acl_ipv4vlan_add_rules: rule #1 is invalid
ACL: rte_acl_ipv4vlan_add_rules: rule #1 is invalid
ACL: rte_acl_add_rules(acl_ctx): rule #1 is invalid
acl context @0x3efded7ffb80
  socket_id=-1
  alg=5
  max_rules=196608
  rule_size=128
  num_rules=0
  num_categories=0
  num_tries=0
acl context @0x3efded7ffb80
  socket_id=-1
  alg=5
  max_rules=196608
  rule_size=128
  num_rules=0
  num_categories=0
  num_tries=0
running test_convert_rules(acl_ipv4vlan_tuple)
running test_convert_rules(acl_ipv4vlan_tuple, RTE_ACL_FIELD_TYPE_BITMASK type 
for IPv4)
running test_convert_rules(acl_ipv4vlan_tuple, RTE_ACL_FIELD_TYPE_RANGE type 
for IPv4)
running test_convert_rules(acl_ipv4vlan_tuple: swap VLAN and PORTs order)
running test_convert_rules(acl_ipv4vlan_tuple: swap SRC and DST IPv4 order)
Test OK
RTE>>lpm_autotest 
Test OK
RTE>>

v3 changes:
- rebase over master to fix conflict in examples/l3fwd/l3fwd_em.c

v2 changes:
- enabling libs in config included as part of lib changes itself.

gowrishankar (6):
  lpm: add altivec intrinsics for dpdk lpm on ppc_64
  acl: add altivec intrinsics for dpdk acl on ppc_64
  ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64
  table: cache align rte_bucket_4_8
  sched: enable sched library for ppc64le
  l3fwd: add altivec support for em_hash_key

 app/test-acl/main.c|   4 +
 app/test/test_xmmt_ops.h   |  16 +
 config/defconfig_ppc_64-power8-linuxapp-gcc|   7 -
 examples/ip_pipeline/cpu_core_map.c|  12 +-
 examples/ip_pipeline/init.c|   4 +
 examples/l3fwd/l3fwd_em.c  |  10 +-
 lib/librte_acl/Makefile|   2 +
 lib/librte_acl/acl.h   |   4 +
 lib/librte_acl/acl_run.h   |   2 +
 lib/librte_acl/acl_run_altivec.c   |  47 +++
 lib/librte_acl/acl_run_altivec.h   | 328 +
 lib/librte_acl/rte_acl.c   |  13 +
 lib/librte_acl/rte_acl.h   |   1 +
 .../common/include/arch/ppc_64/rte_vect.h  |  60 
 lib/librte_lpm/Makefile|   2 +
 lib/librte_lpm/rte_lpm.h   |   2 +
 lib/librte_lpm/rte_lpm_altivec.h   | 154 ++
 lib/librte_table/rte_table_hash_key8.c |   2 +-
 18 files changed, 650 insertions(+), 20 deletions(-)
 create mode 100644 lib/librte_acl/acl_run_altivec.c
 create mode 100644 lib/librte_acl/acl_run_altivec.h
 create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
 create mode 100644 lib/librte_lpm/rte_lpm_altivec.h

-- 
1.9.1

[dpdk-dev] [PATCH v3 3/6] ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64

2016-07-16 Thread Gowrishankar Muthukrishnan

offline lcore would still refer to original core id and this has to
be considered while creating cpu core mask.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 config/defconfig_ppc_64-power8-linuxapp-gcc |  3 ---
 examples/ip_pipeline/cpu_core_map.c | 12 +---
 examples/ip_pipeline/init.c |  4 
 3 files changed, 5 insertions(+), 14 deletions(-)

diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index dede34f..a084672 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -58,6 +58,3 @@ CONFIG_RTE_LIBRTE_FM10K_PMD=n

 # This following libraries are not available on Power. So they're turned off.
 CONFIG_RTE_LIBRTE_SCHED=n
-CONFIG_RTE_LIBRTE_PORT=n
-CONFIG_RTE_LIBRTE_TABLE=n
-CONFIG_RTE_LIBRTE_PIPELINE=n
diff --git a/examples/ip_pipeline/cpu_core_map.c 
b/examples/ip_pipeline/cpu_core_map.c
index cb088b1..482e68e 100644
--- a/examples/ip_pipeline/cpu_core_map.c
+++ b/examples/ip_pipeline/cpu_core_map.c
@@ -351,9 +351,6 @@ cpu_core_map_compute_linux(struct cpu_core_map *map)
int lcore_socket_id =
cpu_core_map_get_socket_id_linux(lcore_id);

-   if (lcore_socket_id < 0)
-   return -1;
-
if (((uint32_t) lcore_socket_id) == socket_id)
n_detected++;
}
@@ -368,18 +365,11 @@ cpu_core_map_compute_linux(struct cpu_core_map *map)
cpu_core_map_get_socket_id_linux(
lcore_id);

-   if (lcore_socket_id < 0)
-   return -1;
-
int lcore_core_id =
cpu_core_map_get_core_id_linux(
lcore_id);

-   if (lcore_core_id < 0)
-   return -1;
-
-   if (((uint32_t) lcore_socket_id == socket_id) &&
-   ((uint32_t) lcore_core_id == core_id)) {
+   if ((uint32_t) lcore_socket_id == socket_id) {
uint32_t pos = cpu_core_map_pos(map,
socket_id,
core_id_contig,
diff --git a/examples/ip_pipeline/init.c b/examples/ip_pipeline/init.c
index cd167f6..60c931f 100644
--- a/examples/ip_pipeline/init.c
+++ b/examples/ip_pipeline/init.c
@@ -61,7 +61,11 @@ static void
 app_init_core_map(struct app_params *app)
 {
APP_LOG(app, HIGH, "Initializing CPU core map ...");
+#if defined(RTE_ARCH_PPC_64)
+   app->core_map = cpu_core_map_init(2, 5, 1, 0);
+#else
app->core_map = cpu_core_map_init(4, 32, 4, 0);
+#endif

if (app->core_map == NULL)
rte_panic("Cannot create CPU core map\n");
-- 
1.9.1

[dpdk-dev] [PATCH v3 1/6] lpm: add altivec intrinsics for dpdk lpm on ppc_64

2016-07-16 Thread Gowrishankar Muthukrishnan

This patch adds ppc64le port for LPM library in DPDK.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 app/test/test_xmmt_ops.h   |  16 +++
 config/defconfig_ppc_64-power8-linuxapp-gcc|   1 -
 .../common/include/arch/ppc_64/rte_vect.h  |  60 
 lib/librte_lpm/Makefile|   2 +
 lib/librte_lpm/rte_lpm.h   |   2 +
 lib/librte_lpm/rte_lpm_altivec.h   | 154 +
 6 files changed, 234 insertions(+), 1 deletion(-)
 create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
 create mode 100644 lib/librte_lpm/rte_lpm_altivec.h

diff --git a/app/test/test_xmmt_ops.h b/app/test/test_xmmt_ops.h
index de9c16f..42174d2 100644
--- a/app/test/test_xmmt_ops.h
+++ b/app/test/test_xmmt_ops.h
@@ -62,6 +62,22 @@ vect_set_epi32(int i3, int i2, int i1, int i0)
 /* sets the 4 signed 32-bit integer values and returns the xmm_t variable */
 #define vect_set_epi32(i3, i2, i1, i0) _mm_set_epi32(i3, i2, i1, i0)

+#elif defined(RTE_ARCH_PPC_64)
+
+/* vect_* abstraction implementation using ALTIVEC */
+
+/* loads the xmm_t value from address p(does not need to be 16-byte aligned)*/
+#define vect_loadu_sil128(p) vec_ld(0, p)
+
+/* sets the 4 signed 32-bit integer values and returns the xmm_t variable */
+static inline xmm_t  __attribute__((always_inline))
+vect_set_epi32(int i3, int i2, int i1, int i0)
+{
+   xmm_t data = (xmm_t){i0, i1, i2, i3};
+
+   return data;
+}
+
 #endif

 #endif /* _TEST_XMMT_OPS_H_ */
diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index bef8f49..9ddf3c5 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -57,7 +57,6 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
 CONFIG_RTE_LIBRTE_FM10K_PMD=n

 # This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_LPM=n
 CONFIG_RTE_LIBRTE_ACL=n
 CONFIG_RTE_LIBRTE_SCHED=n
 CONFIG_RTE_LIBRTE_PORT=n
diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h 
b/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
new file mode 100644
index 000..05209e5
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
@@ -0,0 +1,60 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) IBM Corporation 2016.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in
+ *   the documentation and/or other materials provided with the
+ *   distribution.
+ * * Neither the name of IBM Corporation nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _RTE_VECT_PPC_64_H_
+#define _RTE_VECT_PPC_64_H_
+
+#include 
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef vector signed int xmm_t;
+
+#defineXMM_SIZE(sizeof(xmm_t))
+#defineXMM_MASK(XMM_SIZE - 1)
+
+typedef union rte_xmm {
+   xmm_tx;
+   uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
+   uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
+   uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
+   uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
+   double   pd[XMM_SIZE / sizeof(double)];
+} __attribute__((aligned(16))) rte_xmm_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_VECT_PPC_64_H_ */
diff --git a/lib/librte_lpm/Makefile b/lib/librte_lpm/Makefile
index 656ade2..3dc549d 100644
--- a/lib/librte_lpm/Makefile
+++ b/lib/librte_lpm/Makefile
@@ -51,6 +51,8 @@ ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) 
$(CONFIG_RTE_ARCH_ARM64)),)
 SYMLINK-$(CONFIG_RTE_LIBRTE_LPM)-include += rte_lpm_neon.h
 else ifeq ($(CONFIG_RTE_A

[dpdk-dev] [PATCH v3 2/6] acl: add altivec intrinsics for dpdk acl on ppc_64

2016-07-16 Thread Gowrishankar Muthukrishnan

This patch adds port for ACL library in ppc64le.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 app/test-acl/main.c |   4 +
 config/defconfig_ppc_64-power8-linuxapp-gcc |   1 -
 lib/librte_acl/Makefile |   2 +
 lib/librte_acl/acl.h|   4 +
 lib/librte_acl/acl_run.h|   2 +
 lib/librte_acl/acl_run_altivec.c|  47 
 lib/librte_acl/acl_run_altivec.h| 328 
 lib/librte_acl/rte_acl.c|  13 ++
 lib/librte_acl/rte_acl.h|   1 +
 9 files changed, 401 insertions(+), 1 deletion(-)
 create mode 100644 lib/librte_acl/acl_run_altivec.c
 create mode 100644 lib/librte_acl/acl_run_altivec.h

diff --git a/app/test-acl/main.c b/app/test-acl/main.c
index d366981..1b2b176 100644
--- a/app/test-acl/main.c
+++ b/app/test-acl/main.c
@@ -105,6 +105,10 @@ static const struct acl_alg acl_alg[] = {
.name = "neon",
.alg = RTE_ACL_CLASSIFY_NEON,
},
+   {
+   .name = "altivec",
+   .alg = RTE_ACL_CLASSIFY_ALTIVEC,
+   },
 };

 static struct {
diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index 9ddf3c5..dede34f 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -57,7 +57,6 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
 CONFIG_RTE_LIBRTE_FM10K_PMD=n

 # This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_ACL=n
 CONFIG_RTE_LIBRTE_SCHED=n
 CONFIG_RTE_LIBRTE_PORT=n
 CONFIG_RTE_LIBRTE_TABLE=n
diff --git a/lib/librte_acl/Makefile b/lib/librte_acl/Makefile
index 9803e9d..d05be66 100644
--- a/lib/librte_acl/Makefile
+++ b/lib/librte_acl/Makefile
@@ -52,6 +52,8 @@ SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_scalar.c
 ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) $(CONFIG_RTE_ARCH_ARM64)),)
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_neon.c
 CFLAGS_acl_run_neon.o += -flax-vector-conversions -Wno-maybe-uninitialized
+else ifeq ($(CONFIG_RTE_ARCH_PPC_64),y)
+SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_altivec.c
 else
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_sse.c
 #check if flag for SSE4.1 is already on, if not set it up manually
diff --git a/lib/librte_acl/acl.h b/lib/librte_acl/acl.h
index 09d6784..6664a55 100644
--- a/lib/librte_acl/acl.h
+++ b/lib/librte_acl/acl.h
@@ -234,6 +234,10 @@ int
 rte_acl_classify_neon(const struct rte_acl_ctx *ctx, const uint8_t **data,
uint32_t *results, uint32_t num, uint32_t categories);

+int
+rte_acl_classify_altivec(const struct rte_acl_ctx *ctx, const uint8_t **data,
+   uint32_t *results, uint32_t num, uint32_t categories);
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
diff --git a/lib/librte_acl/acl_run.h b/lib/librte_acl/acl_run.h
index b2fc42c..024f393 100644
--- a/lib/librte_acl/acl_run.h
+++ b/lib/librte_acl/acl_run.h
@@ -39,7 +39,9 @@

 #define MAX_SEARCHES_AVX16 16
 #define MAX_SEARCHES_SSE8  8
+#define MAX_SEARCHES_ALTIVEC8  8
 #define MAX_SEARCHES_SSE4  4
+#define MAX_SEARCHES_ALTIVEC4  4
 #define MAX_SEARCHES_SCALAR2

 #define GET_NEXT_4BYTES(prm, idx)  \
diff --git a/lib/librte_acl/acl_run_altivec.c b/lib/librte_acl/acl_run_altivec.c
new file mode 100644
index 000..3523526
--- /dev/null
+++ b/lib/librte_acl/acl_run_altivec.c
@@ -0,0 +1,47 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright (C) IBM Corporation 2016.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in
+ *   the documentation and/or other materials provided with the
+ *   distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABI

[dpdk-dev] [PATCH v3 4/6] table: cache align rte_bucket_4_8

2016-07-16 Thread Gowrishankar Muthukrishnan

Align rte_bucket_4_8 for cache line.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 lib/librte_table/rte_table_hash_key8.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/librte_table/rte_table_hash_key8.c 
b/lib/librte_table/rte_table_hash_key8.c
index e2e2bdc..4d5e0cd 100644
--- a/lib/librte_table/rte_table_hash_key8.c
+++ b/lib/librte_table/rte_table_hash_key8.c
@@ -68,7 +68,7 @@ struct rte_bucket_4_8 {
uint64_t key[4];

/* Cache line 1 */
-   uint8_t data[0];
+   uint8_t data[0] __rte_cache_aligned;
 };

 struct rte_table_hash {
-- 
1.9.1

[dpdk-dev] [PATCH v3 5/6] sched: enable sched library for ppc64le

2016-07-16 Thread Gowrishankar Muthukrishnan

This patch enables librte_sched in ppc64le.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 config/defconfig_ppc_64-power8-linuxapp-gcc | 2 --
 1 file changed, 2 deletions(-)

diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index a084672..f953e61 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -56,5 +56,3 @@ CONFIG_RTE_LIBRTE_PMD_BOND=n
 CONFIG_RTE_LIBRTE_ENIC_PMD=n
 CONFIG_RTE_LIBRTE_FM10K_PMD=n

-# This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_SCHED=n
-- 
1.9.1

[dpdk-dev] [PATCH v3 6/6] l3fwd: add altivec support for em_hash_key

2016-07-16 Thread Gowrishankar Muthukrishnan

This patch adds ppc64le port for em_mask_key function.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 examples/l3fwd/l3fwd_em.c | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c
index def5a02..6053a62 100644
--- a/examples/l3fwd/l3fwd_em.c
+++ b/examples/l3fwd/l3fwd_em.c
@@ -259,8 +259,16 @@ em_mask_key(void *key, xmm_t mask)

return vandq_s32(data, mask);
 }
+#elif defined(RTE_MACHINE_CPUFLAG_ALTIVEC)
+static inline xmm_t
+em_mask_key(void *key, xmm_t mask)
+{
+   xmm_t data = vec_ld(0, (xmm_t *)(key));
+
+   return vec_and(data, mask);
+}
 #else
-#error No vector engine (SSE, NEON) available, check your toolchain
+#error No vector engine (SSE, NEON, ALTIVEC) available, check your toolchain
 #endif

 static inline uint8_t
-- 
1.9.1

[dpdk-dev] [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le

2016-07-18 Thread gowrishankar muthukrishnan

Hi Chao,
I just tried building dpdk master with these patches in ubuntu 16.04 le 
guest
and I could able to.

test at ubuntu:~/DPDK$ make install T=ppc_64-power8-linuxapp-gcc -j16

.
   INSTALL-MAP test.map
   INSTALL-APP test
Build complete [ppc_64-power8-linuxapp-gcc]
Installation cannot run with T defined and DESTDIR undefined
test at ubuntu:~/DPDK$ uname -a
Linux ubuntu 4.4.0-21-generic #37-Ubuntu SMP Mon Apr 18 18:30:22 UTC 
2016 ppc64le ppc64le ppc64le GNU/Linux

test at ubuntu:~/DPDK$ gcc --version
gcc (Ubuntu/IBM 5.4.0-6ubuntu1~16.04.1) 5.4.0 20160609

May be you need to check gcc again.

Thanks,
Gowrishankar

On Monday 18 July 2016 02:24 PM, Chao Zhu wrote:
> Gowrishankar,
>
> I still get this error with the v3 patches. My OS is Ubuntu 16.04 LTS
> ppc64le. GCC version: Ubuntu/IBM 5.3.1-14ubuntu2
> Can you help to check again?
>
> In file included from
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.c:34:0:
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h: In function
> 'transition4':
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:198:2: error:
> dereferencing type-punned pointer will break strict-aliasing rules
> [-Werror=strict-aliasing]
>*indices1 = (xmm_t){((uint32_t *))[0], ((uint32_t *))[1],
>^
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:202:2: error:
> dereferencing type-punned pointer will break strict-aliasing rules
> [-Werror=strict-aliasing]
>*indices2 = (xmm_t){((uint32_t *))[0], ((uint32_t *))[1],
>^
>
>
>
> -Original Message-
> From: gowrishankar [mailto:gowrishankar.m at linux.vnet.ibm.com]
> Sent: 2016?7?16? 15:59
> To: Chao Zhu;dev at dpdk.org
> Cc: 'Bruce Richardson'; 'Konstantin Ananyev'
> ; 'Thomas Monjalon'
> ; 'Cristian Dumitrescu'
> ; 'Pradeep'
> Subject: Re: [PATCH v2 0/6] enable lpm, acl and other missing libraries in
> ppc64le
>
> Hi Chao,
> I did not face this error. Even I verified today with tip of master
> 6596554... .
> However I had patch conflict for examples/l3fwd/l3fwd_em.c which is fixed
> now and v3 patch set sent recently. Could you please check.
>
> Thanks,
> Gowrishankar
> On Friday 15 July 2016 08:45 AM, Chao Zhu wrote:
>> Gowrishankar,
>>
>> When I tried the patches, I got some compilation error:
>>
>> In file included from
>> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.c:34:0:
>> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h: In function
>> 'transition4':
>> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:198:2: error:
>> dereferencing type-punned pointer will break strict-aliasing rules
>> [-Werror=strict-aliasing]
>> *indices1 = (xmm_t){((uint32_t *))[0], ((uint32_t *))[1],
>> ^
>> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:202:2: error:
>> dereferencing type-punned pointer will break strict-aliasing rules
>> [-Werror=strict-aliasing]
>> *indices2 = (xmm_t){((uint32_t *))[0], ((uint32_t *))[1],
>>
>> Can you help to take a look?
>>
>>
>> -Original Message-
>> From: Gowrishankar [mailto:gowrishankar.m at linux.vnet.ibm.com]
>> Sent: 2016?7?10? 15:51
>> To:dev at dpdk.org
>> Cc: Chao Zhu; Bruce Richardson
>> ; Konstantin Ananyev
>> ; Thomas Monjalon
>> ; Cristian Dumitrescu
>> ; Pradeep;
>> gowrishankar
>> Subject: [PATCH v2 0/6] enable lpm, acl and other missing libraries in
>> ppc64le
>>
>> From: gowrishankar
>>
>> This patchset enables LPM, ACL and other few missing libs in ppc64le
>> and also address few patches in related examples (ip_pipeline and l3fwd).
>>
>> Test report:
>> LPM and ACL unit tests verified as in patch set v1.
>> Same results as before observed.
>>
>> v2 changes:
>> - enabling libs in config included as part of lib changes itself.
>>
>> gowrishankar (6):
>> lpm: add altivec intrinsics for dpdk lpm on ppc_64
>> acl: add altivec intrinsics for dpdk acl on ppc_64
>> ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64
>> table: cache align rte_bucket_4_8
>> sched: enable sched library for ppc64le
>> l3fwd: add altivec support for em_hash_key
>>
>>app/test-acl/main.c|   4 +
>>app/test/test_xmmt_ops.h   |  16 +
>>config/defconfig_ppc_64-power8-linuxapp-gcc|   7 -
>>examples/ip_pipeline/cpu_core_map.c|  12 +-
>>examples/ip_pipeline/init.c|   4 +
>>examples/l3fwd/l3fwd_em.c  |   8 +
>>lib/librte_acl/Makefile|   2 +
>>lib/librte_acl/acl.h   |   4 +
>>lib/librte_acl/acl_run.h   |   2 +
>>lib/librte_acl/acl_run_altivec.c   |  47 +++
>>lib/librte_acl/acl_run_altivec.h   | 328
>> +
>>lib/librte_acl/rte_acl.c   |  13 +
>>lib/librte_acl/rte_acl.h   |   1 +
>>.../common/include/arch/ppc_64/rte_vect.h  |  60 
>>

[dpdk-dev] [PATCH v4 0/6] enable lpm, acl and other missing libraries in ppc64le

2016-08-06 Thread Gowrishankar Muthukrishnan

This patchset enables LPM, ACL and other few missing libs in ppc64le and also
address few patches in related examples (ip_pipeline and l3fwd).

Test report:
LPM and ACL unit tests passed.

RTE>>acl_autotest 
ACL: allocation of 25166728 bytes on socket 33 for ACL_acl_ctx failed
ACL: rte_acl_add_rules(acl_ctx): rule #1 is invalid
ACL: rte_acl_ipv4vlan_add_rules: rule #1 is invalid
ACL: rte_acl_ipv4vlan_add_rules: rule #1 is invalid
ACL: rte_acl_ipv4vlan_add_rules: rule #1 is invalid
ACL: rte_acl_ipv4vlan_add_rules: rule #1 is invalid
ACL: rte_acl_add_rules(acl_ctx): rule #1 is invalid
acl context @0x3effe07ffb80
  socket_id=-1
  alg=5
  max_rules=196608
  rule_size=128
  num_rules=0
  num_categories=0
  num_tries=0
acl context @0x3effe07ffb80
  socket_id=-1
  alg=5
  max_rules=196608
  rule_size=128
  num_rules=0
  num_categories=0
  num_tries=0
running test_convert_rules(acl_ipv4vlan_tuple)
running test_convert_rules(acl_ipv4vlan_tuple, RTE_ACL_FIELD_TYPE_BITMASK type 
for IPv4)
running test_convert_rules(acl_ipv4vlan_tuple, RTE_ACL_FIELD_TYPE_RANGE type 
for IPv4)
running test_convert_rules(acl_ipv4vlan_tuple: swap VLAN and PORTs order)
running test_convert_rules(acl_ipv4vlan_tuple: swap SRC and DST IPv4 order)
Test OK
RTE>>lpm_autotest 
Test OK

v4 changes:
- fix transition4 in acl_run_altivec.h for gcc strict-aliasing error.
  Thanks to Chao Zhu for bringing up.

v3 changes:
- rebase over master to fix conflict in examples/l3fwd/l3fwd_em.c

v2 changes:
- enabling libs in config included as part of lib changes itself.

gowrishankar (6):
  lpm: add altivec intrinsics for dpdk lpm on ppc_64
  acl: add altivec intrinsics for dpdk acl on ppc_64
  ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64
  table: cache align rte_bucket_4_8
  sched: enable sched library for ppc64le
  l3fwd: add altivec support for em_hash_key

 app/test-acl/main.c|   4 +
 app/test/test_xmmt_ops.h   |  16 +
 config/defconfig_ppc_64-power8-linuxapp-gcc|   7 -
 examples/ip_pipeline/cpu_core_map.c|  12 +-
 examples/ip_pipeline/init.c|   4 +
 examples/l3fwd/l3fwd_em.c  |  10 +-
 lib/librte_acl/Makefile|   2 +
 lib/librte_acl/acl.h   |   4 +
 lib/librte_acl/acl_run.h   |   2 +
 lib/librte_acl/acl_run_altivec.c   |  47 +++
 lib/librte_acl/acl_run_altivec.h   | 329 +
 lib/librte_acl/rte_acl.c   |  13 +
 lib/librte_acl/rte_acl.h   |   1 +
 .../common/include/arch/ppc_64/rte_vect.h  |  60 
 lib/librte_lpm/Makefile|   2 +
 lib/librte_lpm/rte_lpm.h   |   2 +
 lib/librte_lpm/rte_lpm_altivec.h   | 154 ++
 lib/librte_table/rte_table_hash_key8.c |   2 +-
 18 files changed, 651 insertions(+), 20 deletions(-)
 create mode 100644 lib/librte_acl/acl_run_altivec.c
 create mode 100644 lib/librte_acl/acl_run_altivec.h
 create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
 create mode 100644 lib/librte_lpm/rte_lpm_altivec.h

-- 
1.9.1

[dpdk-dev] [PATCH v4 1/6] lpm: add altivec intrinsics for dpdk lpm on ppc_64

2016-08-06 Thread Gowrishankar Muthukrishnan

From: gowrishankar 

This patch adds ppc64le port for LPM library in DPDK.

Signed-off-by: Gowrishankar 
---
 app/test/test_xmmt_ops.h   |  16 +++
 config/defconfig_ppc_64-power8-linuxapp-gcc|   1 -
 .../common/include/arch/ppc_64/rte_vect.h  |  60 
 lib/librte_lpm/Makefile|   2 +
 lib/librte_lpm/rte_lpm.h   |   2 +
 lib/librte_lpm/rte_lpm_altivec.h   | 154 +
 6 files changed, 234 insertions(+), 1 deletion(-)
 create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
 create mode 100644 lib/librte_lpm/rte_lpm_altivec.h

diff --git a/app/test/test_xmmt_ops.h b/app/test/test_xmmt_ops.h
index de9c16f..42174d2 100644
--- a/app/test/test_xmmt_ops.h
+++ b/app/test/test_xmmt_ops.h
@@ -62,6 +62,22 @@ vect_set_epi32(int i3, int i2, int i1, int i0)
 /* sets the 4 signed 32-bit integer values and returns the xmm_t variable */
 #define vect_set_epi32(i3, i2, i1, i0) _mm_set_epi32(i3, i2, i1, i0)

+#elif defined(RTE_ARCH_PPC_64)
+
+/* vect_* abstraction implementation using ALTIVEC */
+
+/* loads the xmm_t value from address p(does not need to be 16-byte aligned)*/
+#define vect_loadu_sil128(p) vec_ld(0, p)
+
+/* sets the 4 signed 32-bit integer values and returns the xmm_t variable */
+static inline xmm_t  __attribute__((always_inline))
+vect_set_epi32(int i3, int i2, int i1, int i0)
+{
+   xmm_t data = (xmm_t){i0, i1, i2, i3};
+
+   return data;
+}
+
 #endif

 #endif /* _TEST_XMMT_OPS_H_ */
diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index bef8f49..9ddf3c5 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -57,7 +57,6 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
 CONFIG_RTE_LIBRTE_FM10K_PMD=n

 # This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_LPM=n
 CONFIG_RTE_LIBRTE_ACL=n
 CONFIG_RTE_LIBRTE_SCHED=n
 CONFIG_RTE_LIBRTE_PORT=n
diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h 
b/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
new file mode 100644
index 000..05209e5
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
@@ -0,0 +1,60 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) IBM Corporation 2016.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in
+ *   the documentation and/or other materials provided with the
+ *   distribution.
+ * * Neither the name of IBM Corporation nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _RTE_VECT_PPC_64_H_
+#define _RTE_VECT_PPC_64_H_
+
+#include 
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef vector signed int xmm_t;
+
+#defineXMM_SIZE(sizeof(xmm_t))
+#defineXMM_MASK(XMM_SIZE - 1)
+
+typedef union rte_xmm {
+   xmm_tx;
+   uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
+   uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
+   uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
+   uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
+   double   pd[XMM_SIZE / sizeof(double)];
+} __attribute__((aligned(16))) rte_xmm_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_VECT_PPC_64_H_ */
diff --git a/lib/librte_lpm/Makefile b/lib/librte_lpm/Makefile
index 656ade2..3dc549d 100644
--- a/lib/librte_lpm/Makefile
+++ b/lib/librte_lpm/Makefile
@@ -51,6 +51,8 @@ ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) 
$(CONFIG_RTE_ARCH_ARM64)),)
 SYMLINK-$(CONFIG_RTE_LIBRTE_LPM)-include += rte_lpm_neon.h
 else ifeq

[dpdk-dev] [PATCH v4 2/6] acl: add altivec intrinsics for dpdk acl on ppc_64

2016-08-06 Thread Gowrishankar Muthukrishnan

From: gowrishankar 

This patch adds port for ACL library in ppc64le.

Signed-off-by: Gowrishankar 
---
 app/test-acl/main.c |   4 +
 config/defconfig_ppc_64-power8-linuxapp-gcc |   1 -
 lib/librte_acl/Makefile |   2 +
 lib/librte_acl/acl.h|   4 +
 lib/librte_acl/acl_run.h|   2 +
 lib/librte_acl/acl_run_altivec.c|  47 
 lib/librte_acl/acl_run_altivec.h| 329 
 lib/librte_acl/rte_acl.c|  13 ++
 lib/librte_acl/rte_acl.h|   1 +
 9 files changed, 402 insertions(+), 1 deletion(-)
 create mode 100644 lib/librte_acl/acl_run_altivec.c
 create mode 100644 lib/librte_acl/acl_run_altivec.h

diff --git a/app/test-acl/main.c b/app/test-acl/main.c
index d366981..1b2b176 100644
--- a/app/test-acl/main.c
+++ b/app/test-acl/main.c
@@ -105,6 +105,10 @@ static const struct acl_alg acl_alg[] = {
.name = "neon",
.alg = RTE_ACL_CLASSIFY_NEON,
},
+   {
+   .name = "altivec",
+   .alg = RTE_ACL_CLASSIFY_ALTIVEC,
+   },
 };

 static struct {
diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index 9ddf3c5..dede34f 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -57,7 +57,6 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
 CONFIG_RTE_LIBRTE_FM10K_PMD=n

 # This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_ACL=n
 CONFIG_RTE_LIBRTE_SCHED=n
 CONFIG_RTE_LIBRTE_PORT=n
 CONFIG_RTE_LIBRTE_TABLE=n
diff --git a/lib/librte_acl/Makefile b/lib/librte_acl/Makefile
index 9803e9d..d05be66 100644
--- a/lib/librte_acl/Makefile
+++ b/lib/librte_acl/Makefile
@@ -52,6 +52,8 @@ SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_scalar.c
 ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) $(CONFIG_RTE_ARCH_ARM64)),)
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_neon.c
 CFLAGS_acl_run_neon.o += -flax-vector-conversions -Wno-maybe-uninitialized
+else ifeq ($(CONFIG_RTE_ARCH_PPC_64),y)
+SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_altivec.c
 else
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_sse.c
 #check if flag for SSE4.1 is already on, if not set it up manually
diff --git a/lib/librte_acl/acl.h b/lib/librte_acl/acl.h
index 09d6784..6664a55 100644
--- a/lib/librte_acl/acl.h
+++ b/lib/librte_acl/acl.h
@@ -234,6 +234,10 @@ int
 rte_acl_classify_neon(const struct rte_acl_ctx *ctx, const uint8_t **data,
uint32_t *results, uint32_t num, uint32_t categories);

+int
+rte_acl_classify_altivec(const struct rte_acl_ctx *ctx, const uint8_t **data,
+   uint32_t *results, uint32_t num, uint32_t categories);
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
diff --git a/lib/librte_acl/acl_run.h b/lib/librte_acl/acl_run.h
index b2fc42c..024f393 100644
--- a/lib/librte_acl/acl_run.h
+++ b/lib/librte_acl/acl_run.h
@@ -39,7 +39,9 @@

 #define MAX_SEARCHES_AVX16 16
 #define MAX_SEARCHES_SSE8  8
+#define MAX_SEARCHES_ALTIVEC8  8
 #define MAX_SEARCHES_SSE4  4
+#define MAX_SEARCHES_ALTIVEC4  4
 #define MAX_SEARCHES_SCALAR2

 #define GET_NEXT_4BYTES(prm, idx)  \
diff --git a/lib/librte_acl/acl_run_altivec.c b/lib/librte_acl/acl_run_altivec.c
new file mode 100644
index 000..3523526
--- /dev/null
+++ b/lib/librte_acl/acl_run_altivec.c
@@ -0,0 +1,47 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright (C) IBM Corporation 2016.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in
+ *   the documentation and/or other materials provided with the
+ *   distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

[dpdk-dev] [PATCH v4 3/6] ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64

2016-08-06 Thread Gowrishankar Muthukrishnan

From: gowrishankar 

offline lcore would still refer to original core id and this has to
be considered while creating cpu core mask.

Signed-off-by: Gowrishankar 
---
 config/defconfig_ppc_64-power8-linuxapp-gcc |  3 ---
 examples/ip_pipeline/cpu_core_map.c | 12 +---
 examples/ip_pipeline/init.c |  4 
 3 files changed, 5 insertions(+), 14 deletions(-)

diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index dede34f..a084672 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -58,6 +58,3 @@ CONFIG_RTE_LIBRTE_FM10K_PMD=n

 # This following libraries are not available on Power. So they're turned off.
 CONFIG_RTE_LIBRTE_SCHED=n
-CONFIG_RTE_LIBRTE_PORT=n
-CONFIG_RTE_LIBRTE_TABLE=n
-CONFIG_RTE_LIBRTE_PIPELINE=n
diff --git a/examples/ip_pipeline/cpu_core_map.c 
b/examples/ip_pipeline/cpu_core_map.c
index cb088b1..482e68e 100644
--- a/examples/ip_pipeline/cpu_core_map.c
+++ b/examples/ip_pipeline/cpu_core_map.c
@@ -351,9 +351,6 @@ cpu_core_map_compute_linux(struct cpu_core_map *map)
int lcore_socket_id =
cpu_core_map_get_socket_id_linux(lcore_id);

-   if (lcore_socket_id < 0)
-   return -1;
-
if (((uint32_t) lcore_socket_id) == socket_id)
n_detected++;
}
@@ -368,18 +365,11 @@ cpu_core_map_compute_linux(struct cpu_core_map *map)
cpu_core_map_get_socket_id_linux(
lcore_id);

-   if (lcore_socket_id < 0)
-   return -1;
-
int lcore_core_id =
cpu_core_map_get_core_id_linux(
lcore_id);

-   if (lcore_core_id < 0)
-   return -1;
-
-   if (((uint32_t) lcore_socket_id == socket_id) &&
-   ((uint32_t) lcore_core_id == core_id)) {
+   if ((uint32_t) lcore_socket_id == socket_id) {
uint32_t pos = cpu_core_map_pos(map,
socket_id,
core_id_contig,
diff --git a/examples/ip_pipeline/init.c b/examples/ip_pipeline/init.c
index cd167f6..60c931f 100644
--- a/examples/ip_pipeline/init.c
+++ b/examples/ip_pipeline/init.c
@@ -61,7 +61,11 @@ static void
 app_init_core_map(struct app_params *app)
 {
APP_LOG(app, HIGH, "Initializing CPU core map ...");
+#if defined(RTE_ARCH_PPC_64)
+   app->core_map = cpu_core_map_init(2, 5, 1, 0);
+#else
app->core_map = cpu_core_map_init(4, 32, 4, 0);
+#endif

if (app->core_map == NULL)
rte_panic("Cannot create CPU core map\n");
-- 
1.9.1

[dpdk-dev] [PATCH v4 4/6] table: cache align rte_bucket_4_8

2016-08-06 Thread Gowrishankar Muthukrishnan

From: gowrishankar 

Align rte_bucket_4_8 for cache line.

Signed-off-by: Gowrishankar 
---
 lib/librte_table/rte_table_hash_key8.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/librte_table/rte_table_hash_key8.c 
b/lib/librte_table/rte_table_hash_key8.c
index e2e2bdc..4d5e0cd 100644
--- a/lib/librte_table/rte_table_hash_key8.c
+++ b/lib/librte_table/rte_table_hash_key8.c
@@ -68,7 +68,7 @@ struct rte_bucket_4_8 {
uint64_t key[4];

/* Cache line 1 */
-   uint8_t data[0];
+   uint8_t data[0] __rte_cache_aligned;
 };

 struct rte_table_hash {
-- 
1.9.1

[dpdk-dev] [PATCH v4 5/6] sched: enable sched library for ppc64le

2016-08-06 Thread Gowrishankar Muthukrishnan

From: gowrishankar 

This patch enables librte_sched in ppc64le.

Signed-off-by: Gowrishankar 
---
 config/defconfig_ppc_64-power8-linuxapp-gcc | 2 --
 1 file changed, 2 deletions(-)

diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index a084672..f953e61 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -56,5 +56,3 @@ CONFIG_RTE_LIBRTE_PMD_BOND=n
 CONFIG_RTE_LIBRTE_ENIC_PMD=n
 CONFIG_RTE_LIBRTE_FM10K_PMD=n

-# This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_SCHED=n
-- 
1.9.1

[dpdk-dev] [PATCH v4 6/6] l3fwd: add altivec support for em_hash_key

2016-08-06 Thread Gowrishankar Muthukrishnan

From: gowrishankar 

This patch adds ppc64le port for em_mask_key function.

Signed-off-by: Gowrishankar 
---
 examples/l3fwd/l3fwd_em.c | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c
index def5a02..6053a62 100644
--- a/examples/l3fwd/l3fwd_em.c
+++ b/examples/l3fwd/l3fwd_em.c
@@ -259,8 +259,16 @@ em_mask_key(void *key, xmm_t mask)

return vandq_s32(data, mask);
 }
+#elif defined(RTE_MACHINE_CPUFLAG_ALTIVEC)
+static inline xmm_t
+em_mask_key(void *key, xmm_t mask)
+{
+   xmm_t data = vec_ld(0, (xmm_t *)(key));
+
+   return vec_and(data, mask);
+}
 #else
-#error No vector engine (SSE, NEON) available, check your toolchain
+#error No vector engine (SSE, NEON, ALTIVEC) available, check your toolchain
 #endif

 static inline uint8_t
-- 
1.9.1

[dpdk-dev] [PATCH v4 3/6] ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64

2016-08-09 Thread gowrishankar muthukrishnan

Hi Chao,
Sure. Please find below one.

This patch fixes ip_pipeline panic in app_init_core_map while preparing cpu
core map in powerpc with SMT off. cpu_core_map_compute_linux currently 
prepares
core mapping based on file existence in sysfs ie.

/sys/devices/system/cpu/cpu/topology/physical_package_id
   /sys/devices/system/cpu/cpu/topology/core_id

These files do not exist for lcores which are offline for any reason (as in
powerpc, while SMT is off). In this situation, this function should further
continue preparing map for other online lcores instead of returning with -1
for a first unavailable lcore.

Also, in SMT=off scenario for powerpc, lcore ids can not be always 
indexed from
0 upto 'number of cores present' (/sys/devices/system/cpu/present). For 
eg, for
an online lcore 32, core_id returned in sysfs is 112 where online lcores are
10 (as in one configuration), hence sysfs lcore id can not be checked with
indexing lcore number before positioning lcore map array.

Thanks,
Gowrishankar

On Tuesday 09 August 2016 02:37 PM, Chao Zhu wrote:
> Gowrishankar,
>
> Can you give more description about this patch?
> Thank you!
>
> -Original Message-
> From: Gowrishankar Muthukrishnan [mailto:gowrishankar.m at linux.vnet.ibm.com]
> Sent: 2016?8?6? 20:33
> To: dev at dpdk.org
> Cc: Chao Zhu ; Bruce Richardson
> ; Konstantin Ananyev
> ; Thomas Monjalon  6wind.com>;
> Cristian Dumitrescu ; Pradeep
> ; gowrishankar 
> Subject: [PATCH v4 3/6] ip_pipeline: fix lcore mapping for varying SMT
> threads as in ppc64
>
> From: gowrishankar 
>
> offline lcore would still refer to original core id and this has to be
> considered while creating cpu core mask.
>
> Signed-off-by: Gowrishankar 
> ---
>   config/defconfig_ppc_64-power8-linuxapp-gcc |  3 ---
>   examples/ip_pipeline/cpu_core_map.c | 12 +---
>   examples/ip_pipeline/init.c |  4 
>   3 files changed, 5 insertions(+), 14 deletions(-)
>
> diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc
> b/config/defconfig_ppc_64-power8-linuxapp-gcc
> index dede34f..a084672 100644
> --- a/config/defconfig_ppc_64-power8-linuxapp-gcc
> +++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
> @@ -58,6 +58,3 @@ CONFIG_RTE_LIBRTE_FM10K_PMD=n
>
>   # This following libraries are not available on Power. So they're turned
> off.
>   CONFIG_RTE_LIBRTE_SCHED=n
> -CONFIG_RTE_LIBRTE_PORT=n
> -CONFIG_RTE_LIBRTE_TABLE=n
> -CONFIG_RTE_LIBRTE_PIPELINE=n
> diff --git a/examples/ip_pipeline/cpu_core_map.c
> b/examples/ip_pipeline/cpu_core_map.c
> index cb088b1..482e68e 100644
> --- a/examples/ip_pipeline/cpu_core_map.c
> +++ b/examples/ip_pipeline/cpu_core_map.c
> @@ -351,9 +351,6 @@ cpu_core_map_compute_linux(struct cpu_core_map *map)
>   int lcore_socket_id =
>   cpu_core_map_get_socket_id_linux(lcore_id);
>
> - if (lcore_socket_id < 0)
> - return -1;
> -
>   if (((uint32_t) lcore_socket_id) == socket_id)
>   n_detected++;
>   }
> @@ -368,18 +365,11 @@ cpu_core_map_compute_linux(struct cpu_core_map *map)
>   cpu_core_map_get_socket_id_linux(
>   lcore_id);
>
> - if (lcore_socket_id < 0)
> - return -1;
> -
> Why to remove the lcore_socket_id check?
>
>   int lcore_core_id =
>   cpu_core_map_get_core_id_linux(
>   lcore_id);
>
> - if (lcore_core_id < 0)
> - return -1;
> -
> - if (((uint32_t) lcore_socket_id ==
> socket_id) &&
> - ((uint32_t) lcore_core_id ==
> core_id)) {
> + if ((uint32_t) lcore_socket_id == socket_id)
> {
>   uint32_t pos = cpu_core_map_pos(map,
>   socket_id,
>   core_id_contig,
> diff --git a/examples/ip_pipeline/init.c b/examples/ip_pipeline/init.c index
> cd167f6..60c931f 100644
> --- a/examples/ip_pipeline/init.c
> +++ b/examples/ip_pipeline/init.c
> @@ -61,7 +61,11 @@ static void
>   app_init_core_map(struct app_params *app)  {
>   APP_LOG(app, HIGH, "Initializing CPU core map ...");
> +#if defined(RTE_ARCH_PPC_64)
> + app->core_map = cpu_core_map_init(2, 5, 1, 0); #else
>
> This value seems quite strange. Can you give more detail?
>
>   app->core_map = cpu_core_map_init(4, 32, 4, 0);
> +#endif
>
>   if (app->core_map == NULL)
>   rte_panic("Cannot create CPU core map\n");
> --
> 1.9.1
>
>
>

[dpdk-dev] [PATCH v4 3/6] ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64

2016-08-11 Thread gowrishankar muthukrishnan

On Thursday 11 August 2016 03:59 PM, Chao Zhu wrote:
> Gowrishankar,
>
> Thanks for the detail.
> If my understanding is correct, Power8 has different chips. Some of the 
> OpenPOWER chips have 8 cores per socket. And the max threads per core is 8. 
> Should we support this in cpu_core_map_init()?
>
> Here's a dump from the OpenPOWER system.
> ==
> # lscpu
> Architecture:  ppc64le
> Byte Order:Little Endian
> CPU(s):64
> On-line CPU(s) list:   0,8,16,24,32,40,48,56
> Off-line CPU(s) list:  1-7,9-15,17-23,25-31,33-39,41-47,49-55,57-63
> Thread(s) per core:1
> Core(s) per socket:8
> Socket(s): 1
> NUMA node(s):  1
> Model: unknown
> L1d cache: 64K
> L1i cache: 32K
> L2 cache:  512K
> L3 cache:  8192K
> NUMA node0 CPU(s): 0,8,16,24,32,40,48,56
> =
>
>
>> +#if defined(RTE_ARCH_PPC_64)
>> +app->core_map = cpu_core_map_init(2, 5, 1, 0); #else
>>
>> This value seems quite strange. Can you give more detail?

Based on config of tested server (as below output),

CPU(s):80
On-line CPU(s) list:   0,8,16,24,32,40,48,56,64,72
Off-line CPU(s) list: 
1-7,9-15,17-23,25-31,33-39,41-47,49-55,57-63,65-71,73-79
Thread(s) per core:1  <<<
Core(s) per socket:5   <<<
Socket(s): 2   <<<
NUMA node(s):  2

cpu_core_map_init parameters (2,5,1,0) were prepared. Instead, we can 
cap max sockets/core/ht
counts to possible maximum supported today.

Regards,
Gowrishankar
>>
>>  app->core_map = cpu_core_map_init(4, 32, 4, 0);
>> +#endif
>
> -Original Message-
> From: gowrishankar muthukrishnan [mailto:gowrishankar.m at linux.vnet.ibm.com]
> Sent: 2016?8?9? 19:14
> To: Chao Zhu ; dev at dpdk.org
> Cc: 'Bruce Richardson' ; 'Konstantin Ananyev' 
> ; 'Thomas Monjalon'  6wind.com>; 'Cristian Dumitrescu' ; 
> 'Pradeep' 
> Subject: Re: [PATCH v4 3/6] ip_pipeline: fix lcore mapping for varying SMT 
> threads as in ppc64
>
> Hi Chao,
> Sure. Please find below one.
>
> This patch fixes ip_pipeline panic in app_init_core_map while preparing cpu 
> core map in powerpc with SMT off. cpu_core_map_compute_linux currently 
> prepares core mapping based on file existence in sysfs ie.
>
> /sys/devices/system/cpu/cpu/topology/physical_package_id
> /sys/devices/system/cpu/cpu/topology/core_id
>
> These files do not exist for lcores which are offline for any reason (as in 
> powerpc, while SMT is off). In this situation, this function should further 
> continue preparing map for other online lcores instead of returning with -1 
> for a first unavailable lcore.
>
> Also, in SMT=off scenario for powerpc, lcore ids can not be always indexed 
> from
> 0 upto 'number of cores present' (/sys/devices/system/cpu/present). For eg, 
> for an online lcore 32, core_id returned in sysfs is 112 where online lcores 
> are
> 10 (as in one configuration), hence sysfs lcore id can not be checked with 
> indexing lcore number before positioning lcore map array.
>
> Thanks,
> Gowrishankar
>
> On Tuesday 09 August 2016 02:37 PM, Chao Zhu wrote:
>> Gowrishankar,
>>
>> Can you give more description about this patch?
>> Thank you!
>>
>> -Original Message-
>> From: Gowrishankar Muthukrishnan
>> [mailto:gowrishankar.m at linux.vnet.ibm.com]
>> Sent: 2016?8?6? 20:33
>> To: dev at dpdk.org
>> Cc: Chao Zhu ; Bruce Richardson
>> ; Konstantin Ananyev
>> ; Thomas Monjalon
>> ; Cristian Dumitrescu
>> ; Pradeep ;
>> gowrishankar 
>> Subject: [PATCH v4 3/6] ip_pipeline: fix lcore mapping for varying SMT
>> threads as in ppc64
>>
>> From: gowrishankar 
>>
>> offline lcore would still refer to original core id and this has to be
>> considered while creating cpu core mask.
>>
>> Signed-off-by: Gowrishankar 
>> ---
>>config/defconfig_ppc_64-power8-linuxapp-gcc |  3 ---
>>examples/ip_pipeline/cpu_core_map.c | 12 +---
>>examples/ip_pipeline/init.c |  4 
>>3 files changed, 5 insertions(+), 14 deletions(-)
>>
>> diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc
>> b/config/defconfig_ppc_64-power8-linuxapp-gcc
>> index dede34f..a084672 100644
>> --- a/config/defconfig_ppc_64-power8-linuxapp-gcc
>> +++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
>> @@ -58,6 +58,3 @@ CONFIG_RTE_LIBRTE_FM10K_PMD=n
>>
>># This following libraries are

[dpdk-dev] [PATCH v4 3/6] ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64

2016-08-12 Thread gowrishankar muthukrishnan

On Friday 12 August 2016 02:14 PM, Chao Zhu wrote:
> Gowrishankar,
>
> I suggest to set the following value:
>
> n_max_cores_per_socket = 8
> n_max_ht_per_core = 8
>
> This will cover most of the Power8 servers.
> Any comments?
Sure Chao. I will include this change in v5. If there are no other comments,
I can spin out v5, with changes in this patch.

Regards,
Gowrishankar
>
> -----Original Message-
> From: gowrishankar muthukrishnan [mailto:gowrishankar.m at linux.vnet.ibm.com]
> Sent: 2016?8?11? 20:02
> To: Chao Zhu 
> Cc: dev at dpdk.org; 'Bruce Richardson' ; 
> 'Konstantin Ananyev' ; 'Thomas Monjalon' 
> ; 'Cristian Dumitrescu'  intel.com>; 'Pradeep' 
> Subject: Re: [PATCH v4 3/6] ip_pipeline: fix lcore mapping for varying SMT 
> threads as in ppc64
>
> On Thursday 11 August 2016 03:59 PM, Chao Zhu wrote:
>> Gowrishankar,
>>
>> Thanks for the detail.
>> If my understanding is correct, Power8 has different chips. Some of the 
>> OpenPOWER chips have 8 cores per socket. And the max threads per core is 8. 
>> Should we support this in cpu_core_map_init()?
>>
>> Here's a dump from the OpenPOWER system.
>> ==
>> # lscpu
>> Architecture:  ppc64le
>> Byte Order:Little Endian
>> CPU(s):64
>> On-line CPU(s) list:   0,8,16,24,32,40,48,56
>> Off-line CPU(s) list:  1-7,9-15,17-23,25-31,33-39,41-47,49-55,57-63
>> Thread(s) per core:1
>> Core(s) per socket:8
>> Socket(s): 1
>> NUMA node(s):  1
>> Model: unknown
>> L1d cache: 64K
>> L1i cache: 32K
>> L2 cache:  512K
>> L3 cache:  8192K
>> NUMA node0 CPU(s): 0,8,16,24,32,40,48,56
>> =
>>
>>
>>> +#if defined(RTE_ARCH_PPC_64)
>>> +   app->core_map = cpu_core_map_init(2, 5, 1, 0); #else
>>>
>>> This value seems quite strange. Can you give more detail?
> Based on config of tested server (as below output),
>
> CPU(s):80
> On-line CPU(s) list:   0,8,16,24,32,40,48,56,64,72
> Off-line CPU(s) list:
> 1-7,9-15,17-23,25-31,33-39,41-47,49-55,57-63,65-71,73-79
> Thread(s) per core:1  <<<
> Core(s) per socket:5   <<<
> Socket(s): 2   <<<
> NUMA node(s):  2
>
> cpu_core_map_init parameters (2,5,1,0) were prepared. Instead, we can cap max 
> sockets/core/ht counts to possible maximum supported today.
>
> Regards,
> Gowrishankar
>>> app->core_map = cpu_core_map_init(4, 32, 4, 0);
>>> +#endif
>> -Original Message-
>> From: gowrishankar muthukrishnan
>> [mailto:gowrishankar.m at linux.vnet.ibm.com]
>> Sent: 2016?8?9? 19:14
>> To: Chao Zhu ; dev at dpdk.org
>> Cc: 'Bruce Richardson' ; 'Konstantin
>> Ananyev' ; 'Thomas Monjalon'
>> ; 'Cristian Dumitrescu'
>> ; 'Pradeep' 
>> Subject: Re: [PATCH v4 3/6] ip_pipeline: fix lcore mapping for varying
>> SMT threads as in ppc64
>>
>> Hi Chao,
>> Sure. Please find below one.
>>
>> This patch fixes ip_pipeline panic in app_init_core_map while preparing cpu 
>> core map in powerpc with SMT off. cpu_core_map_compute_linux currently 
>> prepares core mapping based on file existence in sysfs ie.
>>
>> /sys/devices/system/cpu/cpu/topology/physical_package_id
>>  /sys/devices/system/cpu/cpu/topology/core_id
>>
>> These files do not exist for lcores which are offline for any reason (as in 
>> powerpc, while SMT is off). In this situation, this function should further 
>> continue preparing map for other online lcores instead of returning with -1 
>> for a first unavailable lcore.
>>
>> Also, in SMT=off scenario for powerpc, lcore ids can not be always
>> indexed from
>> 0 upto 'number of cores present' (/sys/devices/system/cpu/present).
>> For eg, for an online lcore 32, core_id returned in sysfs is 112 where
>> online lcores are
>> 10 (as in one configuration), hence sysfs lcore id can not be checked with 
>> indexing lcore number before positioning lcore map array.
>>
>> Thanks,
>> Gowrishankar
>>
>> On Tuesday 09 August 2016 02:37 PM, Chao Zhu wrote:
>>> Gowrishankar,
>>>
>>> Can you give more description about this patch?
>>> Thank you!
>>>
>>> -Original Message-
>>> From: Gowrishankar Muthukrishnan
>>> [mailto:gowrishankar.m at linux.vnet.ibm.com]
>>> Sent: 2016?8?6? 20:33
>>> To:

[dpdk-dev] [PATCH v4 3/6] ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64

2016-08-12 Thread gowrishankar muthukrishnan

On Friday 12 August 2016 03:45 PM, Chao Zhu wrote:
> Another comment is, comment out lcore_socket_id check will influence other 
> architectures. If possible, I would like to make this change to Power 
> specific.

Hi Chao,
I am revisiting cpu_core_map_init() fn. I realize, all we handle is max 
values of socket/core/ht.
So, ideally the function should not break in any arch.

In my quick test w/o adjusting prev max values (4,32,4,0), only for ht > 
1, creating cpu map panics
in ppc i.e (4,32,1,0) is able to create core map and app runs. I 
continue to debug this and fix
this example app separately.

So, I will be sending powerpc specific enablement of lpm,acl,port,table 
and sched in v5.
Example ip_pipeline will be fixed in separate patch.

Thanks,
Gowrishankar
> -Original Message-
> From: gowrishankar muthukrishnan [mailto:gowrishankar.m at linux.vnet.ibm.com]
> Sent: 2016?8?12? 17:00
> To: Chao Zhu 
> Cc: dev at dpdk.org; 'Bruce Richardson' ; 
> 'Konstantin Ananyev' ; 'Thomas Monjalon' 
> ; 'Cristian Dumitrescu'  intel.com>; 'Pradeep' 
> Subject: Re: [PATCH v4 3/6] ip_pipeline: fix lcore mapping for varying SMT 
> threads as in ppc64
>
> On Friday 12 August 2016 02:14 PM, Chao Zhu wrote:
>> Gowrishankar,
>>
>> I suggest to set the following value:
>>
>> n_max_cores_per_socket = 8
>> n_max_ht_per_core = 8
>>
>> This will cover most of the Power8 servers.
>> Any comments?
> Sure Chao. I will include this change in v5. If there are no other comments, 
> I can spin out v5, with changes in this patch.
>
> Regards,
> Gowrishankar
>> -Original Message-
>> From: gowrishankar muthukrishnan
>> [mailto:gowrishankar.m at linux.vnet.ibm.com]
>> Sent: 2016?8?11? 20:02
>> To: Chao Zhu 
>> Cc: dev at dpdk.org; 'Bruce Richardson' ;
>> 'Konstantin Ananyev' ; 'Thomas Monjalon'
>> ; 'Cristian Dumitrescu'
>> ; 'Pradeep' 
>> Subject: Re: [PATCH v4 3/6] ip_pipeline: fix lcore mapping for varying
>> SMT threads as in ppc64
>>
>> On Thursday 11 August 2016 03:59 PM, Chao Zhu wrote:
>>> Gowrishankar,
>>>
>>> Thanks for the detail.
>>> If my understanding is correct, Power8 has different chips. Some of the 
>>> OpenPOWER chips have 8 cores per socket. And the max threads per core is 8. 
>>> Should we support this in cpu_core_map_init()?
>>>
>>> Here's a dump from the OpenPOWER system.
>>> ==
>>> # lscpu
>>> Architecture:  ppc64le
>>> Byte Order:Little Endian
>>> CPU(s):64
>>> On-line CPU(s) list:   0,8,16,24,32,40,48,56
>>> Off-line CPU(s) list:  1-7,9-15,17-23,25-31,33-39,41-47,49-55,57-63
>>> Thread(s) per core:1
>>> Core(s) per socket:8
>>> Socket(s): 1
>>> NUMA node(s):  1
>>> Model: unknown
>>> L1d cache: 64K
>>> L1i cache: 32K
>>> L2 cache:  512K
>>> L3 cache:  8192K
>>> NUMA node0 CPU(s): 0,8,16,24,32,40,48,56
>>> =
>>>
>>>
>>>> +#if defined(RTE_ARCH_PPC_64)
>>>> +  app->core_map = cpu_core_map_init(2, 5, 1, 0); #else
>>>>
>>>> This value seems quite strange. Can you give more detail?
>> Based on config of tested server (as below output),
>>
>> CPU(s):80
>> On-line CPU(s) list:   0,8,16,24,32,40,48,56,64,72
>> Off-line CPU(s) list:
>> 1-7,9-15,17-23,25-31,33-39,41-47,49-55,57-63,65-71,73-79
>> Thread(s) per core:1  <<<
>> Core(s) per socket:5   <<<
>> Socket(s): 2   <<<
>> NUMA node(s):  2
>>
>> cpu_core_map_init parameters (2,5,1,0) were prepared. Instead, we can cap 
>> max sockets/core/ht counts to possible maximum supported today.
>>
>> Regards,
>> Gowrishankar
>>>>app->core_map = cpu_core_map_init(4, 32, 4, 0);
>>>> +#endif
>>> -Original Message-
>>> From: gowrishankar muthukrishnan
>>> [mailto:gowrishankar.m at linux.vnet.ibm.com]
>>> Sent: 2016?8?9? 19:14
>>> To: Chao Zhu ; dev at dpdk.org
>>> Cc: 'Bruce Richardson' ; 'Konstantin
>>> Ananyev' ; 'Thomas Monjalon'
>>> ; 'Cristian Dumitrescu'
>>> ; 'Pradeep' 
>>> Subject: Re: [PATCH v4 3/6] ip_pipeline: fix lcore mapping for
>>> varying SMT threads as in ppc64
>>>
>>> Hi Chao,
>>> Sure. Please find below one.
>>>

[dpdk-dev] [PATCH v5 1/8] lpm: add altivec intrinsics for dpdk lpm on ppc_64

2016-08-12 Thread Gowrishankar Muthukrishnan

From: gowrishankar <gowrishanka...@linux.vnet.ibm.com>

This patch adds ppc64le port for LPM library in DPDK.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 app/test/test_xmmt_ops.h   |  16 +++
 config/defconfig_ppc_64-power8-linuxapp-gcc|   1 -
 .../common/include/arch/ppc_64/rte_vect.h  |  60 
 lib/librte_lpm/Makefile|   2 +
 lib/librte_lpm/rte_lpm.h   |   2 +
 lib/librte_lpm/rte_lpm_altivec.h   | 154 +
 6 files changed, 234 insertions(+), 1 deletion(-)
 create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
 create mode 100644 lib/librte_lpm/rte_lpm_altivec.h

diff --git a/app/test/test_xmmt_ops.h b/app/test/test_xmmt_ops.h
index de9c16f..42174d2 100644
--- a/app/test/test_xmmt_ops.h
+++ b/app/test/test_xmmt_ops.h
@@ -62,6 +62,22 @@ vect_set_epi32(int i3, int i2, int i1, int i0)
 /* sets the 4 signed 32-bit integer values and returns the xmm_t variable */
 #define vect_set_epi32(i3, i2, i1, i0) _mm_set_epi32(i3, i2, i1, i0)

+#elif defined(RTE_ARCH_PPC_64)
+
+/* vect_* abstraction implementation using ALTIVEC */
+
+/* loads the xmm_t value from address p(does not need to be 16-byte aligned)*/
+#define vect_loadu_sil128(p) vec_ld(0, p)
+
+/* sets the 4 signed 32-bit integer values and returns the xmm_t variable */
+static inline xmm_t  __attribute__((always_inline))
+vect_set_epi32(int i3, int i2, int i1, int i0)
+{
+   xmm_t data = (xmm_t){i0, i1, i2, i3};
+
+   return data;
+}
+
 #endif

 #endif /* _TEST_XMMT_OPS_H_ */
diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index bef8f49..9ddf3c5 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -57,7 +57,6 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
 CONFIG_RTE_LIBRTE_FM10K_PMD=n

 # This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_LPM=n
 CONFIG_RTE_LIBRTE_ACL=n
 CONFIG_RTE_LIBRTE_SCHED=n
 CONFIG_RTE_LIBRTE_PORT=n
diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h 
b/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
new file mode 100644
index 000..05209e5
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
@@ -0,0 +1,60 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) IBM Corporation 2016.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in
+ *   the documentation and/or other materials provided with the
+ *   distribution.
+ * * Neither the name of IBM Corporation nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _RTE_VECT_PPC_64_H_
+#define _RTE_VECT_PPC_64_H_
+
+#include 
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef vector signed int xmm_t;
+
+#defineXMM_SIZE(sizeof(xmm_t))
+#defineXMM_MASK(XMM_SIZE - 1)
+
+typedef union rte_xmm {
+   xmm_tx;
+   uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
+   uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
+   uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
+   uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
+   double   pd[XMM_SIZE / sizeof(double)];
+} __attribute__((aligned(16))) rte_xmm_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_VECT_PPC_64_H_ */
diff --git a/lib/librte_lpm/Makefile b/lib/librte_lpm/Makefile
index 656ade2..3dc549d 100644
--- a/lib/librte_lpm/Makefile
+++ b/lib/librte_lpm/Makefile
@@ -51,6 +51,8 @@ ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) 
$(CONFIG_RTE_ARCH_ARM64)),)
 SYMLINK-$(CONFIG_RTE_LIBRTE_LPM)-include +=

[dpdk-dev] [PATCH v5 0/8] enable lpm, acl and other missing libraries in ppc64le

2016-08-12 Thread Gowrishankar Muthukrishnan

This patchset enables LPM, ACL and other few missing libs in ppc64le and also
address few patches in related examples (ip_pipeline and l3fwd).

Test report:
1. LPM and ACL unit tests passed.
   Steps:
   compile test app and run (with any needed params)
   lpm_autotest
   acl_autotest

2. Example ip_pipeline application verified for port forwarding.
   compile examples/ip_pipeline (adjust app_init_core_map
 param for ht to 1 in case of ppc64le in SMT=off mode).
   modify config/l3fwd.cfg as per enabled PMD ports.
   run ip_pipeline with config file option and check packets fwd.

v5 changes:
- no change in lpm lib enablement
- no change in acl lib enablement
- config file changes individually for sched,table,port,pipeline
  lib enablement
- ip_pipeline patch description and changes flagged only for ppc64le.
   app_init_core_map changes removed (due to bug found and under 
   investigation only on ppc64le/smt=off case).

v4 changes:
- fix transition4 in acl_run_altivec.h for gcc strict-aliasing error.
  Thanks to Chao Zhu for bringing up.

v3 changes:
- rebase over master to fix conflict in examples/l3fwd/l3fwd_em.c

v2 changes:
- enabling libs in config included as part of lib changes itself.

Gowrishankar Muthukrishnan (3):
  port: enable port library for ppc64le
  pipeline: enable pipeline library for ppc64le
  ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64

gowrishankar (5):
  lpm: add altivec intrinsics for dpdk lpm on ppc_64
  acl: add altivec intrinsics for dpdk acl on ppc_64
  l3fwd: add altivec support for em_hash_key
  table: enable table library for ppc64le
  sched: enable sched library for ppc64le

 app/test-acl/main.c|   4 +
 app/test/test_xmmt_ops.h   |  16 +
 config/defconfig_ppc_64-power8-linuxapp-gcc|   7 -
 examples/ip_pipeline/cpu_core_map.c|   8 +
 examples/l3fwd/l3fwd_em.c  |  10 +-
 lib/librte_acl/Makefile|   2 +
 lib/librte_acl/acl.h   |   4 +
 lib/librte_acl/acl_run.h   |   2 +
 lib/librte_acl/acl_run_altivec.c   |  47 +++
 lib/librte_acl/acl_run_altivec.h   | 329 +
 lib/librte_acl/rte_acl.c   |  13 +
 lib/librte_acl/rte_acl.h   |   1 +
 .../common/include/arch/ppc_64/rte_vect.h  |  60 
 lib/librte_lpm/Makefile|   2 +
 lib/librte_lpm/rte_lpm.h   |   2 +
 lib/librte_lpm/rte_lpm_altivec.h   | 154 ++
 16 files changed, 653 insertions(+), 8 deletions(-)
 create mode 100644 lib/librte_acl/acl_run_altivec.c
 create mode 100644 lib/librte_acl/acl_run_altivec.h
 create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
 create mode 100644 lib/librte_lpm/rte_lpm_altivec.h

-- 
1.9.1

[dpdk-dev] [PATCH v5 4/8] table: enable table library for ppc64le

2016-08-12 Thread Gowrishankar Muthukrishnan

From: gowrishankar <gowrishanka...@linux.vnet.ibm.com>

This patch enables librte_table in ppc64le.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 config/defconfig_ppc_64-power8-linuxapp-gcc | 1 -
 1 file changed, 1 deletion(-)

diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index dede34f..41f67d5 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -59,5 +59,4 @@ CONFIG_RTE_LIBRTE_FM10K_PMD=n
 # This following libraries are not available on Power. So they're turned off.
 CONFIG_RTE_LIBRTE_SCHED=n
 CONFIG_RTE_LIBRTE_PORT=n
-CONFIG_RTE_LIBRTE_TABLE=n
 CONFIG_RTE_LIBRTE_PIPELINE=n
-- 
1.9.1

[dpdk-dev] [PATCH v5 5/8] sched: enable sched library for ppc64le

2016-08-12 Thread Gowrishankar Muthukrishnan

From: gowrishankar <gowrishanka...@linux.vnet.ibm.com>

This patch enables librte_sched in ppc64le.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 config/defconfig_ppc_64-power8-linuxapp-gcc | 1 -
 1 file changed, 1 deletion(-)

diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index 41f67d5..0c7060f 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -57,6 +57,5 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
 CONFIG_RTE_LIBRTE_FM10K_PMD=n

 # This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_SCHED=n
 CONFIG_RTE_LIBRTE_PORT=n
 CONFIG_RTE_LIBRTE_PIPELINE=n
-- 
1.9.1

[dpdk-dev] [PATCH v5 2/8] acl: add altivec intrinsics for dpdk acl on ppc_64

2016-08-12 Thread Gowrishankar Muthukrishnan

From: gowrishankar <gowrishanka...@linux.vnet.ibm.com>

This patch adds port for ACL library in ppc64le.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 app/test-acl/main.c |   4 +
 config/defconfig_ppc_64-power8-linuxapp-gcc |   1 -
 lib/librte_acl/Makefile |   2 +
 lib/librte_acl/acl.h|   4 +
 lib/librte_acl/acl_run.h|   2 +
 lib/librte_acl/acl_run_altivec.c|  47 
 lib/librte_acl/acl_run_altivec.h| 329 
 lib/librte_acl/rte_acl.c|  13 ++
 lib/librte_acl/rte_acl.h|   1 +
 9 files changed, 402 insertions(+), 1 deletion(-)
 create mode 100644 lib/librte_acl/acl_run_altivec.c
 create mode 100644 lib/librte_acl/acl_run_altivec.h

diff --git a/app/test-acl/main.c b/app/test-acl/main.c
index d366981..1b2b176 100644
--- a/app/test-acl/main.c
+++ b/app/test-acl/main.c
@@ -105,6 +105,10 @@ static const struct acl_alg acl_alg[] = {
.name = "neon",
.alg = RTE_ACL_CLASSIFY_NEON,
},
+   {
+   .name = "altivec",
+   .alg = RTE_ACL_CLASSIFY_ALTIVEC,
+   },
 };

 static struct {
diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index 9ddf3c5..dede34f 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -57,7 +57,6 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
 CONFIG_RTE_LIBRTE_FM10K_PMD=n

 # This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_ACL=n
 CONFIG_RTE_LIBRTE_SCHED=n
 CONFIG_RTE_LIBRTE_PORT=n
 CONFIG_RTE_LIBRTE_TABLE=n
diff --git a/lib/librte_acl/Makefile b/lib/librte_acl/Makefile
index 9803e9d..d05be66 100644
--- a/lib/librte_acl/Makefile
+++ b/lib/librte_acl/Makefile
@@ -52,6 +52,8 @@ SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_scalar.c
 ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) $(CONFIG_RTE_ARCH_ARM64)),)
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_neon.c
 CFLAGS_acl_run_neon.o += -flax-vector-conversions -Wno-maybe-uninitialized
+else ifeq ($(CONFIG_RTE_ARCH_PPC_64),y)
+SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_altivec.c
 else
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_sse.c
 #check if flag for SSE4.1 is already on, if not set it up manually
diff --git a/lib/librte_acl/acl.h b/lib/librte_acl/acl.h
index 09d6784..6664a55 100644
--- a/lib/librte_acl/acl.h
+++ b/lib/librte_acl/acl.h
@@ -234,6 +234,10 @@ int
 rte_acl_classify_neon(const struct rte_acl_ctx *ctx, const uint8_t **data,
uint32_t *results, uint32_t num, uint32_t categories);

+int
+rte_acl_classify_altivec(const struct rte_acl_ctx *ctx, const uint8_t **data,
+   uint32_t *results, uint32_t num, uint32_t categories);
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
diff --git a/lib/librte_acl/acl_run.h b/lib/librte_acl/acl_run.h
index b2fc42c..024f393 100644
--- a/lib/librte_acl/acl_run.h
+++ b/lib/librte_acl/acl_run.h
@@ -39,7 +39,9 @@

 #define MAX_SEARCHES_AVX16 16
 #define MAX_SEARCHES_SSE8  8
+#define MAX_SEARCHES_ALTIVEC8  8
 #define MAX_SEARCHES_SSE4  4
+#define MAX_SEARCHES_ALTIVEC4  4
 #define MAX_SEARCHES_SCALAR2

 #define GET_NEXT_4BYTES(prm, idx)  \
diff --git a/lib/librte_acl/acl_run_altivec.c b/lib/librte_acl/acl_run_altivec.c
new file mode 100644
index 000..3523526
--- /dev/null
+++ b/lib/librte_acl/acl_run_altivec.c
@@ -0,0 +1,47 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright (C) IBM Corporation 2016.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in
+ *   the documentation and/or other materials provided with the
+ *   distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON AN

[dpdk-dev] [PATCH v5 3/8] l3fwd: add altivec support for em_hash_key

2016-08-12 Thread Gowrishankar Muthukrishnan

From: gowrishankar <gowrishanka...@linux.vnet.ibm.com>

This patch adds ppc64le port for em_mask_key function.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 examples/l3fwd/l3fwd_em.c | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c
index def5a02..6053a62 100644
--- a/examples/l3fwd/l3fwd_em.c
+++ b/examples/l3fwd/l3fwd_em.c
@@ -259,8 +259,16 @@ em_mask_key(void *key, xmm_t mask)

return vandq_s32(data, mask);
 }
+#elif defined(RTE_MACHINE_CPUFLAG_ALTIVEC)
+static inline xmm_t
+em_mask_key(void *key, xmm_t mask)
+{
+   xmm_t data = vec_ld(0, (xmm_t *)(key));
+
+   return vec_and(data, mask);
+}
 #else
-#error No vector engine (SSE, NEON) available, check your toolchain
+#error No vector engine (SSE, NEON, ALTIVEC) available, check your toolchain
 #endif

 static inline uint8_t
-- 
1.9.1

[dpdk-dev] [PATCH v5 6/8] port: enable port library for ppc64le

2016-08-12 Thread Gowrishankar Muthukrishnan

This patch enables librte_port in ppc64le.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 config/defconfig_ppc_64-power8-linuxapp-gcc | 1 -
 1 file changed, 1 deletion(-)

diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index 0c7060f..1fc8df2 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -57,5 +57,4 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
 CONFIG_RTE_LIBRTE_FM10K_PMD=n

 # This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_PORT=n
 CONFIG_RTE_LIBRTE_PIPELINE=n
-- 
1.9.1

[dpdk-dev] [PATCH v5 7/8] pipeline: enable pipeline library for ppc64le

2016-08-12 Thread Gowrishankar Muthukrishnan

This patch enables librte_pipeline for ppc64le.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 config/defconfig_ppc_64-power8-linuxapp-gcc | 2 --
 1 file changed, 2 deletions(-)

diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index 1fc8df2..f953e61 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -56,5 +56,3 @@ CONFIG_RTE_LIBRTE_PMD_BOND=n
 CONFIG_RTE_LIBRTE_ENIC_PMD=n
 CONFIG_RTE_LIBRTE_FM10K_PMD=n

-# This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_PIPELINE=n
-- 
1.9.1

[dpdk-dev] [PATCH v5 8/8] ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64

2016-08-12 Thread Gowrishankar Muthukrishnan

This patch fixes ip_pipeline panic in app_init_core_map while preparing cpu
core map in powerpc with SMT off. cpu_core_map_compute_linux currently prepares
core mapping based on file existence in sysfs ie.

/sys/devices/system/cpu/cpu/topology/physical_package_id
  /sys/devices/system/cpu/cpu/topology/core_id

These files do not exist for lcores which are offline for any reason (as in
powerpc, while SMT is off). In this situation, this function should further
continue preparing map for other online lcores instead of returning with -1
for a first unavailable lcore.

Also, in SMT=off scenario for powerpc, lcore ids can not be always indexed from
0 upto 'number of cores present' (/sys/devices/system/cpu/present). For eg, for
an online lcore 32, core_id returned in sysfs is 112 where online lcores are
10 (as in one configuration), hence sysfs lcore id can not be checked with
indexing lcore number before positioning lcore map array.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 examples/ip_pipeline/cpu_core_map.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/examples/ip_pipeline/cpu_core_map.c 
b/examples/ip_pipeline/cpu_core_map.c
index cb088b1..dd8f678 100644
--- a/examples/ip_pipeline/cpu_core_map.c
+++ b/examples/ip_pipeline/cpu_core_map.c
@@ -351,8 +351,10 @@ cpu_core_map_compute_linux(struct cpu_core_map *map)
int lcore_socket_id =
cpu_core_map_get_socket_id_linux(lcore_id);

+#if !defined(RTE_ARCH_PPC_64)
if (lcore_socket_id < 0)
return -1;
+#endif

if (((uint32_t) lcore_socket_id) == socket_id)
n_detected++;
@@ -368,6 +370,7 @@ cpu_core_map_compute_linux(struct cpu_core_map *map)
cpu_core_map_get_socket_id_linux(
lcore_id);

+#if !defined(RTE_ARCH_PPC_64)
if (lcore_socket_id < 0)
return -1;

@@ -377,9 +380,14 @@ cpu_core_map_compute_linux(struct cpu_core_map *map)

if (lcore_core_id < 0)
return -1;
+#endif

+#if !defined(RTE_ARCH_PPC_64)
if (((uint32_t) lcore_socket_id == socket_id) &&
((uint32_t) lcore_core_id == core_id)) {
+#else
+   if (((uint32_t) lcore_socket_id == socket_id)) {
+#endif
uint32_t pos = cpu_core_map_pos(map,
socket_id,
core_id_contig,
-- 
1.9.1

[dpdk-dev] [PATCH v4 3/6] ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64

2016-08-12 Thread gowrishankar muthukrishnan

Hi Chao,
I have simplified the approach for this patch in v5.
* Including ppc64le specific changes
* App panic in creating core map only in SMT=off case, so that would be
   addressed separately.

Hoping with new patch set v5, your review would be easier.

Regards,
Gowrishankar

On Friday 12 August 2016 03:45 PM, Chao Zhu wrote:
> Another comment is, comment out lcore_socket_id check will influence other 
> architectures. If possible, I would like to make this change to Power 
> specific.
>
> -Original Message-
> From: gowrishankar muthukrishnan [mailto:gowrishankar.m at linux.vnet.ibm.com]
> Sent: 2016?8?12? 17:00
> To: Chao Zhu 
> Cc: dev at dpdk.org; 'Bruce Richardson' ; 
> 'Konstantin Ananyev' ; 'Thomas Monjalon' 
> ; 'Cristian Dumitrescu'  intel.com>; 'Pradeep' 
> Subject: Re: [PATCH v4 3/6] ip_pipeline: fix lcore mapping for varying SMT 
> threads as in ppc64
>
> On Friday 12 August 2016 02:14 PM, Chao Zhu wrote:
>> Gowrishankar,
>>
>> I suggest to set the following value:
>>
>> n_max_cores_per_socket = 8
>> n_max_ht_per_core = 8
>>
>> This will cover most of the Power8 servers.
>> Any comments?
> Sure Chao. I will include this change in v5. If there are no other comments, 
> I can spin out v5, with changes in this patch.
>
> Regards,
> Gowrishankar
>> -Original Message-
>> From: gowrishankar muthukrishnan
>> [mailto:gowrishankar.m at linux.vnet.ibm.com]
>> Sent: 2016?8?11? 20:02
>> To: Chao Zhu 
>> Cc: dev at dpdk.org; 'Bruce Richardson' ;
>> 'Konstantin Ananyev' ; 'Thomas Monjalon'
>> ; 'Cristian Dumitrescu'
>> ; 'Pradeep' 
>> Subject: Re: [PATCH v4 3/6] ip_pipeline: fix lcore mapping for varying
>> SMT threads as in ppc64
>>
>> On Thursday 11 August 2016 03:59 PM, Chao Zhu wrote:
>>> Gowrishankar,
>>>
>>> Thanks for the detail.
>>> If my understanding is correct, Power8 has different chips. Some of the 
>>> OpenPOWER chips have 8 cores per socket. And the max threads per core is 8. 
>>> Should we support this in cpu_core_map_init()?
>>>
>>> Here's a dump from the OpenPOWER system.
>>> ==
>>> # lscpu
>>> Architecture:  ppc64le
>>> Byte Order:Little Endian
>>> CPU(s):64
>>> On-line CPU(s) list:   0,8,16,24,32,40,48,56
>>> Off-line CPU(s) list:  1-7,9-15,17-23,25-31,33-39,41-47,49-55,57-63
>>> Thread(s) per core:1
>>> Core(s) per socket:8
>>> Socket(s): 1
>>> NUMA node(s):  1
>>> Model: unknown
>>> L1d cache: 64K
>>> L1i cache: 32K
>>> L2 cache:  512K
>>> L3 cache:  8192K
>>> NUMA node0 CPU(s): 0,8,16,24,32,40,48,56
>>> =
>>>
>>>
>>>> +#if defined(RTE_ARCH_PPC_64)
>>>> +  app->core_map = cpu_core_map_init(2, 5, 1, 0); #else
>>>>
>>>> This value seems quite strange. Can you give more detail?
>> Based on config of tested server (as below output),
>>
>> CPU(s):80
>> On-line CPU(s) list:   0,8,16,24,32,40,48,56,64,72
>> Off-line CPU(s) list:
>> 1-7,9-15,17-23,25-31,33-39,41-47,49-55,57-63,65-71,73-79
>> Thread(s) per core:1  <<<
>> Core(s) per socket:5   <<<
>> Socket(s): 2   <<<
>> NUMA node(s):  2
>>
>> cpu_core_map_init parameters (2,5,1,0) were prepared. Instead, we can cap 
>> max sockets/core/ht counts to possible maximum supported today.
>>
>> Regards,
>> Gowrishankar
>>>>app->core_map = cpu_core_map_init(4, 32, 4, 0);
>>>> +#endif
>>> -Original Message-
>>> From: gowrishankar muthukrishnan
>>> [mailto:gowrishankar.m at linux.vnet.ibm.com]
>>> Sent: 2016?8?9? 19:14
>>> To: Chao Zhu ; dev at dpdk.org
>>> Cc: 'Bruce Richardson' ; 'Konstantin
>>> Ananyev' ; 'Thomas Monjalon'
>>> ; 'Cristian Dumitrescu'
>>> ; 'Pradeep' 
>>> Subject: Re: [PATCH v4 3/6] ip_pipeline: fix lcore mapping for
>>> varying SMT threads as in ppc64
>>>
>>> Hi Chao,
>>> Sure. Please find below one.
>>>
>>> This patch fixes ip_pipeline panic in app_init_core_map while preparing cpu 
>>> core map in powerpc with SMT off. cpu_core_map_compute_linux currently 
>>> prepares core mapping based on file existence in sysfs ie.
>>>
>>> /

[dpdk-dev] [PATCH v6 0/9] enable lpm, acl and other missing libraries in ppc64le

2016-08-16 Thread Gowrishankar Muthukrishnan

This patchset enables LPM, ACL and other few missing libs in ppc64le and also
address few patches in related examples (ip_pipeline and l3fwd).

Test report:
1. LPM and ACL unit tests passed.
   Steps:
   compile test app and run (with any needed params)
   lpm_autotest
   acl_autotest
   table_autotest
 test_table_lpm_combined fails same as in intel in current master.

2. Example ip_pipeline application verified for port forwarding.
   compile examples/ip_pipeline (adjust app_init_core_map
 param for ht to 1 in case of ppc64le in SMT=off mode).
   modify config/l3fwd.cfg as per enabled PMD ports.
   run ip_pipeline with config file option and check packets fwd.

v6 changes:
- added cache alignment fix for rte hash table structs.

v5 changes:
- no change in lpm lib enablement
- no change in acl lib enablement
- config file changes individually for sched,table,port,pipeline
  lib enablement
- ip_pipeline patch description and changes flagged only for ppc64le.
   app_init_core_map changes removed (due to bug found and under 
   investigation only on ppc64le/smt=off case).

v4 changes:
- fix transition4 in acl_run_altivec.h for gcc strict-aliasing error.
  Thanks to Chao Zhu for bringing up.

v3 changes:
- rebase over master to fix conflict in examples/l3fwd/l3fwd_em.c

v2 changes:
- enabling libs in config included as part of lib changes itself.

Gowrishankar Muthukrishnan (9):
  lpm: add altivec intrinsics for dpdk lpm on ppc_64
  acl: add altivec intrinsics for dpdk acl on ppc_64
  l3fwd: add altivec support for em_hash_key
  table: enable table library for ppc64le
  sched: enable sched library for ppc64le
  port: enable port library for ppc64le
  pipeline: enable pipeline library for ppc64le
  ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64
  table: align rte table hash structs for cache line size

 app/test-acl/main.c|   4 +
 app/test/test_xmmt_ops.h   |  16 +
 config/defconfig_ppc_64-power8-linuxapp-gcc|   7 -
 examples/ip_pipeline/cpu_core_map.c|   8 +
 examples/l3fwd/l3fwd_em.c  |  10 +-
 lib/librte_acl/Makefile|   2 +
 lib/librte_acl/acl.h   |   4 +
 lib/librte_acl/acl_run.h   |   2 +
 lib/librte_acl/acl_run_altivec.c   |  47 +++
 lib/librte_acl/acl_run_altivec.h   | 329 +
 lib/librte_acl/rte_acl.c   |  13 +
 lib/librte_acl/rte_acl.h   |   1 +
 .../common/include/arch/ppc_64/rte_vect.h  |  60 
 lib/librte_lpm/Makefile|   2 +
 lib/librte_lpm/rte_lpm.h   |   2 +
 lib/librte_lpm/rte_lpm_altivec.h   | 154 ++
 lib/librte_table/rte_table_hash_key16.c|   4 +-
 lib/librte_table/rte_table_hash_key32.c|   4 +-
 lib/librte_table/rte_table_hash_key8.c |   2 +-
 19 files changed, 658 insertions(+), 13 deletions(-)
 create mode 100644 lib/librte_acl/acl_run_altivec.c
 create mode 100644 lib/librte_acl/acl_run_altivec.h
 create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
 create mode 100644 lib/librte_lpm/rte_lpm_altivec.h

-- 
1.9.1

[dpdk-dev] [PATCH v6 2/9] acl: add altivec intrinsics for dpdk acl on ppc_64

2016-08-16 Thread Gowrishankar Muthukrishnan

This patch adds port for ACL library in ppc64le.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 app/test-acl/main.c |   4 +
 config/defconfig_ppc_64-power8-linuxapp-gcc |   1 -
 lib/librte_acl/Makefile |   2 +
 lib/librte_acl/acl.h|   4 +
 lib/librte_acl/acl_run.h|   2 +
 lib/librte_acl/acl_run_altivec.c|  47 
 lib/librte_acl/acl_run_altivec.h| 329 
 lib/librte_acl/rte_acl.c|  13 ++
 lib/librte_acl/rte_acl.h|   1 +
 9 files changed, 402 insertions(+), 1 deletion(-)
 create mode 100644 lib/librte_acl/acl_run_altivec.c
 create mode 100644 lib/librte_acl/acl_run_altivec.h

diff --git a/app/test-acl/main.c b/app/test-acl/main.c
index d366981..1b2b176 100644
--- a/app/test-acl/main.c
+++ b/app/test-acl/main.c
@@ -105,6 +105,10 @@ static const struct acl_alg acl_alg[] = {
.name = "neon",
.alg = RTE_ACL_CLASSIFY_NEON,
},
+   {
+   .name = "altivec",
+   .alg = RTE_ACL_CLASSIFY_ALTIVEC,
+   },
 };

 static struct {
diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index 9ddf3c5..dede34f 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -57,7 +57,6 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
 CONFIG_RTE_LIBRTE_FM10K_PMD=n

 # This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_ACL=n
 CONFIG_RTE_LIBRTE_SCHED=n
 CONFIG_RTE_LIBRTE_PORT=n
 CONFIG_RTE_LIBRTE_TABLE=n
diff --git a/lib/librte_acl/Makefile b/lib/librte_acl/Makefile
index 9803e9d..d05be66 100644
--- a/lib/librte_acl/Makefile
+++ b/lib/librte_acl/Makefile
@@ -52,6 +52,8 @@ SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_scalar.c
 ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) $(CONFIG_RTE_ARCH_ARM64)),)
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_neon.c
 CFLAGS_acl_run_neon.o += -flax-vector-conversions -Wno-maybe-uninitialized
+else ifeq ($(CONFIG_RTE_ARCH_PPC_64),y)
+SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_altivec.c
 else
 SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_sse.c
 #check if flag for SSE4.1 is already on, if not set it up manually
diff --git a/lib/librte_acl/acl.h b/lib/librte_acl/acl.h
index 09d6784..6664a55 100644
--- a/lib/librte_acl/acl.h
+++ b/lib/librte_acl/acl.h
@@ -234,6 +234,10 @@ int
 rte_acl_classify_neon(const struct rte_acl_ctx *ctx, const uint8_t **data,
uint32_t *results, uint32_t num, uint32_t categories);

+int
+rte_acl_classify_altivec(const struct rte_acl_ctx *ctx, const uint8_t **data,
+   uint32_t *results, uint32_t num, uint32_t categories);
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
diff --git a/lib/librte_acl/acl_run.h b/lib/librte_acl/acl_run.h
index b2fc42c..024f393 100644
--- a/lib/librte_acl/acl_run.h
+++ b/lib/librte_acl/acl_run.h
@@ -39,7 +39,9 @@

 #define MAX_SEARCHES_AVX16 16
 #define MAX_SEARCHES_SSE8  8
+#define MAX_SEARCHES_ALTIVEC8  8
 #define MAX_SEARCHES_SSE4  4
+#define MAX_SEARCHES_ALTIVEC4  4
 #define MAX_SEARCHES_SCALAR2

 #define GET_NEXT_4BYTES(prm, idx)  \
diff --git a/lib/librte_acl/acl_run_altivec.c b/lib/librte_acl/acl_run_altivec.c
new file mode 100644
index 000..3523526
--- /dev/null
+++ b/lib/librte_acl/acl_run_altivec.c
@@ -0,0 +1,47 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright (C) IBM Corporation 2016.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in
+ *   the documentation and/or other materials provided with the
+ *   distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABI

[dpdk-dev] [PATCH v6 3/9] l3fwd: add altivec support for em_hash_key

2016-08-16 Thread Gowrishankar Muthukrishnan

This patch adds ppc64le port for em_mask_key function.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 examples/l3fwd/l3fwd_em.c | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c
index def5a02..6053a62 100644
--- a/examples/l3fwd/l3fwd_em.c
+++ b/examples/l3fwd/l3fwd_em.c
@@ -259,8 +259,16 @@ em_mask_key(void *key, xmm_t mask)

return vandq_s32(data, mask);
 }
+#elif defined(RTE_MACHINE_CPUFLAG_ALTIVEC)
+static inline xmm_t
+em_mask_key(void *key, xmm_t mask)
+{
+   xmm_t data = vec_ld(0, (xmm_t *)(key));
+
+   return vec_and(data, mask);
+}
 #else
-#error No vector engine (SSE, NEON) available, check your toolchain
+#error No vector engine (SSE, NEON, ALTIVEC) available, check your toolchain
 #endif

 static inline uint8_t
-- 
1.9.1

[dpdk-dev] [PATCH v6 5/9] sched: enable sched library for ppc64le

2016-08-16 Thread Gowrishankar Muthukrishnan

This patch enables librte_sched in ppc64le.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 config/defconfig_ppc_64-power8-linuxapp-gcc | 1 -
 1 file changed, 1 deletion(-)

diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index 41f67d5..0c7060f 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -57,6 +57,5 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
 CONFIG_RTE_LIBRTE_FM10K_PMD=n

 # This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_SCHED=n
 CONFIG_RTE_LIBRTE_PORT=n
 CONFIG_RTE_LIBRTE_PIPELINE=n
-- 
1.9.1

[dpdk-dev] [PATCH v6 6/9] port: enable port library for ppc64le

2016-08-16 Thread Gowrishankar Muthukrishnan

This patch enables librte_port in ppc64le.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 config/defconfig_ppc_64-power8-linuxapp-gcc | 1 -
 1 file changed, 1 deletion(-)

diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index 0c7060f..1fc8df2 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -57,5 +57,4 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
 CONFIG_RTE_LIBRTE_FM10K_PMD=n

 # This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_PORT=n
 CONFIG_RTE_LIBRTE_PIPELINE=n
-- 
1.9.1

[dpdk-dev] [PATCH v6 7/9] pipeline: enable pipeline library for ppc64le

2016-08-16 Thread Gowrishankar Muthukrishnan

This patch enables librte_pipeline for ppc64le.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 config/defconfig_ppc_64-power8-linuxapp-gcc | 2 --
 1 file changed, 2 deletions(-)

diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index 1fc8df2..f953e61 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -56,5 +56,3 @@ CONFIG_RTE_LIBRTE_PMD_BOND=n
 CONFIG_RTE_LIBRTE_ENIC_PMD=n
 CONFIG_RTE_LIBRTE_FM10K_PMD=n

-# This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_PIPELINE=n
-- 
1.9.1

[dpdk-dev] [PATCH v6 4/9] table: enable table library for ppc64le

2016-08-16 Thread Gowrishankar Muthukrishnan

This patch enables librte_table in ppc64le.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 config/defconfig_ppc_64-power8-linuxapp-gcc | 1 -
 1 file changed, 1 deletion(-)

diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc 
b/config/defconfig_ppc_64-power8-linuxapp-gcc
index dede34f..41f67d5 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -59,5 +59,4 @@ CONFIG_RTE_LIBRTE_FM10K_PMD=n
 # This following libraries are not available on Power. So they're turned off.
 CONFIG_RTE_LIBRTE_SCHED=n
 CONFIG_RTE_LIBRTE_PORT=n
-CONFIG_RTE_LIBRTE_TABLE=n
 CONFIG_RTE_LIBRTE_PIPELINE=n
-- 
1.9.1

[dpdk-dev] [PATCH v6 8/9] ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64

2016-08-16 Thread Gowrishankar Muthukrishnan

This patch fixes ip_pipeline panic in app_init_core_map while preparing cpu
core map in powerpc with SMT off. cpu_core_map_compute_linux currently prepares
core mapping based on file existence in sysfs ie.

/sys/devices/system/cpu/cpu/topology/physical_package_id
  /sys/devices/system/cpu/cpu/topology/core_id

These files do not exist for lcores which are offline for any reason (as in
powerpc, while SMT is off). In this situation, this function should further
continue preparing map for other online lcores instead of returning with -1
for a first unavailable lcore.

Also, in SMT=off scenario for powerpc, lcore ids can not be always indexed from
0 upto 'number of cores present' (/sys/devices/system/cpu/present). For eg, for
an online lcore 32, core_id returned in sysfs is 112 where online lcores are
10 (as in one configuration), hence sysfs lcore id can not be checked with
indexing lcore number before positioning lcore map array.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 examples/ip_pipeline/cpu_core_map.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/examples/ip_pipeline/cpu_core_map.c 
b/examples/ip_pipeline/cpu_core_map.c
index cb088b1..dd8f678 100644
--- a/examples/ip_pipeline/cpu_core_map.c
+++ b/examples/ip_pipeline/cpu_core_map.c
@@ -351,8 +351,10 @@ cpu_core_map_compute_linux(struct cpu_core_map *map)
int lcore_socket_id =
cpu_core_map_get_socket_id_linux(lcore_id);

+#if !defined(RTE_ARCH_PPC_64)
if (lcore_socket_id < 0)
return -1;
+#endif

if (((uint32_t) lcore_socket_id) == socket_id)
n_detected++;
@@ -368,6 +370,7 @@ cpu_core_map_compute_linux(struct cpu_core_map *map)
cpu_core_map_get_socket_id_linux(
lcore_id);

+#if !defined(RTE_ARCH_PPC_64)
if (lcore_socket_id < 0)
return -1;

@@ -377,9 +380,14 @@ cpu_core_map_compute_linux(struct cpu_core_map *map)

if (lcore_core_id < 0)
return -1;
+#endif

+#if !defined(RTE_ARCH_PPC_64)
if (((uint32_t) lcore_socket_id == socket_id) &&
((uint32_t) lcore_core_id == core_id)) {
+#else
+   if (((uint32_t) lcore_socket_id == socket_id)) {
+#endif
uint32_t pos = cpu_core_map_pos(map,
socket_id,
core_id_contig,
-- 
1.9.1

[dpdk-dev] [PATCH v6 9/9] table: align rte table hash structs for cache line size

2016-08-16 Thread Gowrishankar Muthukrishnan

rte table hash structs rte_bucket_4_8, rte_bucket_4_16 and rte_bucket_4_32 have
to be cache aligned as required by their corresponding hash create functions
rte_table_hash_create_key8_lru etc.

Signed-off-by: Gowrishankar Muthukrishnan 
---
 lib/librte_table/rte_table_hash_key16.c | 4 ++--
 lib/librte_table/rte_table_hash_key32.c | 4 ++--
 lib/librte_table/rte_table_hash_key8.c  | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/lib/librte_table/rte_table_hash_key16.c 
b/lib/librte_table/rte_table_hash_key16.c
index b7e000f..2102326 100644
--- a/lib/librte_table/rte_table_hash_key16.c
+++ b/lib/librte_table/rte_table_hash_key16.c
@@ -68,10 +68,10 @@ struct rte_bucket_4_16 {
uint64_t next_valid;

/* Cache line 1 */
-   uint64_t key[4][2];
+   uint64_t key[4][2] __rte_cache_aligned;

/* Cache line 2 */
-   uint8_t data[0];
+   uint8_t data[0] __rte_cache_aligned;
 };

 struct rte_table_hash {
diff --git a/lib/librte_table/rte_table_hash_key32.c 
b/lib/librte_table/rte_table_hash_key32.c
index a7aba49..619f63a 100644
--- a/lib/librte_table/rte_table_hash_key32.c
+++ b/lib/librte_table/rte_table_hash_key32.c
@@ -68,10 +68,10 @@ struct rte_bucket_4_32 {
uint64_t next_valid;

/* Cache lines 1 and 2 */
-   uint64_t key[4][4];
+   uint64_t key[4][4] __rte_cache_aligned;

/* Cache line 3 */
-   uint8_t data[0];
+   uint8_t data[0] __rte_cache_aligned;
 };

 struct rte_table_hash {
diff --git a/lib/librte_table/rte_table_hash_key8.c 
b/lib/librte_table/rte_table_hash_key8.c
index e2e2bdc..4d5e0cd 100644
--- a/lib/librte_table/rte_table_hash_key8.c
+++ b/lib/librte_table/rte_table_hash_key8.c
@@ -68,7 +68,7 @@ struct rte_bucket_4_8 {
uint64_t key[4];

/* Cache line 1 */
-   uint8_t data[0];
+   uint8_t data[0] __rte_cache_aligned;
 };

 struct rte_table_hash {
-- 
1.9.1

[dpdk-dev] [PATCH v6 9/9] table: align rte table hash structs for cache line size

2016-09-08 Thread gowrishankar muthukrishnan

Thanks Cristian and Thomas for your feedback. I have taken your suggestions
and sent out v7. Please check if the new patch is fine.

Thanks,
Gowrishankar

On Thursday 08 September 2016 03:10 PM, Dumitrescu, Cristian wrote:
>
>> -Original Message-
>> From: Thomas Monjalon [mailto:thomas.monjalon at 6wind.com]
>> Sent: Thursday, September 8, 2016 10:36 AM
>> To: Gowrishankar Muthukrishnan 
>> Cc: dev at dpdk.org; Dumitrescu, Cristian ;
>> Chao Zhu ; Richardson, Bruce
>> ; Ananyev, Konstantin
>> ; Pradeep 
>> Subject: Re: [dpdk-dev] [PATCH v6 9/9] table: align rte table hash structs 
>> for
>> cache line size
>>
>> 2016-08-31 17:29, Dumitrescu, Cristian:
>>> From: Gowrishankar Muthukrishnan
>>>> rte table hash structs rte_bucket_4_8, rte_bucket_4_16 and
>>>> rte_bucket_4_32 have
>>>> to be cache aligned as required by their corresponding hash create
>> functions
>>>> rte_table_hash_create_key8_lru etc.
>>> Hi Gowrishankar,
>>>
>>> My understanding is you are trying to work around the check invoked by
>> the hash table create functions that verifies the size of the bucket header
>> structure is a multiple of the cache line, right?
>>> Given that the size of this structure is 1x, 2x or 3x times 64 bytes, the 
>>> check
>> passes on IA CPUs (cache line of 64 bytes; explicit alignment to cache line 
>> size
>> is not needed in order to make the size of the structure a multiple of cache
>> line), but not on PPC CPUs (cache line of 128 bytes), correct?
>>> I don't think your proposal provides the best way to fix this issue, since
>> your code leads to a considerable increase in the memory consumption used
>> per bucket in most cases:
>>> - 100% more memory for 8-byte key hash table
>>> - 0% more for 16-byte key hash table (code does not fix anything,
>> explicit alignment is not needed)
>>> - 50% more for 32-byte key hash table
>>>
>>> I suggest you simply change the check: instead of validating this data
>> structure is a multiple of cache line size, validate it is a multiple of 64 
>> bytes.
>>
>> Any news please?
>> The whole series is blocked for this patch.
>> Should we expect a v7?
> Yes, I think we should. Small fix for a considerable benefit.
>
>

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