Hi Ashraf,
I did not see the Copyright update to Pci.h in this patch series.
There is also something strange about the subject line of the
commit messages. There is a '?' before MdePkg. Also, the first
part of the subject line should be MdePkg/Include/IndustryStandard.
Here is my git log
On 07/17/20 08:11, Gary Lin wrote:
> This patch series implement the driver for LSI 53C895A SCSI controller
> for OVMF so that the user can access the storage devices connected to
> QEMU "lsi" controller. The driver is disabled by default since LSI
> 53C895A is considered as a legacy device. To
Do we need any additional review on this before it getting submitted?
-Jeff
-Original Message-
From: Bi, Dandan
Sent: Tuesday, June 23, 2020 7:36 PM
To: Jeff Brasen ; devel@edk2.groups.io
Cc: Gao, Liming
Subject: RE: [PATCH v2] MdeModulePkg/DxeCorePerformanceLib: Switch to
On 07/17/20 08:11, Gary Lin wrote:
> This is the second part of LsiScsiPassThru(). LsiScsiProcessRequest() is
> added to translate the SCSI Request Packet into the LSI 53C895A
> commands. This function utilizes the so-called Script buffer to transmit
> a series of commands to the chip and then
On 07/17/20 08:11, Gary Lin wrote:
> Open PciIo protocol and use it to initialize the device. The
> initialization of LSI 53C895A is simple: just set the SRST bit in
> Interrupt Status Zero register to reset the device.
>
> v2:
> - Use the BITx macros for the bit constants
> - Add the closing
On 07/17/20 08:11, Gary Lin wrote:
> Implement LsiScsiGetNextTargetLun(), LsiScsiBuildDevicePath(),
> LsiScsiGetTargetLun(), and LsiScsiGetNextTarget() to report Targets and
> LUNs and build the device path.
>
> This commit also introduces two PCD value: PcdLsiScsiMaxTargetLimit and
>
Create an Library instance of ReportCpuHobLib from PlatformInitPei driver.
PA bits reported can be overriden using Library instance in Platform.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2674
Change-Id: I1097057046aa021dc2ff193fea335790513c10c4
Signed-off-by: IanX Kuo
---
Create an Library instance of ReportCpuHobLib from PlatformInitPei driver.
PA bits reported can be overriden using Library instance in Platform.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2674
Change-Id: I673f8fcd2d97bbd60229a60f53875e92826a7179
Signed-off-by: IanX Kuo
---
Create an Library instance of ReportCpuHobLib from PlatformInitPei driver.
PA bits reported can be overriden using Library instance in Platform.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2674
Change-Id: I1c14aece3b229c194960e91dc9505dd8120bbe30
Signed-off-by: IanX Kuo
---
Hello Liming,
Gentle Reminder.
As discussed before, please let us know when we can expect our changes (below
BZ) to get pushed in to Edk2Repo.
Please help to give an ETA.
BZ Details:
[edk2-devel] [PATCH] MdeModulePkg: Upon BootOption failure, Destroy RamDisk
memory before RSC
Create an Library instance of ReportCpuHobLib from PlatformInitPei driver.
PA bits reported can be overriden using Library instance in Platform.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2674
Change-Id: I999b29c30993c397f918a1f7b4ea19c61c0a460d
Signed-off-by: IanX Kuo
---
Create an Library instance of ReportCpuHobLib from PlatformInitPei driver.
PA bits reported can be overriden using Library instance in Platform.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2674
Change-Id: Ic312ec307b3bcd84051e48505038d9ca47d467e2
Signed-off-by: IanX Kuo
---
On 07/17/20 03:36, Guomin Jiang wrote:
> Upgrade openssl to 1.1.1g. the directory have been reorganized,
> openssl moved crypto/include/internal to include/crypto folder.
> So we change directory to match the re-organization.
>
> The dso_conf.h and opensslconf.h will generated in UNIX format,
>
On 7/15/20 11:17 AM, Tom Lendacky wrote:
On 7/15/20 10:55 AM, Laszlo Ersek wrote:
Hi Tom,
On 07/14/20 16:27, Lendacky, Thomas wrote:
From: Tom Lendacky
BZ:
Krishnadas:
The patch for BZ 2836 has passed reviewed. It will be merged early next week.
Then, your patch will also be merged next week.
Thanks
Liming
> -Original Message-
> From: Veliyathuparambil Prakashan, KrishnadasX
>
> Sent: Friday, July 17, 2020 12:09 PM
> To: Gao, Liming ;
Hello all:
In the ISCSI driver, Target TCP Port Input shows the default port as 3260.
Which can be set from 0 to 65535
As per below RFC it talks about the Default Port only. Still it not clearly
said if we can use the numbers 49152-65535 which is reserved.
https://tools.ietf.org/html/rfc3720
Replace BSD 2-Clause License with BSD+Patent License.
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Signed-off-by: Vin Xue
---
.../DesignWare/Drivers/UsbDeviceDxe/ComponentName.c| 8 +---
.../DesignWare/Drivers/UsbDeviceDxe/UsbDeviceDxe.c | 8 +---
Support GCC IA32/X64 build.
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Signed-off-by: Vin Xue
---
Silicon/Synopsys/DesignWare/DesignWare.dec | 9 -
Silicon/Synopsys/DesignWare/DesignWare.dsc | 17 +++--
.../Drivers/UsbDeviceDxe/UsbDeviceDxe.inf | 1 +
All of line endings of Acpi.dsc.inc are not CRLF, resolve this.
Signed-off-by: Masahisa Kojima
---
Silicon/Socionext/SynQuacer/Acpi.dsc.inc | 94 ++--
1 file changed, 47 insertions(+), 47 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/Acpi.dsc.inc
The second SPI controller is wired to the low speed 96boards
connector on Developerbox. SynQuacer platform can exposes
its SPI TPM via MMIO window that is backed by the SPI
command sequencer in the SPI bus controller.
This commit adds the MMIO TPM description to the DSDT.
If TPM2_ENABLE build
This patches add the ACPI description of MMIO TPM on SynQuacer.
This also fixes the non CRLF line endings of Acpi.dsc.inc.
Masahisa Kojima (2):
Silicon/SynQuacer: add ACPI descriptor of MMIO TPM
Silicon/SynQuacer: CRLF fixup for Acpi.dsc.inc
Silicon/Socionext/SynQuacer/Acpi.dsc.inc |
Add basic support for USB 3.1 SuperSpeedPlus.
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Signed-off-by: Vin Xue
---
Silicon/Synopsys/DesignWare/Drivers/UsbDeviceDxe/XdciCommon.h | 3 ++-
Silicon/Synopsys/DesignWare/Drivers/UsbDeviceDxe/XdciDWC.c| 3 ++-
2 files changed, 4 insertions(+), 2
Remove platform specific init code for device mode enable.
The code is different for different silicon vendor.
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Signed-off-by: Vin Xue
---
.../Drivers/UsbDeviceDxe/UsbDeviceDxe.c | 18 -
.../Drivers/UsbDeviceDxe/UsbDeviceDxe.h | 8 ++-
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841
Currently, we have TCG/TCG2 protocol and DxeTpmMeasurementLib to let DXE
module extend the TCG event.
There is more and more use case in PEI phase that a PEIM need extend TCG
event, such as BootGuard, FSP, Microcode measurement. Currently,
From: Jiewen Yao
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Chao Zhang
Cc: Qi Zhang
Cc: Rahul Kumar
Signed-off-by: Jiewen Yao
---
SecurityPkg/Tcg/TcgPei/TcgPei.c | 61 ---
SecurityPkg/Tcg/TcgPei/TcgPei.inf |
From: Jiewen Yao
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Chao Zhang
Cc: Qi Zhang
Signed-off-by: Jiewen Yao
---
.../PeiTpmMeasurementLib.c| 74 +++
.../PeiTpmMeasurementLib.inf | 50
From: Jiewen Yao
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Qi Zhang
Signed-off-by: Jiewen Yao
---
.../PeiTpmMeasurementLib.c| 74 +++
.../PeiTpmMeasurementLib.inf | 50 +
From: Jiewen Yao
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Chao Zhang
Cc: Qi Zhang
Signed-off-by: Jiewen Yao
---
SecurityPkg/SecurityPkg.dsc | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/SecurityPkg/SecurityPkg.dsc
From: Jiewen Yao
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Qi Zhang
Signed-off-by: Jiewen Yao
---
SecurityPkg/SecurityPkg.dsc | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/SecurityPkg/SecurityPkg.dsc
From: Jiewen Yao
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Qi Zhang
Signed-off-by: Jiewen Yao
---
SecurityPkg/Include/Ppi/Tcg.h | 60 +++
1 file changed, 60 insertions(+)
create mode 100644
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841
Currently, we have TCG/TCG2 protocol and DxeTpmMeasurementLib to let DXE
module extend the TCG event.
There is more and more use case in PEI phase that a PEIM need extend TCG
event, such as BootGuard, FSP, Microcode measurement. Currently,
From: Jiewen Yao
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Qi Zhang
Cc: Rahul Kumar
Signed-off-by: Jiewen Yao
---
SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c | 110 +---
SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf | 3 +-
2 files
From: Jiewen Yao
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Chao Zhang
Cc: Qi Zhang
Signed-off-by: Jiewen Yao
---
SecurityPkg/Include/Ppi/Tcg.h | 60 +++
1 file changed, 60 insertions(+)
create mode 100644
From: Jiewen Yao
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Qi Zhang
Signed-off-by: Jiewen Yao
---
SecurityPkg/SecurityPkg.dec | 3 +++
1 file changed, 3 insertions(+)
diff --git a/SecurityPkg/SecurityPkg.dec b/SecurityPkg/SecurityPkg.dec
From: Jiewen Yao
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Qi Zhang
Cc: Rahul Kumar
Signed-off-by: Jiewen Yao
---
SecurityPkg/Tcg/TcgPei/TcgPei.c | 61 ---
SecurityPkg/Tcg/TcgPei/TcgPei.inf | 3 +-
2 files
From: Jiewen Yao
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Chao Zhang
Cc: Qi Zhang
Cc: Rahul Kumar
Signed-off-by: Jiewen Yao
---
SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c | 110 +---
SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf |
From: Jiewen Yao
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Chao Zhang
Cc: Qi Zhang
Signed-off-by: Jiewen Yao
---
SecurityPkg/SecurityPkg.dec | 3 +++
1 file changed, 3 insertions(+)
diff --git a/SecurityPkg/SecurityPkg.dec
From: "Groups.io"
Date: 2020-07-16 21:34:45
To: lbf...@zd-tech.com.cn
Subject: [edk2-devel] Confirm your lbf...@zd-tech.com.cn email address
Hello,
Thank you for your interest in the https://edk2.groups.io/g/devel group at
Groups.io. If you did not request or do not want to join
Some USB Pen disk can't be identified during USB enumeration during UEFI
post. We have three USB Pen disks from different manufactors, all with Innostor
USB
controller chip (VID=0x1F75, PID=0x917, USB3.1), they all failed in the
second device-descritor requeset. When the first device descriptor
On Fri, Jul 17, 2020 at 07:41:40 +, Wang, Jian J wrote:
> > > SecurityPkg: Secure boot related modules
> > > F: SecurityPkg/Library/DxeImageVerificationLib/
> > > @@ -480,8 +480,7 @@ M: Zhichao Gao
> > > SignedCapsulePkg
> > > F: SignedCapsulePkg/
> > > W:
On 07/16/20 16:55, Abner Chang wrote:
> Remove the redundant build option for RISCV64 architecture.
> BZ:2848
>
> Signed-off-by: Abner Chang
>
> Cc: Jian J Wang
> Cc: Xiaoyu Lu
> Cc: Laszlo Ersek
> ---
> CryptoPkg/Library/OpensslLib/OpensslLib.inf | 2 +-
> 1 file changed, 1 insertion(+), 1
On 07/17/20 09:33, Ray Ni wrote:
> Add host based unit tests for the MtrrLib services.
> The BaseLib services AsmCpuid(), AsmReadMsr64(), and
> AsmWriteMsr64() are hooked and provide simple emulation
> of the CPUID leafs and MSRs required by the MtrrLib to
> run as a host based unit test.
>
>
Hi Chandana,
Please see my question below.
Thanks,
Chasel
> -Original Message-
> From: Kumar, Chandana C
> Sent: Wednesday, July 15, 2020 6:49 PM
> To: devel@edk2.groups.io
> Cc: Chaganty, Rangasai V ; Chiu, Chasel
> ; Desimone, Nathaniel L
>
> Subject: [edk2-platforms: PATCH V1]
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2611
Register definitions from chapter 7 of Compute Express Link
Specification Revision 1.1 are ported into the new Cxl11.h.
The CXL Flex Bus registers are based on the PCIe Extended Capability
DVSEC structure header, led to the inclusion of
These 2 patches introduces the Compute Express Link (CXL) Specificition
registers definitions to the MDE.
The Cxl11.h has the actual register definitions of the CXL Specification
Revision 1.1; and the Cxl.h is the main header file to include all versions of
the CXL register definitions.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2611
Introducing the Cxl.h as the main header file to support all versions
of Compute Express Link Specification register definitions.
Signed-off-by: Ashraf Javeed
Cc: Michael D Kinney
Cc: Liming Gao
--
V2: Indentation and double declaration
Reviewed-by: Guomin Jiang
I review the manual from
https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html,
It is explained in [-Werror=] option.
Thank for your explanation as well.
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Abner
> Chang
> Sent: Friday, July 17,
Thank you very much, Qi.
I forgot to mention that we should change the name EFI_TCG2_PRE_HASH to
EDKII_TCG_PRE_HASH.
The EFI_* prefix is only for standard defined protocol/PPI.
Since this is our EDKII extension, we should use EDKII_* prefix.
With that change, the series:
Reviewed-by: Jiewen
Hi Laszlo,
> -Original Message-
> From: Laszlo Ersek
> Sent: Thursday, July 16, 2020 8:35 PM
> To: Wang, Jian J ; devel@edk2.groups.io
> Cc: Yao, Jiewen ; Andrew Fish ; Leif
> Lindholm ; Kinney, Michael D
> Subject: Re: [PATCH] Maintainers.txt: Remove invalid email address and a few
>
Add host based unit tests for the MtrrLib services.
The BaseLib services AsmCpuid(), AsmReadMsr64(), and
AsmWriteMsr64() are hooked and provide simple emulation
of the CPUID leafs and MSRs required by the MtrrLib to
run as a host based unit test.
Test cases are developed for each of the API.
For
> -Original Message-
> From: Laszlo Ersek
> Sent: Monday, July 13, 2020 9:02 PM
> To: devel@edk2.groups.io; af...@apple.com; Wasim Khan
>
> Cc: Mike Kinney ; liming@intel.com; Leif
> Lindholm (Nuvia address)
> Subject: Re: [edk2-devel] [edk2-discuss] Need memory barriers in IoLib
Cc: Jordan Justen
Cc: Laszlo Ersek
Cc: Ard Biesheuvel
Signed-off-by: Gary Lin
Reviewed-by: Laszlo Ersek
---
Maintainers.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Maintainers.txt b/Maintainers.txt
index 32c9003a6209..075a8d0ea763 100644
--- a/Maintainers.txt
+++
This is the second part of LsiScsiPassThru(). LsiScsiProcessRequest() is
added to translate the SCSI Request Packet into the LSI 53C895A
commands. This function utilizes the so-called Script buffer to transmit
a series of commands to the chip and then polls the DMA Status (DSTAT)
register until
Implement LsiScsiGetNextTargetLun(), LsiScsiBuildDevicePath(),
LsiScsiGetTargetLun(), and LsiScsiGetNextTarget() to report Targets and
LUNs and build the device path.
This commit also introduces two PCD value: PcdLsiScsiMaxTargetLimit and
PcdLsiScsiMaxLunLimit as the limits for Targets and LUNs.
Open PciIo protocol and use it to initialize the device. The
initialization of LSI 53C895A is simple: just set the SRST bit in
Interrupt Status Zero register to reset the device.
v2:
- Use the BITx macros for the bit constants
- Add the closing of PciIo protocol in LsiScsiControllerStop()
This patch series implement the driver for LSI 53C895A SCSI controller
for OVMF so that the user can access the storage devices connected to
QEMU "lsi" controller. The driver is disabled by default since LSI
53C895A is considered as a legacy device. To enable the driver, please
add "-D
Implement the dummy functions for EFI Driver Binding protocol.
v2: Remove "STATIC" from LsiScsiControllerSupported()
Cc: Jordan Justen
Cc: Laszlo Ersek
Cc: Ard Biesheuvel
Signed-off-by: Gary Lin
Reviewed-by: Laszlo Ersek
---
OvmfPkg/LsiScsiDxe/LsiScsi.c | 72
This is the first part of LsiScsiPassThru(). Before processing the SCSI
Request packet, we have to make sure whether the packet is valid or not.
v2: Make LsiScsiPassThru() return EFI_UNSUPPORTED since this function is
half-implemented
Cc: Jordan Justen
Cc: Laszlo Ersek
Cc: Ard Biesheuvel
Implement LsiScsiGetDriverName() and LsiScsiGetDeviceName()
to report the name of the driver.
Cc: Jordan Justen
Cc: Laszlo Ersek
Cc: Ard Biesheuvel
Signed-off-by: Gary Lin
Reviewed-by: Laszlo Ersek
---
OvmfPkg/LsiScsiDxe/LsiScsi.c | 69 ++--
Implement LsiScsiControllerSupported() to probe the PCI ID and look for
LSI 53C895A.
Cc: Jordan Justen
Cc: Laszlo Ersek
Cc: Ard Biesheuvel
Signed-off-by: Gary Lin
Reviewed-by: Laszlo Ersek
---
OvmfPkg/Include/IndustryStandard/LsiScsi.h | 20 +
OvmfPkg/LsiScsiDxe/LsiScsi.c
Create the driver with only a dummy LsiScsiEntryPoint() for the further
implementation of the driver for LSI 53C895A SCSI controller.
v2: Fix the mixed-case GUID string
Cc: Jordan Justen
Cc: Laszlo Ersek
Cc: Ard Biesheuvel
Signed-off-by: Gary Lin
Reviewed-by: Laszlo Ersek
---
Map DMA buffer and perpare for the implementation of LsiScsiPassThru().
v2:
- Replace 0x1 with SIZE_64KB macro for the DMA buffer data array
- Remove DUAL_ADDRESS_CYCLE from PciIo since we don't really need
64-bit DMA address
Cc: Jordan Justen
Cc: Laszlo Ersek
Cc: Ard Biesheuvel
Partially implement LsiScsiControllerStart() and LsiScsiControllerStop()
to insert the scaffolding of EXT_SCSI_PASS_THRU functions.
v3: Squash the newline below the declaration of LSI_SCSI_FROM_PASS_THRU
v2: Remove the closing of PciIo protocol from LsiScsiControllerStop().
Cc: Jordan Justen
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