Hi Liming,
The edk2 commits that fixes the typo has been included using the hyper link.
The platforms side's modification doesn't have example to show here.
Do you think it is necessary to list all the typo these commits fixed, like
below?
FirwareVersion -> FirmwareVersion
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3190
Add more dependency to enforce the executability of CpuCacheInfoLib.
Signed-off-by: Jason Lou
Cc: Ray Ni
Cc: Eric Dong
Cc: Laszlo Ersek
Cc: Rahul Kumar
---
UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c | 7 +--
On 01/29/21 01:59, Ankur Arora wrote:
> Define CPU_HOT_EJECT_DATA and add PCD PcdCpuHotEjectDataAddress, which
> will be used to share CPU ejection state between OvmfPkg/CpuHotPlugSmm
> and PiSmmCpuDxeSmm.
>
> Cc: Laszlo Ersek
> Cc: Jordan Justen
> Cc: Ard Biesheuvel
> Cc: Igor Mammedov
> Cc:
Thanks for catching this. V3 sent.
Abner
> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> gaoliming
> Sent: Monday, February 1, 2021 10:12 AM
> To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
>
> Cc: 'Dandan Bi' ; 'Eric Dong'
Add HiiGetStringEx and leveraged by HiiGetString function to support
getting string with the best language in optionally. This avoids the
string in x-uefi language is misled to the language defined by
"PlatformLang" or the "Supported Languages". This change is introduced
to support x-uefi keyword
Yes, CI is enabled on RedfishPkg.
> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> gaoliming
> Sent: Monday, February 1, 2021 9:54 AM
> To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
>
> Cc: 'Leif Lindholm' ; Wang, Nickle
It loads a JSON payload in the format of NULL terminated string to a JSON
object.
This function is used by either edk2 Redfish client applications or other edk2
modules which manipulate JSON properties.
Regards,
Abner
> -Original Message-
> From: gaoliming
On 01/29/21 01:59, Ankur Arora wrote:
> Introduce UnplugCpus() which maps each APIC ID being unplugged
> onto the hardware ID of the processor and informs PiSmmCpuDxeSmm
> of removal by calling EFI_SMM_CPU_SERVICE_PROTOCOL.RemoveProcessor().
>
> With this change we handle the first phase of unplug
On 01/29/21 01:59, Ankur Arora wrote:
> Refactor CpuHotplugMmi() to pull out the CPU hotplug logic into
> ProcessHotAddedCpus(). This is in preparation for supporting CPU
> hot-unplug.
>
> Cc: Laszlo Ersek
> Cc: Jordan Justen
> Cc: Ard Biesheuvel
> Cc: Igor Mammedov
> Cc: Boris Ostrovsky
>
Abner:
I have two comments for this patch.
1. Please specify new ASSERT in the function header.
2. Please update the function description for the new behavior when
TryBestLanguage is FALSE. HiiGetStringEx() function description should be
different from HiiGetString().
Thanks
Liming
>
Reviewed-by: Liming Gao
> -邮件原件-
> 发件人: bounce+27952+70884+4905953+8761...@groups.io
> 代表 Abner Chang
> 发送时间: 2021年1月29日 12:20
> 收件人: devel@edk2.groups.io
> 抄送: Leif Lindholm ; Nickle Wang
> ; Michael D Kinney
> 主题: [edk2-devel] [PATCH] RedfishPkg/JsonLib: Ignore the build error of
>
Abner:
What's the usage for this new API?
Thanks
Liming
> -邮件原件-
> 发件人: bounce+27952+70886+4905953+8761...@groups.io
> 代表 Abner Chang
> 发送时间: 2021年1月29日 12:20
> 收件人: devel@edk2.groups.io
> 抄送: Leif Lindholm ; Nickle Wang
> ; Michael D Kinney
> 主题: [edk2-devel] [PATCH]
Reviewed-by: Liming Gao
Besides, does CI enable in RedfishPkg?
Thanks
Liming
> -邮件原件-
> 发件人: bounce+27952+70885+4905953+8761...@groups.io
> 代表 Abner Chang
> 发送时间: 2021年1月29日 12:20
> 收件人: devel@edk2.groups.io
> 抄送: Leif Lindholm ; Nickle Wang
> ; Michael D Kinney
> 主题: [edk2-devel]
If the output file path is a relative path, the split
tool will create the output file under the input file path.
But the expected behavior for this case is the output file
should be relative to the current directory. This patch will
fix this bug.
Signed-off-by: Bob Feng
Cc: Liming Gao
Cc:
Reviewed-by: Zhichao Gao
Thanks,
Zhichao
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Vijayenthiran
> Subramaniam
> Sent: Thursday, January 28, 2021 10:04 PM
> To: devel@edk2.groups.io; Sami Mujawar
> Cc: Ni, Ray ; Gao, Zhichao ;
> matteo.carl...@arm.com;
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Maintainers.txt | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Maintainers.txt b/Maintainers.txt
index 56e16fc48c..34f0b58581 100644
--- a/Maintainers.txt
+++
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/SiPkgBuildOption.dsc| 122
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following DSC files:
* Fru/TglCpu
* Fru/TglPch
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CommonLib.dsc | 11 +++
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* SystemAgent/SaInit/Dxe
* SystemAgent/SaInit/Smm
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaAcpi.c |
431
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* Fru/TglCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib
* Fru/TglCpu/Vtd/LibraryPrivate/DxeVtdInitLib
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* SystemAgent/AcpiTables
* SystemAgent/Library/DxeSaPolicyLib
* SystemAgent/Library/PeiDxeSmmSaPlatformLib
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* Pch/LibraryPrivate/BaseSiScheduleResetLib
* Pch/LibraryPrivate/SmmPchPrivateLib
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* Pch/Library/BasePchPciBdfLib
* Pch/Library/BaseResetSystemLib
* Pch/Library/DxePchPolicyLib
* Pch/Library/PeiDxeSmmPchCycleDecodingLib
* Pch/Library/PeiDxeSmmPchInfoLib
Cc: Sai Chaganty
Cc: Nate
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* Library/BasePciSegmentMultiSegLibPci
* Library/BaseSiConfigBlockLib
* Library/PeiDxeSmmMmPciLib
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/Vtd/IncludePrivate
* IpBlock/Vtd/Library
* IpBlock/Vtd/LibraryPrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/Spi/IncludePrivate
* IpBlock/Spi/Library
* IpBlock/Spi/LibraryPrivate
* IpBlock/Spi/Smm
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/Smbus/IncludePrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Smbus/IncludePrivate/Register/SmbusRegs.h
| 50
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/SerialIo/IncludePrivate
* IpBlock/SerialIo/Library
* IpBlock/SerialIo/LibraryPrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/PcieRp/IncludePrivate
* IpBlock/PcieRp/Library
* IpBlock/PcieRp/LibraryPrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/Sata/Library
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Sata/Library/PeiDxeSmmSataLib/PeiDxeSmmSataLibVer2.inf
| 32
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/Psf/IncludePrivate
* IpBlock/Psf/LibraryPrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Psf/IncludePrivate/Library/PsfLib.h
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/Pmc/IncludePrivate
* IpBlock/Pmc/Library
* IpBlock/Pmc/LibraryPrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/PchDmi/IncludePrivate
* IpBlock/PchDmi/LibraryPrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/HostBridge/IncludePrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/HostBridge/IncludePrivate/HostBridgeDataHob.h
| 25
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/P2sb/IncludePrivate
* IpBlock/P2sb/Library
* IpBlock/P2sb/LibraryPrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/Hda/IncludePrivate
* IpBlock/Hda/Library
* IpBlock/Hda/LibraryPrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/Gbe/IncludePrivate
* IpBlock/Gbe/Library
* IpBlock/Gbe/LibraryPrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/Espi/Library
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Espi/Library/PeiDxeSmmEspiLib/EspiLib.c
| 469
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/CpuPcieRp/Include
* IpBlock/CpuPcieRp/IncludePrivate
* IpBlock/CpuPcieRp/Library
* IpBlock/CpuPcieRp/LibraryPrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following files:
* IpBlock/Cnvi/IncludePrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Cnvi/IncludePrivate/CnviConfigHob.h
| 27 +++
1
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following header files:
* Fru/TglPch/IncludePrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/IncludePrivate/Register/PchPcrRegs.h
| 66
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following header files:
* Fru/TglPch/Include
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/Fru/TglPch/Include/PchBdfAssignment.h |
326
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following header files:
* Fru/TglCpu/IncludePrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/IncludePrivate/Library/VtdInitFruLib.h
| 18 ++
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following header files:
* Fru/TglCpu/Include
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/Include/Library/CpuPcieInfoFruLib.h
| 57
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following header files:
* SystemAgent/IncludePrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/SystemAgent/IncludePrivate/Protocol/SaIotrapSmi.h
| 42
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following header files:
* Pch/IncludePrivate
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/Pch/IncludePrivate/Library/SiScheduleResetLib.h
| 47
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following header files:
* Pch/Include
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/Pch/Include/ConfigBlock/FlashProtectionConfig.h
| 55
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds header files common to CPU modules.
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfig.h
| 83
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following header files:
* SystemAgent/Include
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/SystemAgent/Include/ConfigBlock/MemoryDxeConfig.h
| 123
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171
Adds the following header files:
* Include/Pins
* Include/Register
* Include/*.h
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Silicon/Intel/TigerlakeSiliconPkg/Include/ConfigBlock.h| 53
Kun:
I will merge this patch serial. Can you update the latest version patches
with reviewed-by tag into your fork https://github.com/kuqin12? I will refer
to it and create pull request.
Thanks
Liming
发件人: Kun Qin
发送时间: 2021年1月29日 15:56
收件人: devel@edk2.groups.io
抄送: Bob Feng ; Yuwei
Create PR https://github.com/tianocore/edk2/pull/1394 to merge this patch.
Liming
> -邮件原件-
> 发件人: bounce+27952+70708+4905953+8761...@groups.io
> 代表 gaoliming
> 发送时间: 2021年1月25日 9:18
> 收件人: devel@edk2.groups.io; mikub...@linux.microsoft.com
> 抄送: 'Eric Dong' ; 'Hao A Wu' ;
> 'Jian J
Hi Mars,
I cannot extract the patch. I don’t what cause this issue. Can you share your
branch?
Back to the patch. Please remove the ‘*’ in the titile.
Don’t define the Index2 in a block scope, it should be defined at the begin of
the function. Refer to CCS spec 2.2.1 Section 5.4.1.1:
Block
SmbiosMiscDxe provides SMBIOS tables 0, 1, 2, 3, 13, and 32.
Signed-off-by: Rebecca Cran
Reviewed-by: Leif Lindholm
Reviewed-by: Samer El-Haj-Mahmoud
---
ArmPkg/ArmPkg.dsc | 1 +
ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf|
This code provides information for the SMBIOS Type 32 table.
Signed-off-by: Rebecca Cran
Reviewed-by: Leif Lindholm
Reviewed-by: Samer El-Haj-Mahmoud
---
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationData.c |
32 +
Platforms are expected to override these PCDs to provide relevant
information to SMBIOS.
Signed-off-by: Rebecca Cran
Reviewed-by: Leif Lindholm
---
ArmPkg/ArmPkg.dec | 17 +
1 file changed, 17 insertions(+)
diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index
This code provides information for the SMBIOS Type 13 table.
Signed-off-by: Rebecca Cran
Reviewed-by: Leif Lindholm
---
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesData.c
| 33
This code provides information for the SMBIOS Type 3 table.
Signed-off-by: Rebecca Cran
Reviewed-by: Leif Lindholm
Reviewed-by: Samer El-Haj-Mahmoud
---
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerData.c
| 52 +
This code provides information for the SMBIOS Type 2 table.
Signed-off-by: Rebecca Cran
Reviewed-by: Leif Lindholm
Reviewed-by: Samer El-Haj-Mahmoud
---
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturerData.c
| 46
This code provides information for the SMBIOS Type 1 table.
Signed-off-by: Rebecca Cran
Reviewed-by: Leif Lindholm
Reviewed-by: Samer El-Haj-Mahmoud
---
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerData.c
| 36
This code provides information for the SMBIOS Type 0 table.
Signed-off-by: Rebecca Cran
Reviewed-by: Samer El-Haj-Mahmoud
Reviewed-by: Leif Lindholm
---
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorData.c | 93
++
ProcessorSubClassDxe provides SMBIOS CPU information using generic
methods combined with calls into OemMiscLib.
Signed-off-by: Rebecca Cran
Reviewed-by: Samer El-Haj-Mahmoud
---
ArmPkg/ArmPkg.dsc |
2 +
Add a Null implementation of OemMiscLib.
OemMiscLib provides functions that platforms implement to fill in
SMBIOS information for the SmbiosMiscDxe and ProcessSubClassDxe drivers.
Signed-off-by: Rebecca Cran
Acked-by: Leif Lindholm
---
ArmPkg/ArmPkg.dsc
OemMiscLib.h provides the interface which platforms should implement to
interact with the SmbiosMiscDxe and ProcessorSubClassDxe drivers to
update SMBIOS tables.
Signed-off-by: Rebecca Cran
Acked-by: Leif Lindholm
---
ArmPkg/Include/Library/OemMiscLib.h | 166
1 file
Add helper function to read the CCSIDR2 register.
This is used when CCIDX is supported in AARCH32 mode.
Signed-off-by: Rebecca Cran
Reviewed-by: Leif Lindholm
---
ArmPkg/Library/ArmLib/ArmLibPrivate.h | 11 +++
ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S | 10 ++
Add a helper function to determine CCIDX support.
Signed-off-by: Rebecca Cran
Reviewed-by: Sami Mujawar
Reviewed-by: Leif Lindholm
---
ArmPkg/Include/Library/ArmLib.h| 11 +++
ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 19 ++-
The ARM Architecture Reference Manual for ARMv8-A defines up to
seven levels of cache, L1 through L7.
Define MAX_ARM_CACHE_LEVEL to be 7.
Signed-off-by: Rebecca Cran
Reviewed-by: Leif Lindholm
Reviewed-by: Sami Mujawar
---
ArmPkg/Include/Library/ArmLib.h | 4
1 file changed, 4
When CCIDX is supported, the Current Cache Size ID Register contains
data above 32 bits: namely the number of sets. Avoid truncating this
by returning a UINTN instead of UINT32. On AARCH32, the expanded
number of sets data can be read via the CCSIDR2 register.
Also, add Doxygen comments for the
Update the cache definitions in ArmLibPrivate.h based on current
ARMv8 documentation.
Signed-off-by: Rebecca Cran
Reviewed-by: Leif Lindholm
Reviewed-by: Sami Mujawar
---
ArmPkg/Library/ArmLib/ArmLibPrivate.h | 97
1 file changed, 97 insertions(+)
diff --git
In AARCH32, CCIDX support is indicated in the MMFR4 register - unlike
under AARCH64 where it's in MMFR2. Add a helper function to read it.
Signed-off-by: Rebecca Cran
Reviewed-by: Sami Mujawar
Reviewed-by: Leif Lindholm
---
ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h | 8 ++--
Add helper function to read the MMFR2 register. We will need this to
determine CCIDX support.
Signed-off-by: Rebecca Cran
Reviewed-by: Leif Lindholm
Reviewed-by: Sami Mujawar
---
ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h | 11 +++
ArmPkg/Library/ArmLib/AArch64/AArch64Support.S |
The ARM SMC Architecture functions were missing from ArmStdSmc.h.
Add them, based on the SMC Calling Convention version 1.2 specification.
Signed-off-by: Rebecca Cran
Reviewed-by: Leif Lindholm
Reviewed-by: Sami Mujawar
---
ArmPkg/Include/IndustryStandard/ArmStdSmc.h | 16
1
Add register encoding definition for Memory Model Feature Register 2.
We need to define it here because we build for ARMv8.0, which doesn't
have it.
Signed-off-by: Rebecca Cran
Reviewed-by: Leif Lindholm
Reviewed-by: Sami Mujawar
---
ArmPkg/Include/Chipset/AArch64.h | 4
1 file changed,
Add a bitfield that describes the structure of the byte in the Status
field of the SMBIOS Type 4 Processor Information table.
Signed-off-by: Rebecca Cran
Reviewed-by: Leif Lindholm
Acked-by: Sami Mujawar
---
MdePkg/Include/IndustryStandard/SmBios.h | 13 +
1 file changed, 13
Much of the data for the SMBIOS tables is generic, and need not be
duplicated for each platform. This patch series introduces
ArmPkg/Universal/Smbios, which is largely copied from
edk2-platforms/Silicon/HiSilicon/Drivers/Smbios and generates SMBIOS
tables 0,1,2,3,4,7,13,32 and uses a combination
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