Thanks a lot Rebecca~~
Thanks,
Christine
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Michael
> D Kinney
> Sent: Saturday, February 17, 2024 1:24 AM
> To: Rebecca Cran ; Joey Vagedes
> ; Rebecca Cran
> ; devel@edk2.groups.io; Sean
> ; Michael Kubacki
>
> Cc: Kinney, Mi
Jiaxin:
Thanks for your confirmation. Edk2 202402 stable tag will not include
them.
Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io 代表 Wu, Jiaxin
> 发送时间: 2024年2月23日 13:36
> 收件人: gaoliming ; Kinney, Michael D
> ; Zhang, Di ; Li, Fei
>
> 抄送: devel@edk2.groups.io
> 主题: Re: [edk2-devel
Talked with Di & Liming,
Those 2 patches don't need to catch this stable tag 202402. Please ignore the
request here.
Thanks,
Jiaxin
> -Original Message-
> From: Wu, Jiaxin
> Sent: Friday, February 23, 2024 8:47 AM
> To: gaoliming ; Kinney, Michael D
>
> Cc: devel@edk2.groups.io
> Sub
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4689
Bug 4689 - GetInfo() of Adapter Information Protocol
should have a provision for IHV to return no data for
UEFI Spec compliance 2.9 [mantis #1866]
Cc: Marcin Wojtas
Cc: Leif Lindholm
Signed-off-by: Gahan Saraiya
---
Silicon/Marvell/Driv
> + @param[in] MpHandOff Previous HOB body. Pass NULL to get the
> first HOB.
Can you replace "...HOB Body. Pass NULL..." with "...HOB Body. Pass NULL..."?
Your current comments contain two spaces.
With that, Reviewed-by: Ray Ni
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all mes
> + ASSERT (FALSE);
How about ASSERT (EFI_NOT_FOUND)? Which is more meaningful than FALSE.
No matter you change or not, Reviewed-by: Ray Ni
> + return 0;
> }
>
> /**
> --
> 2.43.2
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Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#1
Thanks,
Ray
> -Original Message-
> From: Gerd Hoffmann
> Sent: Friday, February 23, 2024 12:01 AM
> To: devel@edk2.groups.io
> Cc: Laszlo Ersek ; Ni, Ray ; Kumar,
> Rahul R ; Oliver Steffen ;
> Gerd Hoffmann
> Subject: [PATCH v3 5/6] UefiCpuPkg/MpInitLib: Add support for multiple
> HOB
Hi Mike,
Could you help approval below 2 patches into the stable tag 202402? The patches
have been merged.
UefiCpuPkg/PiSmmCpuDxeSmm: Avoid BspIndex typecasting
UefiCpuPkg/PiSmmCpuDxeSmm: Check BspIndex first before lock cmpxchg
Thanks,
Jiaxin
> -Original Message-
> From: gaoliming
I prefer HOB instead of dynamic PCD.
And let's keep the new singleton HOB structure as an internal interface between
PEI MpInitLib and DXE MpInitLib.
Thanks,
Ray
> -Original Message-
> From: Gerd Hoffmann
> Sent: Thursday, February 22, 2024 8:29 PM
> To: Laszlo Ersek
> Cc: devel@edk2.gr
> +//
> +// Get APIC IDs
> +//
> +#define EFI_APIC_IDS_GUID \
> + { 0xbc964338, 0xee39, 0x4fc8, { 0xa2, 0x24, 0x10, 0x10, 0x8b, 0x17, 0x80,
> 0x1b }}
> +extern EFI_GUID gEfiApicIdsGuid;
Since the above GUID is associated with the structure below, how about
rename the GUID from "gEfiApicIdsGui
On Thu, Feb 22, 2024 at 5:13 PM Paolo Bonzini wrote:
> Also, to clarify the hardware behavior, if hCR4.LA57=0 and host
> PhysAddrSize==52, then will guest physical addresses above 2^48
>
> 1) cause a reserved #PF in the guest, or
>
> 2) cause a non-present NPF exit in the hypervisor?
>
> I remembe
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
Currently, an SEV-SNP guest will terminate if it is not running at VMPL0.
The requirement for running at VMPL0 is removed if an SVSM is present.
Update the current VMPL0 check to additionally check for the presence of
an SVSM is the guest is
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
The SVSM specification documents an alternative method of discovery for
the SVSM using a reserved CPUID bit and a reserved MSR.
For the CPUID support, the #VC handler of an SEV-SNP guest should modify
the returned value in the EAX register f
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
When running under an SVSM, the VMPL level of the APs that are started
must match the VMPL level provided by the SVSM. Additionally, each AP
must have a Calling Area for use with the SVSM protocol. Update the AP
creation to properly support r
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
The RMPADJUST instruction is used to alter the VMSA attribute of a page,
but the VMSA attribute can only be changed when running at VMPL0. When
an SVSM is present, use the SVSM_CORE_CREATE_VCPU and SVSM_CORE_DELTE_VCPU
calls to add or remove
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
Similar to the Page State Change optimization added previously, also take
into account the possiblity of using the SVSM for PVALIDATE instructions.
Conditionally adjust the maximum number of entries based on how many
entries the SVSM calling
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
The PVALIDATE instruction can only be performed at VMPL0. An SVSM will
be present when running at VMPL1 or higher.
When an SVSM is present, use the SVSM_CORE_PVALIDATE call to perform
memory validation instead of issuing the PVALIDATE instru
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
An SVSM requires a calling area page whose address (CAA) is used by the
SVSM to communicate and process the SVSM request.
Add a pre-defined page area to the OvmfPkg and AmdSev packages and define
corresponding PCDs used to communicate the lo
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
The PVALIDATE instruction is used to change the SNP validation of a page,
but that can only be done when running at VMPL0. To prepare for running at
a less priviledged VMPL, use the CcSvsmLib library API to perform the
PVALIDATE. The CcSvsmLi
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
The RMPADJUST instruction is used to change the VMSA attribute of a page,
but the VMSA attribute can only be changed when running at VMPL0. To
prepare for running at a less priviledged VMPL, use the CcSvsmLib library
API to perform the RMPADJ
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
Add initial support for the new CcSvsmLib library to OvmfPkg. The initial
implementation will fully implement the SVSM presence check API and the
SVSM VMPL API, with later patches fully implementing the other interfaces.
The SVSM presence ch
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
The MpInitLib library will be updated to use the new CcSvsmLib library.
To prevent any build breakage, update the UefiPayloadPkg DSC file to
include the CcSvsmLib NULL library.
Signed-off-by: Tom Lendacky
---
UefiPayloadPkg/UefiPayloadPkg.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
In order to support an SEV-SNP guest running under an SVSM at VMPL1 or
lower, a new CcSvsmLib library must be created.
This library includes an interface to detect if running under an SVSM, an
interface to return the current VMPL, an interfa
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
The SVSM specification relies on a specific register calling convention to
hold the parameters that are associated with the SVSM request. The SVSM is
invoked by requesting the hypervisor to run the VMPL0 VMSA of the guest
using the GHCB MSR P
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
The Secure VM Service Module specification defines the interfaces needed
to allow multi-VMPL level execution of an SEV-SNP guest.
Define the SVSM related structures for the SVSM Calling Area as well as
the SVSM CAA MSR. The SVSM CAA MSR is a
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
When building the Page State Change entries for a range of memory, it can
happen that multiple calls to BuildPageStateBuffer() need to be made. If
the size of the input work area passed to BuildPageStateBuffer() exceeds
the number of entries
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
In preparation for running under an SVSM at VMPL1 or higher (higher
numerically, lower privilege), re-organize the way a page state change
is performed in order to free up the GHCB for use by the SVSM support.
Currently, the page state chang
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
The SNP_PAGE_STATE_MAX_ENTRY is based on the number of entries that can
fit in the GHCB shared buffer. As a result, the SNP_PAGE_STATE_CHANGE_INFO
structure maps the full GHCB shared buffer based on the shared buffer size
being 2032 bytes.
I
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
Calculate the amount of memory that can be use to build the Page State
Change data (SNP_PAGE_STATE_CHANGE_INFO) instead of using a hard-coded
size. This allows for changes to the GHCB shared buffer size without
having to make changes to the p
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
In prep for follow-on patches, fix an area of the code that does not meet
the uncrustify coding standards.
Signed-off-by: Tom Lendacky
---
OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c | 27
+++-
1
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
Currently, the first time an AP is started for an SEV-SNP guest, it relies
on the VMSA as set by the hypervisor. If the list of APIC IDs has been
retrieved, this is not necessary. Instead, use the SEV-SNP AP Create
protocol to start the AP fo
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
If the hypervisor supports retrieval of the vCPU APIC IDs, retrieve
them before any APs are actually started. The APIC IDs can be used
to start the APs for any SEV-SNP guest, but is a requirement for an
SEV-SNP guest that is running under an
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
When an SVSM is present, starting the APs requires knowledge of the APIC
IDs. Create the definitions required to retrieve and hold the APIC ID
information of all the vCPUs present in the guest.
Acked-by: Gerd Hoffmann
Signed-off-by: Tom Len
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
The AsmRmpAdjust() function returns a UINT32, however in SevSnpIsVmpl0()
the return value is checked with EFI_ERROR() when it should just be
compared to 0. Fix the error check.
Signed-off-by: Tom Lendacky
---
OvmfPkg/Library/BaseMemEncrypt
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
This series adds SEV-SNP support for running OVMF under an Secure VM
Service Module (SVSM) at a less privileged VM Privilege Level (VMPL).
By running at a less priviledged VMPL, the SVSM can be used to provide
services, e.g. a virtual TPM,
[AMD Official Use Only - General]
Please kindly ignore this mail thread as I have created and sent out [PATCH V2]
with correct title in another mail thread for review.
Thank you.
Regards,
Neo
From: Hsueh, Hong-Chih (Neo)
Sent: Tuesday, February 20, 2024 1:48 PM
A USB4 or TBT bridge can be plugged or unplugged on USB4 port. The actions
require PciHotPlugRequestNotify to add a root bridge or remove a root bridge
completely.
In the plug-unplug-plug scenerio, PciHotPlugRequestNotify will return with
no-action on second plug because bridge tree shows config
On 2/22/24 16:44, Tom Lendacky wrote:
On 2/22/24 05:24, Gerd Hoffmann wrote:
Hi,
+ if (Cr4.Bits.LA57) {
+ if (PhysBits > 48) {
+ /*
+ * Some Intel CPUs support 5-level paging, have more than 48
+ * phys-bits but support only 4-level EPT, which effectively
+
After finding the BSP Number return the result instead of
continuing to loop over the remaining processors.
Suggested-by: Laszlo Ersek
Signed-off-by: Gerd Hoffmann
---
UefiCpuPkg/Library/MpInitLib/MpLib.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/UefiCpuPkg
Add support for splitting Hand-Off data into multiple HOBs.
This is required for VMs with thousands of CPUs.
Signed-off-by: Gerd Hoffmann
---
UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 44 +++--
1 file changed, 27 insertions(+), 17 deletions(-)
diff --git a/UefiCpuPkg/Library
Rename the function to GetNextMpHandOffHob(), add MP_HAND_OFF parameter.
When called with NULL pointer return the body of the first HOB, otherwise
return the next in the chain.
Also add the function prototype to the MpLib.h header file.
Signed-off-by: Gerd Hoffmann
---
UefiCpuPkg/Library/MpInit
Loop over all MP_HAND_OFF HOBs instead of expecting a single HOB
covering all CPUs in the system.
Add a new FirstMpHandOff variable, which caches the first HOB body for
faster lookups. It is also used to check whenever MP_HAND_OFF HOBs are
present. Using the MpHandOff pointer for that does not w
Rename the MpHandOff parameter to FirstMpHandOff. Add loops so the
function inspects all HOBs present in the system.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Ray Ni
Reviewed-by: Laszlo Ersek
---
UefiCpuPkg/Library/MpInitLib/MpLib.h | 2 +-
UefiCpuPkg/Library/MpInitLib/MpLib.c | 35 +
Needed to boot guests with thousands of vcpus.
v3:
- refine comments and commit messages.
- fix MaxCpusPerHob calculation.
- pick up review tags.
- add patch to speed up GetBspNumber a bit.
v2:
- rework HOB loops for better performance: O(n) instead of O(n^2).
Gerd Hoffmann (6):
UefiCpuPkg
Rename the MpHandOff parameter to FirstMpHandOff. Add a loop so the
function inspects all HOBs present in the system.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Ray Ni
Reviewed-by: Laszlo Ersek
---
UefiCpuPkg/Library/MpInitLib/MpLib.c | 23 +++
1 file changed, 15 insertions
On 2/22/24 05:24, Gerd Hoffmann wrote:
Hi,
+if (Cr4.Bits.LA57) {
+ if (PhysBits > 48) {
+/*
+ * Some Intel CPUs support 5-level paging, have more than 48
+ * phys-bits but support only 4-level EPT, which effectively
+ * limits guest phys-bits to 48.
+
Reviewed-by: Igor Kulchytskyy
-Original Message-
From: Nickle Wang
Sent: Thursday, February 22, 2024 4:12 AM
To: devel@edk2.groups.io
Cc: Abner Chang ; Igor Kulchytskyy ; Nick
Ramirez
Subject: [EXTERNAL] [PATCH v2 6/6] RedfishPkg/RedfishCrtLib: fix unresolved
external symbol issue
*
Reviewed-by: Igor Kulchytskyy
-Original Message-
From: Nickle Wang
Sent: Thursday, February 22, 2024 4:12 AM
To: devel@edk2.groups.io
Cc: Abner Chang ; Igor Kulchytskyy ; Nick
Ramirez
Subject: [EXTERNAL] [PATCH v2 5/6] RedfishPkg/RedfishDebugLib: use
RedfishHttpLib
**CAUTION: The e-
Reviewed-by: Igor Kulchytskyy
-Original Message-
From: Nickle Wang
Sent: Thursday, February 22, 2024 4:12 AM
To: devel@edk2.groups.io
Cc: Abner Chang ; Igor Kulchytskyy ; Nick
Ramirez
Subject: [EXTERNAL] [PATCH v2 4/6] RedfishPkg/RedfishLib: include
RedfishServiceData.h
**CAUTION: T
Reviewed-by: Igor Kulchytskyy
-Original Message-
From: Nickle Wang
Sent: Thursday, February 22, 2024 4:11 AM
To: devel@edk2.groups.io
Cc: Igor Kulchytskyy ; Abner Chang ; Nick
Ramirez
Subject: [EXTERNAL] [PATCH v2 2/6] RedfishPkg: implement Redfish HTTP protocol
**CAUTION: The e-mail
Reviewed-by: Igor Kulchytskyy
-Original Message-
From: Nickle Wang
Sent: Thursday, February 22, 2024 4:12 AM
To: devel@edk2.groups.io
Cc: Abner Chang ; Igor Kulchytskyy ; Nick
Ramirez
Subject: [EXTERNAL] [PATCH v2 3/6] RedfishPkg: introduce RedfishHttpLib
**CAUTION: The e-mail below
Reviewed-by: Igor Kulchytskyy
-Original Message-
From: Nickle Wang
Sent: Thursday, February 22, 2024 4:11 AM
To: devel@edk2.groups.io
Cc: Igor Kulchytskyy ; Abner Chang ; Nick
Ramirez
Subject: [EXTERNAL] [PATCH v2 1/6] RedfishPkg: introduce Redfish HTTP protocol
**CAUTION: The e-mail
Reviewed-by: Igor Kulchytskyy
-Original Message-
From: Nickle Wang
Sent: Thursday, February 22, 2024 4:11 AM
To: devel@edk2.groups.io
Cc: Abner Chang ; Igor Kulchytskyy ; Nick
Ramirez
Subject: [EXTERNAL] [PATCH v2 0/6] Introduce Redfish http protocol
**CAUTION: The e-mail below is fr
Thank you. Based on what you told me (memory corruption and and the
unlikelihood of the stack pointer being NULL) my only suspicion would be the
microcode I am using, since the only platform dependent parts up until this
part would be the microcode and the FSP-T and since I am using the FSP for
[AMD Official Use Only - General]
Thanks!
Reviewed-by: Abner Chang
> -Original Message-
> From: Nickle Wang
> Sent: Thursday, February 22, 2024 5:11 PM
> To: devel@edk2.groups.io
> Cc: Igor Kulchytskyy ; Chang, Abner
> ; Nick Ramirez
> Subject: [PATCH v2 2/6] RedfishPkg: implement Red
[AMD Official Use Only - General]
Thanks!
Reviewed-by: Abner Chang
> -Original Message-
> From: Nickle Wang
> Sent: Thursday, February 22, 2024 5:16 PM
> To: Chang, Abner ; devel@edk2.groups.io
> Cc: Igor Kulchytskyy ; Nick Ramirez
> Subject: RE: [PATCH 6/6] RedfishPkg/RedfishCrtLib:
Hi,
> The code looks otherwise OK, but I'm not happy that
> WaitLoopExecutionMode (and StartupSignalValue) are replicated over all
> the HOBs, just like in v1. IMO, that will only make it harder for others
> to understand the code / data structures, and therefore it increases
> technical debt.
Removes the GetSevCBitMaskAbove31 OneTimeCall because we need that twice
(for 4-level and 5-level paging). Open code the single instruction left
in that function instead.
Signed-off-by: Gerd Hoffmann
---
OvmfPkg/ResetVector/Ia32/AmdSev.asm | 8
OvmfPkg/ResetVector/Ia32/PageTable
When running in SEV mode keep the VC handler installed.
Add a function to uninstall it later.
This allows using the cpuid instruction in SetCr3ForPageTables64,
which is needed to check for la57 & 1G page support.
Signed-off-by: Gerd Hoffmann
---
OvmfPkg/ResetVector/Ia32/AmdSev.asm | 12 ++
Signed-off-by: Gerd Hoffmann
---
OvmfPkg/ResetVector/Ia32/PageTables64.asm | 8
1 file changed, 8 insertions(+)
diff --git a/OvmfPkg/ResetVector/Ia32/PageTables64.asm
b/OvmfPkg/ResetVector/Ia32/PageTables64.asm
index 825589f31193..d736db028277 100644
--- a/OvmfPkg/ResetVector/Ia32/Page
BSP workflow is quite simliar to the non-coco case.
TDX_WORK_AREA_PGTBL_READY is used to record the paging mode:
1 == 4-level paging
2 == 5-level paging
APs will look at TDX_WORK_AREA_PGTBL_READY to figure whenever
they should enable 5-level paging or not.
Signed-off-by: Gerd Hoffmann
---
Create a separate control flow for TDX BSP.
TdxPostBuildPageTables will now only be called when running in TDX
mode, so the TDX check in that function is not needed any more.
No functional change.
Signed-off-by: Gerd Hoffmann
---
OvmfPkg/ResetVector/Ia32/IntelTdx.asm | 4
OvmfPkg/Res
Use separate control flows for SEV and non-CoCo cases.
SevClearPageEncMaskForGhcbPage and GetSevCBitMaskAbove31 will now only
be called when running in SEV mode, so the SEV check in these functions
is not needed any more.
No functional change.
Signed-off-by: Gerd Hoffmann
---
OvmfPkg/ResetVect
Add macros to check for 5-level paging and gigabyte page support.
Enable 5-level paging for the non-confidential-computing case.
Signed-off-by: Gerd Hoffmann
---
OvmfPkg/ResetVector/ResetVector.inf | 1 +
OvmfPkg/ResetVector/Ia32/PageTables64.asm | 105 ++
OvmfPkg/Res
Move code to clear the page tables to a nasm macro.
No functional change.
Signed-off-by: Gerd Hoffmann
---
OvmfPkg/ResetVector/Ia32/PageTables64.asm | 35 ---
1 file changed, 19 insertions(+), 16 deletions(-)
diff --git a/OvmfPkg/ResetVector/Ia32/PageTables64.asm
b/OvmfPkg/
Move code to create 4-level page tables to a nasm macro.
No functional change.
Signed-off-by: Gerd Hoffmann
---
OvmfPkg/ResetVector/Ia32/PageTables64.asm | 70 +--
1 file changed, 39 insertions(+), 31 deletions(-)
diff --git a/OvmfPkg/ResetVector/Ia32/PageTables64.asm
b/Ovm
Add comments, rename some of the PAGE_* flags and combined attributes.
Specifically use "LARGEPAGE" instead of "2M" because that bit is used
for both 2M and 1G large pages.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Laszlo Ersek
---
OvmfPkg/ResetVector/Ia32/PageTables64.asm | 39 +---
So I ran with the suggestion by Laszlo to move the page table setup into
macros and untangle the non-CoCo / TDX / SEV code paths. The first five
patches of the series are doing that (without functional changes).
Support for 5-level paging is added by the following five patches. This
way it is in
Hi,
> +if (Cr4.Bits.LA57) {
> + if (PhysBits > 48) {
> +/*
> + * Some Intel CPUs support 5-level paging, have more than 48
> + * phys-bits but support only 4-level EPT, which effectively
> + * limits guest phys-bits to 48.
> + *
> + * AMD
Rename Page5LevelSupported to Page5LevelEnabled.
The variable is set to true in case 5-paging level is enabled (64-bit
PEI) or will be enabled (32-bit PEI), it does *not* tell whenever the
5-level paging is supported by the CPU.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Laszlo Ersek
Acked-by: A
PcdUse5LevelPageTable documentation says:
Indicates if 5-Level Paging will be enabled in long mode. 5-Level
Paging will not be enabled when the PCD is TRUE but CPU doesn't support
5-Level Paging.
So running in 4-level paging mode with PcdUse5LevelPageTable=TRUE is
possible. The only invali
Adjust physical address space logic for la57 mode (5-level paging).
With a larger logical address space we can identity-map a larger
physical address space.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Laszlo Ersek
Acked-by: Ard Biesheuvel
---
OvmfPkg/Library/PlatformInitLib/MemDetect.c | 63
Patch #1 + #2 fix MdeModulePkg/DxeIplPeim to not assert in case a
5-level enabled build runs in 4-level paging mode.
Patch #3 updates PlatformInitLib for 5-level paging support (update
PhysBits calculation).
v4:
- drop OvmfPkg/ResetVecor changes, they will be sent as
separate patch series.
-
> > + @param[in] FirstMpHandOff Pointer to first MpHandOff HOB.
>
> ... also, it would be more precise to say "first MpHandOff HOB body".
>
"body" is a very good term that emphasizes it doesn't point to a separate
storage.
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages
> > I agree with the idea (I think it's a necessary change, or put
> > differently, an improvement, even though I may not be convinced that it
> > is a *sufficient* improvement; but let's not rehash all that here
> > again); however, I think the implementation is not the greatest.
> >
> > Volatile-
The EFI Shell allows to bypass secure boot, do not allow
to include the shell in the firmware images of secure boot
enabled builds.
This prevents misconfigured downstream builds.
Ref: https://bugs.launchpad.net/ubuntu/+source/edk2/+bug/2040137
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4
Note that IntelTdxX64 is compiled without network support, so thanks to
the network conditionals in the include files the build result (network
shell commands excluded) should be identical before and after the patch.
Signed-off-by: Gerd Hoffmann
Acked-by: Laszlo Ersek
Acked-by: Jiewen Yao
---
Note that AmdSevX64 is compiled without network support, so thanks to
the network conditionals in the include files the build result (network
shell commands excluded) should be identical before and after the patch.
Signed-off-by: Gerd Hoffmann
Acked-by: Laszlo Ersek
Acked-by: Jiewen Yao
---
Ov
Place the EFI shell as EFI/BOOT/BOOT{ARCH}.EFI on the virtual drive.
This allows the "run to shell" CI test case to work even in case the
shell is not included in the firmware image.
This is needed because an followup patch will exclude the shell from
secure boot enabled firmware images.
Signed-o
Signed-off-by: Gerd Hoffmann
Reviewed-by: Laszlo Ersek
Acked-by: Jiewen Yao
---
OvmfPkg/OvmfPkgIa32X64.dsc | 47 ++
OvmfPkg/OvmfPkgIa32X64.fdf | 11 ++---
2 files changed, 4 insertions(+), 54 deletions(-)
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg
Signed-off-by: Gerd Hoffmann
Acked-by: Laszlo Ersek
Acked-by: Jiewen Yao
---
OvmfPkg/Microvm/MicrovmX64.dsc | 49 ++
OvmfPkg/Microvm/MicrovmX64.fdf | 9 ++-
2 files changed, 10 insertions(+), 48 deletions(-)
diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/Ovm
Needed to make the new 'varpolicy' EFI shell command
actually available in the OVMF firmware builds.
Fixes: fe6cd1c18721 ("OvmfPkg: Add varpolicy shell command")
Signed-off-by: Gerd Hoffmann
Reviewed-by: Laszlo Ersek
Acked-by: Jiewen Yao
---
OvmfPkg/Include/Fdf/ShellDxe.fdf.inc | 1 +
1 file c
Signed-off-by: Gerd Hoffmann
Reviewed-by: Laszlo Ersek
Acked-by: Jiewen Yao
---
OvmfPkg/OvmfPkgIa32.dsc | 47 ++---
OvmfPkg/OvmfPkgIa32.fdf | 11 ++
2 files changed, 4 insertions(+), 54 deletions(-)
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/Ovmf
Move EFI Shell components from OvmfPkgX64.dsc to
the new ShellComponents.dsc.inc include file.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Laszlo Ersek
Acked-by: Jiewen Yao
---
OvmfPkg/Include/Dsc/ShellComponents.dsc.inc | 49 +
OvmfPkg/OvmfPkgX64.dsc | 4
Add NETWORK_ENABLE conditionals for the components
which need network support.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Laszlo Ersek
Acked-by: Jiewen Yao
---
OvmfPkg/Include/Dsc/ShellComponents.dsc.inc | 6 ++
OvmfPkg/Include/Fdf/ShellDxe.fdf.inc| 2 ++
2 files changed, 8 insertio
Move EFI Shell libraries from OvmfPkgX64.dsc to
the new ShellComponents.dsc.inc include file.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Laszlo Ersek
Acked-by: Jiewen Yao
---
OvmfPkg/Include/Dsc/ShellLibs.dsc.inc | 10 ++
OvmfPkg/OvmfPkgX64.dsc| 4 +---
2 files changed,
Move EFI Shell firmware volume files to
the new ShellDxe.fdf.inc file.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Laszlo Ersek
Acked-by: Jiewen Yao
---
OvmfPkg/OvmfPkgX64.fdf | 11 ++-
OvmfPkg/Include/Fdf/ShellDxe.fdf.inc | 14 ++
2 files changed, 16 insertions
- Create include files to reduce duplication.
- Fix varpolicy command.
- Little CI tweak.
v3:
- pick up review and ack tags.
- no functional changes.
v2:
- do not move ShellCEntryLib to include file.
- refine network config conditionals.
- improve some commit messages.
- add patch to drop th
Thanks for catching this typo, Abner. Version 2 patch is sent.
Regards,
Nickle
> -Original Message-
> From: Chang, Abner
> Sent: Wednesday, February 21, 2024 9:52 AM
> To: Nickle Wang ; devel@edk2.groups.io
> Cc: Igor Kulchytskyy ; Nick Ramirez
> Subject: RE: [PATCH 2/6] RedfishPkg: imp
Hi Abner,
Please check v2 patch. I add the source location of MathFtol.c
Thanks,
Nickle
> -Original Message-
> From: Chang, Abner
> Sent: Wednesday, February 21, 2024 10:10 AM
> To: Nickle Wang ; devel@edk2.groups.io
> Cc: Igor Kulchytskyy ; Nick Ramirez
> Subject: RE: [PATCH 6/6] Redf
Remove RedfishLib and use RedfishHttpLib for debug printing
Redfish response data.
Signed-off-by: Nickle Wang
Cc: Abner Chang
Cc: Igor Kulchytskyy
Cc: Nick Ramirez
Reviewed-by: Abner Chang
---
RedfishPkg/Library/RedfishDebugLib/RedfishDebugLib.inf | 4 ++--
RedfishPkg/Include/Library/Redfish
-Fix below compiler error reported in edk2 CI.
ERROR - Linker #2001 from JsonLib.lib(load.obj) : unresolved external
symbol __ftol2
-The file MathFtol.c is copied from IntrinsicLib in CryptoPkg.
-Add MathFtol.c to EccCheck IgnoreFiles.
Signed-off-by: Nickle Wang
Cc: Abner Chang
Cc: Igor Kulchyts
RedfishHttpLib is a wrapper library for Redfish feature drivers to
call Redfish HTTP Protocol easily.
Signed-off-by: Nickle Wang
Cc: Abner Chang
Cc: Igor Kulchytskyy
Cc: Nick Ramirez
Reviewed-by: Abner Chang
---
RedfishPkg/RedfishPkg.dec | 5 +
RedfishPkg/RedfishLibs.ds
implement Redfish HTTP protocol driver.
Signed-off-by: Nickle Wang
Co-authored-by: Igor Kulchytskyy
Cc: Abner Chang
Cc: Igor Kulchytskyy
Cc: Nick Ramirez
---
RedfishPkg/RedfishPkg.dec |7 +-
RedfishPkg/RedfishComponents.dsc.inc |3 +-
RedfishPkg/RedfishPk
Redfish common structures are moved to RedfishServiceData.h. Remove
them from RedfishLib.h
Signed-off-by: Nickle Wang
Cc: Abner Chang
Cc: Igor Kulchytskyy
Cc: Nick Ramirez
Reviewed-by: Abner Chang
---
RedfishPkg/Include/Library/RedfishLib.h | 17 +
1 file changed, 1 insertion
Introduce Redfish HTTP protocol to improve Redfish performance
and communication stability between BIOS and Redfish service.
- Feature drivers often query same Redfish resource multiple
times for different purpose. Implement HTTP cache mechanism to
improve HTTP GET performance. "UseCache" parameter
v2: address review comments.
1) add comment to show the source file of MathFtol.c
2) update macro to follow file name in RedfishHttpOperation.h
This patch series introduce Redfish HTTP protocol to RedfishPkg.
This is to improve Redfish performance and communication stability
between BIOS and Red
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