Now that we have Bootlog support for serial, let's also add it for the PV
Debug Port. The only new platform we touch with this is Xen, where we just
disable bootlogs for now.
Signed-off-by: Alexander Graf
---
.../Library/PlatformDebugLibIoPort/DebugLib.c | 23 +++
Now that we have the bootlog infrastructure in place and link against it
with all in tree consumers of BaseDebugLibSerialPort, let's emit log lines
to the bootlog in addition to serial.
The existing PcdDebugBootlogErrorLevel still defines which messages end up
on serial. However, in addition the
In the next commit, we will make BaseDebugLibSerialPort call
DebugBootlogLib to emit log lines. Make sure that every dsc that links
against BaseDebugLibSerialPort also links against a DebugBootlogLib.
Signed-off-by: Alexander Graf
---
ArmVirtPkg/ArmVirt.dsc.inc | 5 +
This patch adds bootlog time stamp infrastructure for ARM. It leverages
the architected timer which is present on all supported platforms.
Signed-off-by: Alexander Graf
---
.../BaseDebugBootlog/DebugBootlogArm.c| 32 +++
1 file changed, 32 insertions(+)
create mode
This patch adds time stamp infrastructure using the TSC. It attempts to
determine TSC frequency inside virtual machines, but not on read hardware.
Signed-off-by: Alexander Graf
---
.../BaseDebugBootlog/DebugBootlogX86.c| 50 +++
1 file changed, 50 insertions(+)
create
This patch adds the main bootlog infrastructure to dynamically create the
bootlog configuration table and edk2 bootlog at DXE phase. It attempts to
do all this dynamically: The bootlog configuration table may first get
created by a UEFI application.
This code also collects all PEI phase log
The bootlog itself is a binary data structure that is not immediately human
readable. This commit adds a python script to generate a human readable form
of it with Linux dmesg like time stamp information.
The script can take multiple log sources and collate them into a single
output, making it
In some situations, we do not want to emit any debug output to serial, but
still create a bootlog. In these situations, we can use BaseDebugLibBootlog
instead of BaseDebugLibNull. It's a DebugLib that emits exclusively to the
bootlog.
Signed-off-by: Alexander Graf
---
The bootlog infrastructure records time stamps of every message. However,
not all platforms have readily available time sources. Add a fallback path
to return 0 for every time stamp.
Signed-off-by: Alexander Graf
---
.../BaseDebugBootlog/DebugBootlogNotime.c | 31 +++
1 file
This patch adds all logic required to collect bootlog data during the PEI
phase. During PEI, we create a HOB entry for every log line. Later, when
we emit the first DXE bootlog line, we automatically collect all bootlog
HOB entries into the actual bootlog.
Signed-off-by: Alexander Graf
---
I recently looked at improving the bootup performance of virtual machines
and was amazed by the fact that there is no logging / tracing framework
available that would give me a full picture of the Pre-OS phase including
time stamps and boot loaders (such as grub) without writing data to the
serial
In some situations, we may not want to actually emit any boot log. This
commit adds a null bootlog handler. We will use this in situations where
we can not maintain a boot log, such as during the SEC phase.
Signed-off-by: Alexander Graf
---
.../BaseDebugBootlogNullLib.inf | 26
We will shortly introduce a new bootlog framework. This commit contains the
main library header that defines its data structure and public APIs.
Signed-off-by: Alexander Graf
---
MdePkg/Include/Library/DebugBootlog.h | 141 ++
1 file changed, 141 insertions(+)
create
On 29.01.22 16:13, Ard Biesheuvel wrote:
Alex reports that the cache invalidation performed by
ArmVirtMemoryInitPeiLib takes a non-negligible amount of time at boot.
This cache invalidation used to be necessary to avoid inconsistencies
between the CPU's cached and uncached views of the
Hey Laszlo,
On 19.02.21 17:47, Laszlo Ersek wrote:
Hello Alex,
On 02/19/21 15:10, Alexander Graf wrote:
Hi Mike,
Thanks a lot for the pointer! In my case, the defaults for the
preallocated memory regions was just not big enough to prevent
hibernation breakage. I increased them now as
-Original Message-
From: devel@edk2.groups.io On Behalf Of Alexander Graf
via groups.io
Sent: Thursday, February 18, 2021 12:10 PM
To: devel@edk2.groups.io
Cc: Leif Lindholm ; Laszlo Ersek ; Ard
Biesheuvel ;
Justen, Jordan L ; Woodhouse, David ;
Hendrik Borghorst
Subject: [edk2-devel
Operating Systems that get hibernated expect all non-boot-time allocations
to be identical before and after hibernation.
In edk2, we create pools and allocate pages starting from the highest
allowed address for the allocation, usually 0x. Typically, that
means we allocate a few pages of
Now that we have a framework available to set memory ranges for
allocations that break hibernation if they move, let's push them
to their own respective memory ranges. This way, they will be
unaffected by boot time data allocation changes and we can thus
still resume hibernated systems.
Operating Systems that get hibernated expect all non-boot-time allocations
to be identical before and after hibernation.
In edk2, we create pools and allocate pages starting from the highest
allowed address for the allocation, usually 0x. Typically, that
means we allocate a few pages of
> Am 11.07.2019 um 19:07 schrieb Laszlo Ersek :
>
>> On 07/10/19 19:13, Leif Lindholm wrote:
>>> On Wed, Jul 10, 2019 at 04:53:11PM +0200, Alexander Graf via Groups.Io
>>> wrote:
>>> The PL031 interrupt mask register (IMSC) is not very clearly do
The PL031 interrupt mask register (IMSC) is not very clearly documented
in the PL031 specification. However, bit 0 (RTCIMSC) indicates whether
interrupts are enabled, not disabled.
So before this commit, we were actually *enabling* interrupts for the RTC.
This patch changes the logic to instead
Hi David and Laszlo,
(with broken threading because gmane still mirrors the old ML ...)
Mostly, this is only necessary for devices that the CSM might have
native support for, such as VirtIO and NVMe; PciBusDxe will already
degrade devices to 32-bit if they have an OpROM.
However, there
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