_REG indicates command is serviced.
>
> Cc: Ray Ni
> Cc: Rangasai V Chaganty
> Cc: Jenny Huang
> Signed-off-by: Sheng Wei
> ---
> .../Feature/VTd/IntelVTdCoreDxe/VtdReg.c | 13 ++
> .../VTd/IntelVTdCorePei/IntelVTdDmar.c| 9 +---
> .../VTd/IntelVTdDm
Here is the process of modify GCMD_REG.
Read GSTS_REG
Reset the one-shot bits.
Modify the target comamnd value.
Write the command value to GCMD_REG.
Wait until GSTS_REG indicates command is serviced.
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Signed-off-by: Sheng Wei
PciIoMap () need to feedback the status of
mIoMmuProtocol->SetAttribute () return value.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4652
Cc: Ray Ni
Cc: Huang Jenny
Cc: Chiang Chris
Signed-off-by: Sheng Wei
---
MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 12 ++--
1 file chan
PciIoMap () need to feedback the status of
mIoMmuProtocol->SetAttribute () return value.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4652
Cc: Ray Ni
Cc: Huang, Jenny
Cc: Chiang, Chris
Signed-off-by: Sheng Wei
---
MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 12 ++--
1 f
Hi Ray,
I update the copyright year and add your review-by for the 5 patches.
And here is the PR https://github.com/tianocore/edk2/pull/5109
Thank you.
BR
Sheng Wei
> -Original Message-
> From: Ni, Ray
> Sent: Thursday, December 7, 2023 4:41 PM
> To: Sheng, W ; devel@edk2.gr
.CET bit,
And SMI handler needs to restore MSR IA32_U_CET when exit SMI handler.
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 15 +++
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 10 +++---
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 10 +++---
2 files changed, 14 insertions(+), 6 deletions(-)
diff --git
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Cet.inc | 26 ++
1 file changed, 26 insertions(+)
create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Cet.inc
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 14 +-
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 15 +--
2 files changed, 2 insertions(+), 27 deletions(-)
diff --git
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm | 5 +++--
UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm | 5 +++--
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm
it to zero manually.
Patch V2:
No function change with Patch V1.
Split the patch to into 3 separate patches.
Sheng Wei (5):
UefiCpuPkg: Add macro definitions for CET feature for NASM files.
UefiCpuPkg: Use macro CR4_CET_BIT to replace hard code value in
Cet.nasm.
UefiCpuPkg: Use CET
The macro is used in file LongJump.nasm and SetJump.nasm.
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
Reviewed-by: Laszlo Ersek
---
MdePkg/Library/BaseLib/Ia32/LongJump.nasm | 3 ++-
MdePkg/Library/BaseLib/Ia32/SetJump.nasm | 3 ++-
MdePkg
.CET bit,
And SMI handler needs to restore MSR IA32_U_CET when exit SMI handler.
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
Reviewed-by: Laszlo Ersek
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 15 +++
UefiCpuPkg
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
Reviewed-by: Laszlo Ersek
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 10 +++---
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 10 +++---
2 files changed, 14 insertions(+), 6
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
Reviewed-by: Laszlo Ersek
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 14 +-
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 15 +--
2 files changed, 2 insertions
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
Reviewed-by: Laszlo Ersek
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm | 5 +++--
UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm | 5 +++--
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
Reviewed-by: Laszlo Ersek
---
MdePkg/Include/Ia32/Cet.inc | 26 ++
MdePkg/Include/X64/Cet.inc | 26 ++
2 files changed, 52 insertions(+)
create
',
it is no need to delay MSR IA32_S_CET restoration.
Patch V3:
Remove the 3rd patch. mSmmInterruptSspTables is a global variable.
It is unnecessary to initializ it to zero manually.
Patch V2:
No function change with Patch V1.
Split the patch to into 3 separate patches.
Sheng Wei (6
The macro is used in file LongJump.nasm and SetJump.nasm.
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
MdePkg/Library/BaseLib/Ia32/LongJump.nasm | 3 ++-
MdePkg/Library/BaseLib/Ia32/SetJump.nasm | 3 ++-
MdePkg/Library/BaseLib/X64
.CET bit,
And SMI handler needs to restore MSR IA32_U_CET when exit SMI handler.
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
Reviewed-by: Laszlo Ersek
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 15 +++
UefiCpuPkg
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
Reviewed-by: Laszlo Ersek
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 10 +++---
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 10 +++---
2 files changed, 14 insertions(+), 6
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
Reviewed-by: Laszlo Ersek
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 14 +-
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 15 +--
2 files changed, 2 insertions
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
Reviewed-by: Laszlo Ersek
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm | 5 +++--
UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm | 5 +++--
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git
.
It is unnecessary to initializ it to zero manually.
Patch V2:
No function change with Patch V1.
Split the patch to into 3 separate patches.
Sheng Wei (6):
MdePkg: Add macro definitions for CET feature for NASM files.
UefiCpuPkg: Use macro CR4_CET_BIT to replace hard code value
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
Reviewed-by: Laszlo Ersek
---
MdePkg/Include/Cet.inc | 26 ++
1 file changed, 26 insertions(+)
create mode 100644 MdePkg/Include/Cet.inc
diff --git a/MdePkg/Include
.CET bit,
And SMI handler needs to restore MSR IA32_U_CET when exit SMI handler.
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 15 +++
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 10 +++---
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 10 +++---
2 files changed, 14 insertions(+), 6 deletions(-)
diff --git
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 14 +-
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 15 +--
2 files changed, 2 insertions(+), 27 deletions(-)
diff --git
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm | 5 +++--
UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm | 5 +++--
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/Include/Cet.inc | 26 ++
1 file changed, 26 insertions(+)
create mode 100644 UefiCpuPkg/Include/Cet.inc
diff --git a/UefiCpuPkg/Include/Cet.inc b/UefiCpuPkg
restoration.
Patch V3:
Remove the 3rd patch. mSmmInterruptSspTables is a global variable.
It is unnecessary to initializ it to zero manually.
Patch V2:
No function change with Patch V1.
Split the patch to into 3 separate patches.
Sheng Wei (5):
UefiCpuPkg: Add macro definitions for CET
Hi Laszlo,
Please ignore the patch V3. I will refine the patches and raise patch V4.
Thank you.
BR
Sheng Wei
> -Original Message-
> From: Laszlo Ersek
> Sent: Thursday, November 9, 2023 5:16 AM
> To: devel@edk2.groups.io; Sheng, W
> Cc: Dong, Eric ; Ni, Ray ; Wu, Jiax
Do not use fixed CR4 value 0x668, change CR4.CET bit only.
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 9 ++---
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 3 ++-
2 files changed, 8
Clear CR4.CET bit before restoring MSR IA32_S_CET.
Backup/restore MSR IA32_U_CET in SMI.
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 53 ---
UefiCpuPkg/PiSmmCpuDxeSmm/X64
Patch V3:
Remove the 3rd patch. mSmmInterruptSspTables is a global variable.
It is unnecessary to initializ it to zero manually.
Patch V2:
No function change with Patch V1.
Split the patch to into 3 separate patches.
Sheng Wei (2):
UefiCpuPkg/PiSmmCpuDxeSmm: Clear CR4.CET before
. But last patch will be removed
because of (3)
(3) It is global variable. It is initialized to zero. I will remove this change.
I will raise patch V3.
Thank you.
BR
Sheng Wei
> -Original Message-
> From: Laszlo Ersek
> Sent: Friday, November 3, 2023 9:19 PM
> To: devel@ed
Initial the value of mSmmInterruptSspTables to 0.
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64
Do not use fixed CR4 value 0x668, change CR4.CET bit only.
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 9 ++---
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 3 ++-
2 files changed, 8
Clear CR4.CET bit before restoring MSR IA32_S_CET.
Backup/restore MSR IA32_U_CET in SMI.
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 53 ---
UefiCpuPkg/PiSmmCpuDxeSmm/X64
Patch V2:
No function change with Patch V1.
Split the patch to into 3 separate patches.
Sheng Wei (3):
UefiCpuPkg/PiSmmCpuDxeSmm: Clear CR4.CET before restoring MSR
IA32_S_CET
UefiCpuPkg/PiSmmCpuDxeSmm: Change CR4.CET bit only
UefiCpuPkg/PiSmmCpuDxeSmm: Set mSmmInterruptSspTables
Clear CR4.CET bit before restoring MSR IA32_S_CET.
Backup/restore MSR IA32_U_CET in SMI.
Use current CR4 value when changing CR4.CET.
Initial mSmmInterruptSspTables to 0.
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg
Flags field is defined in Device Scope Structure since VT-d spec 4.0.
Print Device Scope Structure Flags field when dump DMAR table.
Change-Id: I37365ea4c1e6cfa0a1842a583076136b7d2c
Signed-off-by: Sheng Wei
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
---
.../Library
Fix incorrect number of arguments in VtdLibDumpSetAttribute().
Signed-off-by: Sheng Wei
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
---
.../Library/IntelVTdPeiDxeLib/IntelVTdPeiDxeLib.c| 1 +
1 file changed, 1 insertion(+)
diff --git
a/Silicon/Intel/IntelSiliconPkg
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3413
Change-Id: Ic13595ffb0581a178db71d231ba34f17862fa5d8
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Min Xu
Cc: Zeyi Chen
Cc: Fiona Wang
Signed-off-by: Sheng Wei
---
.../Library/AuthVariableLib/AuthService.c | 225
: I208a618e3f6eb12704e528ab842494082de1464d
Signed-off-by: Sheng Wei
---
CryptoPkg/Library/BaseCryptLib/Pk/CryptTs.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptTs.c
b/CryptoPkg/Library/BaseCryptLib/Pk/CryptTs.c
index 027dbb6842..944bcf8d38 100644
age.
4) Enroll a RSA4096 Cert to both DB and DBX, execute the RSA4096 signed efi
image.
Test Result:
Get "Access Denied" when try to execute the efi image.
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Min Xu
Cc: Zeyi Chen
Cc: Fiona Wang
Cc: Xiaoyu Lu
Cc: Guomin Jiang
Cc: Michael D Kinney
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3413
Change-Id: Ic13595ffb0581a178db71d231ba34f17862fa5d8
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Min Xu
Cc: Zeyi Chen
Cc: Fiona Wang
Signed-off-by: Sheng Wei
---
.../Library/AuthVariableLib/AuthService.c | 225
: I208a618e3f6eb12704e528ab842494082de1464d
Signed-off-by: Sheng Wei
---
CryptoPkg/Library/BaseCryptLib/Pk/CryptTs.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptTs.c
b/CryptoPkg/Library/BaseCryptLib/Pk/CryptTs.c
index 027dbb6842..944bcf8d38 100644
ute the RSA4096 signed efi
image.
Test Result:
Get "Access Denied" when try to execute the efi image.
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Min Xu
Cc: Zeyi Chen
Cc: Fiona Wang
Cc: Xiaoyu Lu
Cc: Guomin Jiang
Cc: Michael D Kinney
Sheng Wei (2):
CryptoPkg/BaseCryptLib: add sha3
Hi Jiewen,
Do you have any comments on the patch V7?
The 2 patches are for CryptoPkg and SecurityPky.
Could you help to review/merge the patches?
Thank you.
BR
Sheng Wei
> -Original Message-
> From: Sheng, W
> Sent: Tuesday, August 22, 2023 1:59 PM
> To: devel@edk2.groups.io;
Hi Jiewen,
I update the patch V6 to V7, drop raw RSA3K and RSA4K. The change is in
SecurityPkg.
And I did all the tests which are listed in the cover letter. I got the
expected results.
Could you help to review/merge this V7 patch for secure boot feature ?
Thank you.
BR
Sheng Wei
Hi Jiewen,
Thank you for comments.
I update the patch V6 to V7, drop raw RSA3K and RSA4K. The change is in
SecurityPkg.
And I did all the tests which are listed in the cover letter. I got the
expected results.
Could you help to review/merge the patches ?
Thank you.
BR
Sheng Wei
> -Origi
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3413
Change-Id: Ic13595ffb0581a178db71d231ba34f17862fa5d8
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Min Xu
Cc: Zeyi Chen
Cc: Fiona Wang
Signed-off-by: Sheng Wei
---
.../Library/AuthVariableLib/AuthService.c | 218
en Yao
Cc: Jian J Wang
Cc: Min Xu
Cc: Zeyi Chen
Cc: Fiona Wang
Cc: Xiaoyu Lu
Cc: Guomin Jiang
Cc: Michael D Kinney
Sheng Wei (2):
CryptoPkg/Library/BaseCryptLib: add sha384 and sha512 to
ImageTimestampVerify
SecurityPkg/SecureBoot: Support RSA 512 and RSA 384
CryptoPkg/Library/BaseC
: I208a618e3f6eb12704e528ab842494082de1464d
Signed-off-by: Sheng Wei
---
CryptoPkg/Library/BaseCryptLib/Pk/CryptTs.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptTs.c
b/CryptoPkg/Library/BaseCryptLib/Pk/CryptTs.c
index 027dbb6842..944bcf8d38 100644
CheckSignatureListFormat()
It is no need to change MdePkg.
All the changes are in CryptoPkg and SecurityPkg.
I did the local unit test and raised the patch v6.
Could you help to review/merge the patches ?
Thank you
BR
Sheng Wei
> -Original Message-
> Fro
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3413
Change-Id: Ic13595ffb0581a178db71d231ba34f17862fa5d8
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Min Xu
Cc: Zeyi Chen
Cc: Fiona Wang
Signed-off-by: Sheng Wei
---
.../Library/AuthVariableLib/AuthService.c | 218
: I208a618e3f6eb12704e528ab842494082de1464d
Signed-off-by: Sheng Wei
---
CryptoPkg/Library/BaseCryptLib/Pk/CryptTs.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptTs.c
b/CryptoPkg/Library/BaseCryptLib/Pk/CryptTs.c
index 027dbb6842..944bcf8d38 100644
the RSA4096 signed efi
image.
Test Result:
Get "Access Denied" when try to execute the efi image.
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Min Xu
Cc: Zeyi Chen
Cc: Fiona Wang
Cc: Xiaoyu Lu
Cc: Guomin Jiang
Cc: Michael D Kinney
Sheng Wei (2):
CryptoPkg/Library/BaseCryptLib:
Hi Liming,
Sorry for the late response.
The two new GUID are not in the public UEFI spec yet.
Do we have any process to add these 2 new GUIDs ?
Thank you.
BR
Sheng Wei
> -Original Message-
> From: gaoliming
> Sent: 2023年8月2日 17:12
> To: Sheng, W ; devel@edk2.groups.io
>
Hi Gao, Liming,
For this patch group, we have got review-by from Yao, Jiewen on patch
2/3(CryptoPkg) and patch 3/3(SecurityPkg).
Do you any comments on the patch 1/3 (MdePkg) ?
Patch 1/3 is only to add 2 new GUIDs.
Could you help to merge it ?
Thank you.
BR
Sheng Wei
> -Original Mess
Hi Gao, Liming,
Could you help to review and merge this patch to MdePkg?
This patch is only to add 2 new GUIDs.
These 2 GUIDs will be used for adding RSA3072/RSA4096 cert support for secure
boot feature.
Thank you.
BR
Sheng Wei
> > -Original Message-
> > From: devel@ed
Hi Michael D,
Could you help to review and merge this patch to MdePkg?
This patch is only to add 2 new GUIDs.
These 2 GUIDs will be used for adding RSA3072/RSA4096 cert support for secure
boot feature.
Thank you.
BR
Sheng Wei
> -Original Message-
> From: devel@edk2.groups.io On
Result:
Get "Access Denied" when try to execute the efi image.
Thank you.
BR
Sheng Wei
> -Original Message-
> From: Yao, Jiewen
> Sent: 2023年7月27日 17:45
> To: Sheng, W ; devel@edk2.groups.io
> Cc: Wang, Jian J ; Xu, Min M ;
> Chen, Zeyi ; Wang, Fiona ;
&
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3413
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Min Xu
Cc: Zeyi Chen
Cc: Fiona Wang
Signed-off-by: Sheng Wei
---
.../Library/AuthVariableLib/AuthService.c | 220 +++---
.../AuthVariableLib/AuthServiceInternal.h | 4
Register and initialize sha384/sha512 digest algorithms for PKCS#7 Handling.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3413
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Min Xu
Cc: Zeyi Chen
Cc: Fiona Wang
Cc: Xiaoyu Lu
Cc: Guomin Jiang
Cc: Michael D Kinney
Signed-off-by: Sheng Wei
Add gEfiCertRsa3072Guid and gEfiCertRsa4096Guid
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Min Xu
Cc: Zeyi Chen
Cc: Fiona Wang
Cc: Xiaoyu Lu
Cc: Guomin Jiang
Cc: Michael D Kinney
Cc: Liming Gao
Signed-off-by: Sheng Wei
---
MdePkg/Include/Guid/ImageAuthentication.h | 26
an unsigned efi image, execute the unsigned efi image under UEFI shell
Test Result:
Pass
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Min Xu
Cc: Zeyi Chen
Cc: Fiona Wang
Cc: Xiaoyu Lu
Cc: Guomin Jiang
Cc: Michael D Kinney
Cc: Liming Gao
Sheng Wei (3):
MdePkg/Include: Add GUID for CERT_RSA3072
Hi Jiewen,
Thank you for the comments.
I will update the patch and follow the process.
BR
Sheng Wei
> -Original Message-
> From: Yao, Jiewen
> Sent: 2023年7月25日 14:06
> To: Sheng, W ; devel@edk2.groups.io
> Cc: Wang, Jian J ; Xu, Min M ;
> Chen, Zeyi ; Wang, Fiona
>
Cc: Jian J Wang
Cc: Jiewen Yao
Cc: Xiaoyu Lu
Cc: Guomin Jiang
Signed-off-by: Sheng Wei
---
CryptoPkg/Library/OpensslLib/OpensslLib.inf | 1 -
CryptoPkg/Library/OpensslLib/OpensslLibAccel.inf | 1 -
CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf| 1 -
CryptoPkg/Library
Fix the capsule update assert caused by function call errors.
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
Signed-off-by: Sheng Wei
---
.../Intel/IntelSiliconPkg/Feature/VTd/IntelVTdCoreDxe/VtdReg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3413
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Min Xu
Cc: Zeyi Chen
Cc: Fiona Wang
Signed-off-by: Sheng Wei
---
CryptoPkg/Library/BaseCryptLib/Pk/CryptTs.c | 3 +-
MdePkg/Include/Guid/ImageAuthentication.h | 26 +++
MdePkg/MdePkg.dec
comment about this solution ?
Thank you
BR
Sheng Wei
> -Original Message-
> From: Yao, Jiewen
> Sent: 2023年7月6日 15:06
> To: Sheng, W ; devel@edk2.groups.io
> Cc: Wang, Jian J ; Xu, Min M
> ; Chen, Zeyi ; Wang, Fiona
>
> Subject: RE: [PATCH] SecurityPkg/SecureBoot: Sup
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3413
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Min Xu
Cc: Zeyi Chen
Cc: Fiona Wang
Signed-off-by: Sheng Wei
---
CryptoPkg/Library/BaseCryptLib/Pk/CryptTs.c | 3 +-
MdePkg/Include/Guid/ImageAuthentication.h | 26 +++
MdePkg/MdePkg.dec
t to know the RSA algorithm by KeyLengthInBits.
(RSA2048/RSA3072/RSA4096)
Thank you.
BR
Sheng Wei
> -Original Message-
> From: Yao, Jiewen
> Sent: 2023年6月22日 15:22
> To: Sheng, W ; devel@edk2.groups.io
> Cc: Wang, Jian J ; Xu, Min M ;
> Chen, Zeyi ; Wang, Fiona
> Su
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3413
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Min Xu
Cc: Zeyi Chen
Cc: Fiona Wang
Signed-off-by: Sheng Wei
---
CryptoPkg/Library/BaseCryptLib/Pk/CryptTs.c | 3 +-
MdePkg/Include/Guid/ImageAuthentication.h | 26 +++
MdePkg/MdePkg.dec
Add (VOID **) for gBS->AllocatePool.
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
Signed-off-by: Sheng Wei
---
.../Intel/IntelSiliconPkg/Feature/VTd/IntelVTdCoreDxe/VtdLog.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Silicon/In
MSFT:*_*_*_CC_FLAGS = /Od will disable build optimization.
Signed-off-by: Sheng Wei
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
---
.../VTd/IntelVTdDmarPei/IntelVTdDmar.c| 43 +--
1 file changed, 31 insertions(+), 12 deletions(-)
diff
Upgrade openssl to 1.1.1t
Pick up bugfixes from the latest openssl release.
Cc: Jian J Wang
Cc: Jiewen Yao
Cc: Xiaoyu Lu
Cc: Guomin Jiang
Signed-off-by: Sheng Wei
---
CryptoPkg/Library/OpensslLib/OpensslLib.inf | 1 +
CryptoPkg/Library/OpensslLib/OpensslLibAccel.inf | 1
256-bit invaildation queue descriptor could be used for both
abort DMA mode and legacy mode.
Signed-off-by: Sheng Wei
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
---
.../VTd/IntelVTdDmarPei/IntelVTdDmar.c| 179 -
.../VTd/IntelVTdDmarPei
256-bit invaildation queue descriptor could be used for both
abort DMA mode and legacy mode.
Signed-off-by: Sheng Wei
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
---
.../VTd/IntelVTdDmarPei/IntelVTdDmar.c| 188 -
.../VTd/IntelVTdDmarPei
256-bit invaildation queue descriptor could be used for both
abort DMA mode and legacy mode.
Change-Id: Ib3b94d6c5782d42c53056204312f6f4ad513344e
Signed-off-by: Sheng Wei
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
---
.../VTd/IntelVTdDmarPei/IntelVTdDmar.c
Refine the DRHD table print message.
Remove unused variable.
Hsd-es-id: 15012152545
Signed-off-by: Sheng Wei
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
---
.../Feature/VTd/IntelVTdDmarPei/IntelVTdDmar.c| 3 +--
.../Feature/VTd/IntelVTdDxe
in the Capability register, software must not modify this field while
DMA remapping is active (TES=1 in Global Status register).
So, we will enable ADM while TE is disable.
Thank you
BR
Sheng Wei
> -Original Message-
> From: Huang, Jenny
> Sent: 2022年9月29日 11:54
> To: devel@edk2.groups.
In Abort DMA Mode(ADM), hardware will abort all DMA operations without
the need to set up a roottable. Enable Abort DMA Mode, when change
Translation Table Mode(TTM)
Change-Id: I74207fe96ef7a57d89a355d40dfbdd36186f06c3
Signed-off-by: Sheng Wei
Cc: Jenny Huang
Cc: Ray Ni
Cc: Rangasai V Chaganty
VT-d spec 4.0 has added a new structure called SIDP which is more
generic to describe special properties of integrated devices.
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
Signed-off-by: Sheng Wei
---
.../Feature/VTd/IntelVTdDxe/DmarAcpiTable.c | 72
DMAR core driver)
4) Refine comment. (PEI VTD DMAR core driver)
5) Register-based invalidation interface supported by hardware
implementations of this architecture with Major Version 5 or lower (VER_REG).
It is wrong to use “6” (DXE VTD core driver)
Thank you.
BR
Sheng Wei
> -Ori
Reviewed-by: Sheng Wei
The change matches the Vtd specification v 4.0
> -Original Message-
> From: Kowalewski, Robert
> Sent: 2022年7月6日 21:48
> To: devel@edk2.groups.io
> Cc: Kinney, Michael D ; Gao, Liming
> ; Liu, Zhiguang ;
> Huang, Jenny ; Sheng, W
>
://bugzilla.tianocore.org/show_bug.cgi?id=3964
Signed-off-by: Sheng Wei
Cc: Jenny Huang
Cc: Ray Ni
Cc: Rangasai V Chaganty
---
.../VTd/IntelVTdDmarPei/IntelVTdDmar.c| 32 +--
.../VTd/IntelVTdDmarPei/IntelVTdDmarPei.h | 2 +-
.../Feature/VTd/IntelVTdDxe/VtdReg.c | 2
PcdVTdSupportAbortDmaMode is used to enable/disable using VTd Abort DMA Mode.
Signed-off-by: Sheng Wei
Reviewed-by: Robert Kowalewski
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Change-Id: If999d2f4906bda887dffe8574ec17cb90346b710
---
.../Feature/VTd/IntelVTdDmarPei/IntelVTdDmar.c
PcdVTdSupportAbortDmaMode is used to enable/disable using VTd Abort DMA Mode.
Signed-off-by: Sheng Wei
Reviewed-by: Robert Kowalewski
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Change-Id: If999d2f4906bda887dffe8574ec17cb90346b710
---
.../Feature/VTd/IntelVTdDmarPei/IntelVTdDmar.c
PcdVTdSupportAbortDmaMode is used to enable/disable VTd Abort DMA Mode.
Signed-off-by: Sheng Wei
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
---
.../Feature/VTd/IntelVTdDmarPei/IntelVTdDmar.c | 7 +--
.../Feature/VTd/IntelVTdDmarPei
The change is good to me.
Reviewed-by: Sheng Wei
> -Original Message-
> From: Kuo, Ted
> Sent: 2022年2月15日 14:47
> To: devel@edk2.groups.io
> Cc: Sheng, W ; Ni, Ray ; Chaganty,
> Rangasai V ; Huang, Jenny
> ; Kowalewski, Robert
>
> Subject: [PATCH v
to UINTN
IN EFI_ACPI_DMAR_DRHD_HEADER *DmarDrhd
);
And it also related to below 2 functions.
ProcessDrhdPostMemory ()
ProcessDhrdPreMemory ()
Need change the second parameter.
IN UINT32 VTdIndex, // change to UINTN
Thank you
BR
Sheng Wei
> -Original Mess
Only if ECAP_REG.SMTS == 0 and ECAP_REG.bit 24 == 1, use
extended mode address translation.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3826
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
Signed-off-by: Sheng Wei
---
.../Intel/IntelSiliconPkg/Feature/VTd
VTdInfoNotify may be called manay times, PEI DMA buffer should be
generated only once.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3667
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
Reviewed-by: Jenny Huang
Signed-off-by: Sheng Wei
---
.../Feature/VTd
Update VTd register structs accroding to VTd spec ver 3.3
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3765
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
Reviewed-by: Jenny Huang
Signed-off-by: Sheng Wei
---
.../Feature/VTd/IntelVTdDmarPei/IntelVTdDmar.c
: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
Reviewed-by: Jenny Huang
Signed-off-by: Sheng Wei
---
.../Feature/VTd/IntelVTdDmarPei/IntelVTdDmar.c | 43 +-
1 file changed, 26 insertions(+), 17 deletions(-)
diff --git
a/Silicon/Intel/IntelSiliconPkg/Feature/VTd
It is DRHD(DMA Remapping Hardware Unit Definition).
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3622
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
Reviewed-by: Jenny Huang
Reviewed-by: Robert Kowalewski
Signed-off-by: Sheng Wei
---
.../IntelSiliconPkg
Patch v6 update:
[PATCH 4/4] Some basic code refine
[PATCH 4/4] Use a fixed MAX VTdUnitInfo Table size.
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
Signed-off-by: Sheng Wei
Sheng Wei (4):
IntelSiliconPkg/VTd: Fix typos
IntelSiliconPkg/VTd: Update VTd register
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