REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3999
FspResetType will be either 32bit or 64 bit basing on
the build type.
Cc: Nate DeSimone <nathaniel.l.desim...@intel.com>
Cc: Star Zeng <star.z...@intel.com>
Signed-off-by: Chasel Chiu <chasel.c...@intel.com>
---
IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
| 6 +++---
IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
| 10 +++++-----
IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
| 15 +++++++--------
IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c
| 5 ++++-
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
| 2 +-
IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h
| 2 +-
6 files changed, 21 insertions(+), 19 deletions(-)
diff --git a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
index 21385ac0b2..7aa2c93e99 100644
--- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
+++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
@@ -97,7 +97,7 @@ OnPciEnumerationComplete (
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
DEBUG ((DEBUG_INFO, "FSP NotifyPhase AfterPciEnumeration requested reset
0x%x\n", Status));
- CallFspWrapperResetSystem ((UINT32)Status);
+ CallFspWrapperResetSystem (Status);
}
if (Status != EFI_SUCCESS) {
@@ -140,7 +140,7 @@ OnReadyToBoot (
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
DEBUG ((DEBUG_INFO, "FSP NotifyPhase ReadyToBoot requested reset 0x%x\n",
Status));
- CallFspWrapperResetSystem ((UINT32)Status);
+ CallFspWrapperResetSystem (Status);
}
if (Status != EFI_SUCCESS) {
@@ -184,7 +184,7 @@ OnEndOfFirmware (
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
DEBUG ((DEBUG_INFO, "FSP NotifyPhase EndOfFirmware requested reset
0x%x\n", Status));
- CallFspWrapperResetSystem ((UINT32)Status);
+ CallFspWrapperResetSystem (Status);
}
if (Status != EFI_SUCCESS) {
diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
index 047c2965a3..ac27524d08 100644
--- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
@@ -43,16 +43,15 @@ extern EFI_GUID gFspHobGuid;
@return FSP-M UPD Data Address
**/
-
UINTN
GetFspmUpdDataAddress (
VOID
)
{
if (PcdGet64 (PcdFspmUpdDataAddress64) != 0) {
- return (UINTN) PcdGet64 (PcdFspmUpdDataAddress64);
+ return (UINTN)PcdGet64 (PcdFspmUpdDataAddress64);
} else {
- return (UINTN) PcdGet32 (PcdFspmUpdDataAddress);
+ return (UINTN)PcdGet32 (PcdFspmUpdDataAddress);
}
}
@@ -97,7 +96,7 @@ PeiFspMemoryInit (
//
// External UPD is ready, get the buffer from PCD pointer.
//
- FspmUpdDataPtr = (VOID *) GetFspmUpdDataAddress();
+ FspmUpdDataPtr = (VOID *)GetFspmUpdDataAddress ();
ASSERT (FspmUpdDataPtr != NULL);
}
@@ -115,6 +114,7 @@ PeiFspMemoryInit (
DEBUG ((DEBUG_INFO, " BootLoaderTolumSize - 0x%x\n", ((FSPM_UPD_COMMON
*)FspmUpdDataPtr)->FspmArchUpd.BootLoaderTolumSize));
DEBUG ((DEBUG_INFO, " BootMode - 0x%x\n", ((FSPM_UPD_COMMON
*)FspmUpdDataPtr)->FspmArchUpd.BootMode));
}
+
DEBUG ((DEBUG_INFO, " HobListPtr - 0x%x\n", &FspHobListPtr));
TimeStampCounterStart = AsmReadTsc ();
@@ -129,7 +129,7 @@ PeiFspMemoryInit (
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
DEBUG ((DEBUG_INFO, "FspMemoryInitApi requested reset 0x%x\n", Status));
- CallFspWrapperResetSystem ((UINT32)Status);
+ CallFspWrapperResetSystem (Status);
}
if (EFI_ERROR (Status)) {
diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
index fadadd40e6..ee48dd69d3 100644
--- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
@@ -96,7 +96,7 @@ S3EndOfPeiNotify (
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
DEBUG ((DEBUG_INFO, "FSP S3NotifyPhase AfterPciEnumeration requested reset
0x%x\n", Status));
- CallFspWrapperResetSystem ((UINT32)Status);
+ CallFspWrapperResetSystem (Status);
}
NotifyPhaseParams.Phase = EnumInitPhaseReadyToBoot;
@@ -108,7 +108,7 @@ S3EndOfPeiNotify (
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
DEBUG ((DEBUG_INFO, "FSP S3NotifyPhase ReadyToBoot requested reset
0x%x\n", Status));
- CallFspWrapperResetSystem ((UINT32)Status);
+ CallFspWrapperResetSystem (Status);
}
NotifyPhaseParams.Phase = EnumInitPhaseEndOfFirmware;
@@ -120,7 +120,7 @@ S3EndOfPeiNotify (
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
DEBUG ((DEBUG_INFO, "FSP S3NotifyPhase EndOfFirmware requested reset
0x%x\n", Status));
- CallFspWrapperResetSystem ((UINT32)Status);
+ CallFspWrapperResetSystem (Status);
}
return EFI_SUCCESS;
@@ -186,16 +186,15 @@ FspSiliconInitDoneGetFspHobList (
@return FSP-S UPD Data Address
**/
-
UINTN
GetFspsUpdDataAddress (
VOID
)
{
if (PcdGet64 (PcdFspsUpdDataAddress64) != 0) {
- return (UINTN) PcdGet64 (PcdFspsUpdDataAddress64);
+ return (UINTN)PcdGet64 (PcdFspsUpdDataAddress64);
} else {
- return (UINTN) PcdGet32 (PcdFspsUpdDataAddress);
+ return (UINTN)PcdGet32 (PcdFspsUpdDataAddress);
}
}
@@ -310,7 +309,7 @@ PeiMemoryDiscoveredNotify (
SourceData = (UINTN *)((UINTN)FspsHeaderPtr->ImageBase +
(UINTN)FspsHeaderPtr->CfgRegionOffset);
CopyMem (FspsUpdDataPtr, SourceData, (UINTN)FspsHeaderPtr->CfgRegionSize);
} else {
- FspsUpdDataPtr = (FSPS_UPD_COMMON *) GetFspsUpdDataAddress();
+ FspsUpdDataPtr = (FSPS_UPD_COMMON *)GetFspsUpdDataAddress ();
ASSERT (FspsUpdDataPtr != NULL);
}
@@ -327,7 +326,7 @@ PeiMemoryDiscoveredNotify (
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
DEBUG ((DEBUG_INFO, "FspSiliconInitApi requested reset 0x%x\n", Status));
- CallFspWrapperResetSystem ((UINT32)Status);
+ CallFspWrapperResetSystem (Status);
}
if (EFI_ERROR (Status)) {
diff --git
a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c
b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c
index 591a5c7a55..22e009ace3 100644
--- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c
+++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c
@@ -121,6 +121,10 @@ Execute32BitCode (
//
AsmReadIdtr (&Idtr);
Status = AsmExecute32BitCode (Function, Param1, Param2, &mGdt);
+ //
+ // Convert FSP Status code from 32bit to 64bit to match caller expectation.
+ //
+ Status = (Status & ~(BIT31 + BIT30)) | LShiftU64 (Status & (BIT31 + BIT30),
32);
AsmWriteIdtr (&Idtr);
return Status;
@@ -150,4 +154,3 @@ Execute64BitCode (
return Status;
}
-
diff --git
a/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
index fa7d60c292..00b4799fb4 100644
---
a/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
+++
b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
@@ -86,7 +86,7 @@ GetS3MemoryInfo (
VOID
EFIAPI
CallFspWrapperResetSystem (
- IN UINT32 FspStatusResetType
+ IN EFI_STATUS FspStatusResetType
)
{
//
diff --git a/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h
b/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h
index a6ade2551e..fe9f0d7408 100644
--- a/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h
+++ b/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h
@@ -74,7 +74,7 @@ GetS3MemoryInfo (
VOID
EFIAPI
CallFspWrapperResetSystem (
- IN UINT32 FspStatusResetType
+ IN EFI_STATUS FspStatusResetType
);
#endif
--
2.35.0.windows.1
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