BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275
The OvmfPkgX86 build reserves memory regions in MEMFD. The memory regions
get accessed in the SEC phase. AMD SEV-SNP require that the guest's
private memory be accepted or validated before access.
Introduce a Guided metadata structure that describes the reserved memory
regions. The VMM can locate the metadata structure by iterating through
the reset vector guid and process the areas based on the platform
specific requirements.
Cc: Michael Roth <michael.r...@amd.com>
Cc: James Bottomley <j...@linux.ibm.com>
Cc: Min Xu <min.m...@intel.com>
Cc: Jiewen Yao <jiewen....@intel.com>
Cc: Tom Lendacky <thomas.lenda...@amd.com>
Cc: Jordan Justen <jordan.l.jus...@intel.com>
Cc: Ard Biesheuvel <ardb+tianoc...@kernel.org>
Cc: Erdem Aktas <erdemak...@google.com>
Cc: Gerd Hoffmann <kra...@redhat.com>
Acked-by: Gerd Hoffmann <kra...@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.si...@amd.com>
---
OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm | 14 ++++++++
OvmfPkg/ResetVector/ResetVector.nasmb | 1 +
OvmfPkg/ResetVector/X64/OvmfSevMetadata.asm | 34 ++++++++++++++++++++
3 files changed, 49 insertions(+)
create mode 100644 OvmfPkg/ResetVector/X64/OvmfSevMetadata.asm
diff --git a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
index dee2e3f9de31..12f2cedd6767 100644
--- a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
+++ b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
@@ -64,6 +64,20 @@ tdxMetadataOffsetStart:
DB 0x86, 0x5e, 0x46, 0x85, 0xa7, 0xbf, 0x8e, 0xc2
tdxMetadataOffsetEnd:
+;
+; SEV metadata descriptor
+;
+; Provide the start offset of the metadata blob within the OVMF binary.
+
+; GUID : dc886566-984a-4798-A75e-5585a7bf67cc
+;
+OvmfSevMetadataOffsetStart:
+ DD (fourGigabytes - OvmfSevMetadataGuid)
+ DW OvmfSevMetadataOffsetEnd - OvmfSevMetadataOffsetStart
+ DB 0x66, 0x65, 0x88, 0xdc, 0x4a, 0x98, 0x98, 0x47
+ DB 0xA7, 0x5e, 0x55, 0x85, 0xa7, 0xbf, 0x67, 0xcc
+OvmfSevMetadataOffsetEnd:
+
%endif
; SEV Hash Table Block
diff --git a/OvmfPkg/ResetVector/ResetVector.nasmb
b/OvmfPkg/ResetVector/ResetVector.nasmb
index 87effedb9c60..d847794feadb 100644
--- a/OvmfPkg/ResetVector/ResetVector.nasmb
+++ b/OvmfPkg/ResetVector/ResetVector.nasmb
@@ -109,6 +109,7 @@
%include "Ia32/AmdSev.asm"
%include "Ia32/PageTables64.asm"
%include "Ia32/IntelTdx.asm"
+%include "X64/OvmfSevMetadata.asm"
%endif
%include "Ia16/Real16ToFlat32.asm"
diff --git a/OvmfPkg/ResetVector/X64/OvmfSevMetadata.asm
b/OvmfPkg/ResetVector/X64/OvmfSevMetadata.asm
new file mode 100644
index 000000000000..9d8c3e8194a4
--- /dev/null
+++ b/OvmfPkg/ResetVector/X64/OvmfSevMetadata.asm
@@ -0,0 +1,34 @@
+;-----------------------------------------------------------------------------
+; @file
+; OVMF metadata for the AMD SEV confidential computing guests
+;
+; Copyright (c) 2021, AMD Inc. All rights reserved.<BR>
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;-----------------------------------------------------------------------------
+
+BITS 64
+
+%define OVMF_SEV_METADATA_VERSION 1
+
+; The section must be accepted or validated by the VMM before the boot
+%define OVMF_SECTION_TYPE_SNP_SEC_MEM 0x1
+
+ALIGN 16
+
+TIMES (15 - ((OvmfSevGuidedStructureEnd - OvmfSevGuidedStructureStart + 15) %
16)) DB 0
+
+OvmfSevGuidedStructureStart:
+;
+; OvmfSev metadata descriptor
+;
+OvmfSevMetadataGuid:
+
+_DescriptorSev:
+ DB 'A','S','E','V' ; Signature
+ DD OvmfSevGuidedStructureEnd - _DescriptorSev ; Length
+ DD OVMF_SEV_METADATA_VERSION ; Version
+ DD (OvmfSevGuidedStructureEnd - _DescriptorSev - 16) / 12 ; Number of
sections
+
+OvmfSevGuidedStructureEnd:
+ ALIGN 16
--
2.25.1
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