Thanks for clarification!
In this case, please use "mov rsp, rcx" to support 64bit addressing.
Thanks,
Chasel
> -Original Message-
> From: Duggapu, Chinni B
> Sent: Tuesday, May 17, 2022 12:33 AM
> To: Chiu, Chasel ; devel@edk2.groups.io
> Cc: Desimone, Nathaniel L ; Zeng, Star
> ; S,
HI Chasel,
Yes, we don't need to modify esp for LoadMicrocodeDefault. However, this
function does couple of MSR Accesses in b/w that would lead to modify RCX
anyway.
So, if not RSP, we need to use different register to save RCX and consume in
the whole function.
That's why I have not changed t
Thanks for correcting format and updating patch per feedbacks!
Just one more comment below inline and please also help to include patch of
IntelFsp2WrapperPkg\Library\SecFspWrapperPlatformSecLibSample\X64\SecEntry.nasm
for passing API parameter by RCX.
You might want to create a patch series:
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3926
This API accept one parameter using RCX and this is consumed
in mutiple sub functions.
Cc: Chasel Chiu
Cc: Nate DeSimone
Cc: Star Zeng
Cc: Ashraf Ali S
Signed-off-by: cbduggap
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IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm | 26 +
