Hitherto SoC library of Armada7k8k was missing AP and CP-MSS
I2C controllers. Fix that and update Armada70x0Db and
Armada80x0Db I2C description accordingly.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
| 4 ++--
Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
| 2 +-
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
| 8 ++++++--
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
| 5 ++++-
4 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
index e8cd177..01532b4 100644
--- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
+++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
@@ -94,9 +94,9 @@
# I2C
gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0x50, 0x57, 0x60, 0x21 }
gMarvellTokenSpaceGuid.PcdI2cSlaveBuses|{ 0x0, 0x0, 0x0, 0x0 }
- gMarvellTokenSpaceGuid.PcdI2cControllersEnabled|{ 0x1, 0x1 }
+ gMarvellTokenSpaceGuid.PcdI2cControllersEnabled|{ 0x0, 0x1, 0x1 }
gMarvellTokenSpaceGuid.PcdEepromI2cAddresses|{ 0x50, 0x57 }
- gMarvellTokenSpaceGuid.PcdEepromI2cBuses|{ 0x0, 0x0 }
+ gMarvellTokenSpaceGuid.PcdEepromI2cBuses|{ 0x1, 0x1 }
gMarvellTokenSpaceGuid.PcdI2cClockFrequency|250000000
gMarvellTokenSpaceGuid.PcdI2cBaudRate|100000
gMarvellTokenSpaceGuid.PcdI2cBusCount|2
diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
index 8e8c2ba..a28e330 100644
--- a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
+++ b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
@@ -103,7 +103,7 @@
# I2C
gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0x50, 0x57, 0x50, 0x57, 0x21,
0x25 }
gMarvellTokenSpaceGuid.PcdI2cSlaveBuses|{ 0x0, 0x0, 0x1, 0x1, 0x0, 0x0 }
- gMarvellTokenSpaceGuid.PcdI2cControllersEnabled|{ 0x1, 0x0, 0x1 }
+ gMarvellTokenSpaceGuid.PcdI2cControllersEnabled|{ 0x0, 0x1, 0x0, 0x0, 0x1 }
gMarvellTokenSpaceGuid.PcdEepromI2cAddresses|{ 0x50, 0x57, 0x50, 0x57 }
gMarvellTokenSpaceGuid.PcdEepromI2cBuses|{ 0x0, 0x0, 0x1, 0x1 }
gMarvellTokenSpaceGuid.PcdI2cClockFrequency|250000000
diff --git
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
index c2d7933..8bbc5b0 100644
---
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
+++
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
@@ -56,8 +56,12 @@
//
// Platform description of I2C controllers
//
-#define MV_SOC_I2C_PER_CP_COUNT 2
-#define MV_SOC_I2C_BASE(I2c) (0x701000 + ((I2c) * 0x100))
+#define MV_SOC_I2C_PER_AP_COUNT 1
+#define MV_SOC_I2C_AP_BASE (MV_SOC_AP806_BASE + 0x511000)
+#define MV_SOC_I2C_PER_CP_COUNT 3
+#define MV_SOC_I2C_BASE(I2c) ((I2c < 2) ? \
+ (0x701000 + (I2c) * 0x100) : \
+ 0x211000)
//
// Platform description of ICU (Interrupt Consolidation Unit) controllers
diff --git
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
index 584f445..355be64 100644
---
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
+++
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -157,7 +157,7 @@ ArmadaSoCDescI2cGet (
CpCount = FixedPcdGet8 (PcdMaxCpCount);
- *DescCount = CpCount * MV_SOC_I2C_PER_CP_COUNT;
+ *DescCount = CpCount * MV_SOC_I2C_PER_CP_COUNT + MV_SOC_I2C_PER_AP_COUNT;
Desc = AllocateZeroPool (*DescCount * sizeof (MV_SOC_I2C_DESC));
if (Desc == NULL) {
DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
@@ -166,6 +166,9 @@ ArmadaSoCDescI2cGet (
*I2cDesc = Desc;
+ Desc->I2cBaseAddress = MV_SOC_I2C_AP_BASE;
+ Desc++;
+
for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
for (Index = 0; Index < MV_SOC_I2C_PER_CP_COUNT; Index++) {
Desc->I2cBaseAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_I2C_BASE
(Index);
--
2.7.4
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