On Wed, Sep 04, 2019 at 06:43:11PM +0800, Abner Chang wrote:
> The driver produces RISC-V EFI_CPU_ARCH_PROTOCOL and use RISC-V platform
> level timer library
>
> Due to RISC-V timer CSR is platform implementation specific, RISC-V CPU DXE
> driver invokes platform level timer library
> to access
The driver produces RISC-V EFI_CPU_ARCH_PROTOCOL and use RISC-V platform level
timer library
Due to RISC-V timer CSR is platform implementation specific, RISC-V CPU DXE
driver invokes platform level timer library
to access to timer CSRs.
Contributed-under: TianoCore Contribution Agreement 1.0
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