subject:"\[edk2\-devel\] \[edk2\-staging\/RISC\-V\-V2 PATCH v2 15\/29\] RiscVPkg\/Library\: RISC\-V CPU library"

Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 15/29] RiscVPkg/Library: RISC-V CPU library

2019-10-14 Thread Abner Chang

> -Original Message- > From: Leif Lindholm [mailto:leif.lindh...@linaro.org] > Sent: Tuesday, October 1, 2019 2:31 AM > To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist) > > Subject: Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 15/29] > RiscVPk

Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 15/29] RiscVPkg/Library: RISC-V CPU library

2019-09-30 Thread Leif Lindholm

On Mon, Sep 23, 2019 at 08:31:41AM +0800, Abner Chang wrote: > This library provides CSR assembly functions to read/write RISC-V > specific Control and Status registers. > > Signed-off-by: Abner Chang > --- > RiscVPkg/Include/Library/RiscVCpuLib.h | 68 >

[edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 15/29] RiscVPkg/Library: RISC-V CPU library

2019-09-22 Thread Abner Chang

This library provides CSR assembly functions to read/write RISC-V specific Control and Status registers. Signed-off-by: Abner Chang --- RiscVPkg/Include/Library/RiscVCpuLib.h | 68 RiscVPkg/Library/RiscVCpuLib/Cpu.S | 115 +++