Fill in the basic requirements of the SMBIOS specification by specifying
the minimum required structures. The basic fixup is performed.
CPU/DRAM frequency is obtained via SampleAtResetlib and the DRAM size
is calculated from the information stored in the HOB list.
Add new Armada SmbiosPlatformDxe
Hi Sean,
You have addressed all the feedback for this RFC.
I have created the edk2-pytool-library repository.
Mike
From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Sean via
Groups.Io
Sent: Friday, May 31, 2019 10:40 AM
To: Sean ; devel@edk2.groups.io
Subject: Re:
Jeremy,
pt., 31 maj 2019 o 22:08 Jeremy Linton napisał(a):
>
>
> Hi,
>
> So I told myself not to debug this, but did anyway. Its because edk2 is
> advertising a > smbios 3.1 table. SMBIOS 3.1 adds
>
> //
>// Add for smbios 3.1.0
>//
>UINT32MaximumCacheSize2;
>
On Fri, May 31, 2019 at 11:01:15PM +0200, Ard Biesheuvel wrote:
> The upstream SoftFloat code that was recently incorporated into
> ArmSoftFloatLib uses some parameterization to tweak the inlining
> and optimization behavior for different compilers.
>
> The custom platform.h file that sets these
The upstream SoftFloat code that was recently incorporated into
ArmSoftFloatLib uses some parameterization to tweak the inlining
and optimization behavior for different compilers.
The custom platform.h file that sets these parameters is based on
the upstream version for Linux/ARM, but was updated
Hi,
So I told myself not to debug this, but did anyway. Its because edk2 is
advertising a > smbios 3.1 table. SMBIOS 3.1 adds
//
// Add for smbios 3.1.0
//
UINT32MaximumCacheSize2;
UINT32InstalledSize2;
} SMBIOS_TABLE_TYPE7;
which means that
Hi Leif,
As Liming outlined last night, we were waiting for this
fix to start the hard freeze period. Please keep us
informed of your progress on your CI issue and it can
be fixed during the hard freeze.
Thanks,
Mike
> -Original Message-
> From: devel@edk2.groups.io
>
On Fri, May 31, 2019 at 04:21:19PM +, Kinney, Michael D wrote:
> Ard,
>
> Thank you for all the hard work on this issue.
I concur.
*However*, please hold back on tagging the stable release. Something
that looks related has broken our CI.
Regards,
Leif
> I will do one additional patch for
On Fri, May 31, 2019 at 06:20:19PM +0200, Marcin Wojtas wrote:
> Fill in the basic requirements of the SMBIOS specification by specifying
> the minimum required structures. The basic fixup is performed.
> CPU/DRAM frequency is obtained via SampleAtResetlib and the DRAM size
> is calculated from
Hi,
On 5/31/19 1:04 PM, Marcin Wojtas wrote:
Hi Jeremy,
Thanks for a quick test!
1. Cache sizes - here's the dmidecode output
Handle 0x1000, DMI type 7, 27 bytes
Cache Information
Socket Designation: L1 Instruction
[...]
Installed Size: 48 kB
[...]
Handle 0x1001, DMI type 7, 27 bytes
Cache
Hi Jeremy,
Thanks for a quick test!
1. Cache sizes - here's the dmidecode output
Handle 0x1000, DMI type 7, 27 bytes
Cache Information
Socket Designation: L1 Instruction
[...]
Installed Size: 48 kB
[...]
Handle 0x1001, DMI type 7, 27 bytes
Cache Information
Socket Designation: L1 Data
[...]
One final update as requested. Changing the repo name and pip module to
*edk2-pytool-library*
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Hi,
I'm super in favor of this, but.. I noticed while trying to test it that
the cache sizes being displayed by dmidecode don't seem to match what is
in this table, implying something doesn't appear to be 100% correct.
Also, while its understandable all the missing serial/chassis/etc
On Fri, May 31, 2019 at 01:46:14AM +, Gao, Zhichao wrote:
> > So what modifications were made to the code on the way from the project
> > Mu repository? That would be useful to mention in the commit message.
>
> I would add this info blow commit message(not in commit message). It
> is helpful
Ard,
Thank you for all the hard work on this issue.
I will do one additional patch for the top level
Readme.md to list this additional submodule.
Thanks,
Mike
> -Original Message-
> From: devel@edk2.groups.io
> [mailto:devel@edk2.groups.io] On Behalf Of Ard
> Biesheuvel
> Sent:
Fill in the basic requirements of the SMBIOS specification by specifying
the minimum required structures. The basic fixup is performed.
CPU/DRAM frequency is obtained via SampleAtResetlib and the DRAM size
is calculated from the information stored in the HOB list.
Add new Armada SmbiosPlatformDxe
On Fri, 31 May 2019 at 15:09, Leif Lindholm wrote:
>
> On Fri, May 31, 2019 at 02:49:51PM +0200, Ard Biesheuvel wrote:
> > Currently, our move to OpenSSL 1.1.1b is being blocked by an issue in
> > the ARM software floating point library, which lacks some intrinsics
> > that the ARM EABI spec
On Fri, 31 May 2019 at 15:49, Leif Lindholm wrote:
>
> On Fri, May 31, 2019 at 03:39:33PM +0200, Ard Biesheuvel wrote:
> > On Fri, 31 May 2019 at 15:26, Leif Lindholm
> > wrote:
> > >
> > > On Fri, May 31, 2019 at 03:22:25PM +0200, Ard Biesheuvel wrote:
> > > > > > + GCC:*_*_*_CC_FLAGS =
On Fri, May 31, 2019 at 03:39:33PM +0200, Ard Biesheuvel wrote:
> On Fri, 31 May 2019 at 15:26, Leif Lindholm wrote:
> >
> > On Fri, May 31, 2019 at 03:22:25PM +0200, Ard Biesheuvel wrote:
> > > > > + GCC:*_*_*_CC_FLAGS = -fno-lto -ffreestanding -Wno-unused-label
> > > >
> > > > Hmm. You add
On Fri, 31 May 2019 at 15:26, Leif Lindholm wrote:
>
> On Fri, May 31, 2019 at 03:22:25PM +0200, Ard Biesheuvel wrote:
> > > > + GCC:*_*_*_CC_FLAGS = -fno-lto -ffreestanding -Wno-unused-label
> > >
> > > Hmm. You add -ffreestanding here, but you also add it to the CLANG
> > > profiles in 4/7.
On Fri, May 31, 2019 at 03:22:25PM +0200, Ard Biesheuvel wrote:
> > > + GCC:*_*_*_CC_FLAGS = -fno-lto -ffreestanding -Wno-unused-label
> >
> > Hmm. You add -ffreestanding here, but you also add it to the CLANG
> > profiles in 4/7. Could we do one of:
> > - dropping this one, adding -ffreestanding
On Fri, 31 May 2019 at 15:20, Leif Lindholm wrote:
>
> On Fri, May 31, 2019 at 02:49:53PM +0200, Ard Biesheuvel wrote:
> > diff --git a/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf
> > b/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf
> > index cbb49f49ade6..4d0c94df83db 100644
> > ---
On Fri, May 31, 2019 at 02:49:53PM +0200, Ard Biesheuvel wrote:
> diff --git a/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf
> b/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf
> index cbb49f49ade6..4d0c94df83db 100644
> --- a/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf
> +++
On Fri, May 31, 2019 at 02:49:51PM +0200, Ard Biesheuvel wrote:
> Currently, our move to OpenSSL 1.1.1b is being blocked by an issue in
> the ARM software floating point library, which lacks some intrinsics
> that the ARM EABI spec defines.
>
> Since the code was in pretty sorry state, let's fix
The usual pattern of defining a protocol in EDK2 is
typedef struct _FOO_PROTOCOL FOO_PROTOCOL;
struct _FOO_PROTOCOL {
...
};
However, in the definition of EDKII_PECOFF_IMAGE_EMULATOR_PROTOCOL,
we are deviating from this for no good reason, and instead, the
struct
Update the INF description and the top level .c files in order to
switch to the new version of the SoftFloat library imported as a
Git submodule in the previous patch.
Note that we no longer use the code that travelled a long way from
the 2002 version of the softfloat library via NetBsd and the
The usual pattern of defining a protocol in EDK2 is
typedef struct _FOO_PROTOCOL FOO_PROTOCOL;
struct _FOO_PROTOCOL {
...
};
However, in the definition of EFI_HII_POPUP_PROTOCOL and
EFI_RESET_NOTIFICATION_PROTOCOL, we are deviating from this for no
good reason, and
In preparation of bringing ArmSoftFloatLib up to date in order
to provide some missing routines, import the Berkely SoftFloat
library into the tree as a git submodule.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1845
Acked-by: Jian J Wang
Acked-by: Laszlo Ersek
Signed-off-by: Ard
Clang 7 complains about the vmsr instruction in ArmV7Support.S,
which is only available on cores that implement some flavour of
VFP. So set the .fpu to NEON like we do in some other places.
Acked-by: Laszlo Ersek
Signed-off-by: Ard Biesheuvel
---
ArmPkg/Library/ArmLib/Arm/ArmV7Support.S | 2 ++
When building OpenSSL for ARM or AARCH64 with recent Clang, the following
error may result:
In file included from
.../CryptoPkg/Library/BaseCryptLib/Pk/CryptPkcs7VerifyEku.c:18:
In file included from
.../CryptoPkg/Library/OpensslLib/openssl/crypto/include/internal/x509_int.h:10:
In file
Currently, our move to OpenSSL 1.1.1b is being blocked by an issue in
the ARM software floating point library, which lacks some intrinsics
that the ARM EABI spec defines.
Since the code was in pretty sorry state, let's fix this by upgrading
to the very latest version of the core library this code
From: "Chasel, Chiu"
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1865
To support FSP Dispatch mode, PlatformSecLib should
consume FSP_TEMP_RAM_EXIT_PPI to disable temporary
memory, and also report PeiCoreFvLocation PPI to
SecMain so PeiCore form FSP-M can be launched.
Test: API mode no
To support Dispatch mode PlatformSecLib needs:
1. Report PeiCoreFvLocationPPI to SecMain so PeiCore from FSP-M can be loaded.
2. Consume FspTempRamExitPpi produced by FSP to disable temporary memory.
0001-KabylakeSiliconPkg: Add FspTempRamExitPpi
0002-KabylakeOpenBoardPkg: Report
From: "Chasel, Chiu"
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1865
To support FSP Dispatch mode, PlatformSecLib should
consume FSP_TEMP_RAM_EXIT_PPI to disable temporary
memory. This patch added the definition of this
FSP_TEMP_RAM_EXIT_PPI.
Test: API mode no impact and can still
From: "Chasel, Chiu"
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1864
FSP Dispatch mode can consume DynamicEx PCD from
boot loader so it must include those PCD in PCD database
for FSP to consume.
PeiPostMemSiliconPolicyInitLib.inf (this is for FSP
Dispatch mode) has all PCDs included to
From: "Chasel, Chiu"
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1864
Cleaned up unused PciExpress related PCD from INF and
remove unnecessary DEFINE from DSC.
Defines some PCDs as different types per API mode or
Dispatch mode, also enlarge PeiMemory for Dispatch mode
as both FSP and
FSP Dispatch mode can consume DynamicEx PCDs from boot loader side
so boot loader must build those PCDs into PcdDatabase.
0001-KabylakeSiliconPkg: Support DynamicExPCD from FSP.
0002-KabylakeOpenBoardPkg: Support DynamicExPCD from FSP.
Cc: Michael A Kubacki
Cc: Sai Chaganty
Cc: Nate DeSimone
On Thu, May 30, 2019 at 05:34:23AM +, Loh, Tien Hock wrote:
> > Also, we should look into having the DT provided by the firmware
> > instead of passed on the command line.
> >
> > And manually specifying console is very 2014 - use stdout-path in
> > the DT.
>
> Yeah I'll be looking into it.
The patch fixes the bug that the memory under 1MB is modified by
firmware in S3 boot.
Root cause is a racing condition in MpInitLib:
1. BSP: WakeUpByInitSipiSipi is set by NotifyOnS3SmmInitDonePpi()
2. BSP: WakeUpAP() wakes all APs to run certain procedure.
2.1. AllocateResetVector() uses <1MB
On Fri, 31 May 2019 at 11:14, Ooi, Tzy Way wrote:
>
> Thanks Biesheuvel.
>
> I would like to confirm with you on regards of one of the comment. There is
> one comment where you mentioned that:
> "I am aware that TX is usually the hot path in UEFI, but we should still try
> to map a buffer
Thanks Biesheuvel.
I would like to confirm with you on regards of one of the comment. There is one
comment where you mentioned that:
"I am aware that TX is usually the hot path in UEFI, but we should still try to
map a buffer directly rather than copy the contents into uncached memory"
I would
On Wed, 29 May 2019 at 13:37, Anthony PERARD wrote:
>
> The macro SERIAL_DXE_FILE_GUID is already been defined twice and the GUID is
> been used once without defining the macro. This patch series define the macro
> in MdeModulePkg where the SerialDxe is, and replace all other use by this new
>
Hello All:
In specific platforms with specific NW Controllers, the boot time is getting
increased when NWStack enabled without LAN. The time taken to boot with media
not connected is lower than media not connected.
When tried to get more information on this behavior, it was noted that it took
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1861
1. Implement OpenSSL SM3 wrapped functions in CryptSm3.c file.
2. Add wrapped SM3 functions declaration to BaseCryptLib.h file.
3. Add CryptSm3.c to each module information file.
Cc: Jian J Wang
Signed-off-by: Xiaoyu Lu
Reviewed-by: Jian
Would you please clarify what "sample" here really means? Not for production?
Or something else?
Thank you
Yao Jiewen
From: Dong, Eric
Sent: Friday, May 31, 2019 4:02 PM
To: Yao, Jiewen ; devel@edk2.groups.io; Gao, Liming
; Kubacki, Michael A ; Oram,
Isaac W ; Kinney, Michael D
Subject: RE:
Thanks.
Pushed via commit e2afc8ab59.
Best Regards,
Hao Wu
From: Ni, Ray [mailto:ray...@intel.com]
Sent: Friday, May 31, 2019 10:57 AM
To: Wu; Wu, Hao A; devel@edk2.groups.io
Subject: Re: [edk2-devel] [PATCH v1] MdeModulePkg/AhciPei: Fix device cannot be
found in non-S3 path
Reviewed-by: Ray
Would you please clarify the position of SecuritySamplePkg ?
What is the difference between SecurityPkg and SecuritySamplePkg ?
Thank you
Yao Jiewen
From: Dong, Eric
Sent: Friday, May 31, 2019 3:46 PM
To: devel@edk2.groups.io; Gao, Liming ; Kubacki, Michael
A ; Oram, Isaac W ;
Kinney, Michael
Isaac, Jiewen & Mike,
I plan to add a new driver named UserAuthentication. This driver shows a sample
implementation about how to control user enter setup page. I plan to add a new
package in Platform\Intel folder to save this driver. New package name is
SecuritySamplePkg. Any comments for
Xiaoyu,
Two small issues below. With them fixed,
Reviewed-by: Jian J Wang
> -Original Message-
> From: Lu, XiaoyuX
> Sent: Thursday, May 30, 2019 4:24 PM
> To: devel@edk2.groups.io
> Cc: Wang, Jian J
> Subject: [PATCH v1 1/1] CryptoPkg/BaseCryptLib: Wrap OpenSSL SM3 algorithm
>
>
Reviewed-by: Liming Gao
>-Original Message-
>From: Chiu, Chasel
>Sent: Friday, May 31, 2019 3:09 PM
>To: devel@edk2.groups.io
>Cc: Gao, Liming
>Subject: [PATCH] IntelFsp2Pkg/SplitFspBin.py: Revert FSP 1.x support.
>
>This reverts commit:
> 591b8cb7f3d026d2fa4483c59f3d5fb14be181bf.
This reverts commit:
591b8cb7f3d026d2fa4483c59f3d5fb14be181bf.
Will submit again after freeze done.
Cc: Liming Gao
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Tools/SplitFspBin.py | 21
-
IntelFsp2Pkg/Tools/UserManuals/SplitFspBinUserManual.md | 47
Cc: Liming Gao
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Tools/SplitFspBin.py | 21
-
IntelFsp2Pkg/Tools/UserManuals/SplitFspBinUserManual.md | 47
++-
2 files changed, 30 insertions(+), 38 deletions(-)
> -Original Message-
> From: Kinney, Michael D
> Sent: Wednesday, May 29, 2019 12:49 AM
> To: devel@edk2.groups.io; Zhang, Shenglei ;
> Kinney, Michael D
> Subject: RE: [edk2-devel] [PATCH] BaseTools/GenBiosId: Add a new tool
> GenBiosId
>
> Could this tools be ported to Python using
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