Add global variable mVariableRtCacheInfo to save the
content in gEdkiiVariableRuntimeCacheInfoHobGuid. With
this new global variable, 7 global variables can be
removed.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Liming Gao
Cc: Jiaxin Wu
---
Refine the code logic in InitVariableCache().
In this commit, three times calling of
InitVariableCache() for different type cache are
merged into one calling. This commit is to make
the code looks cleaner and doesn't change any
code functionality.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Liming
Consume gEdkiiVariableRuntimeCacheInfoHobGuid in
VariableSmmRuntimeDxe driver to initialize the following
variable cache related buffer:
*mVariableRuntimeHobCacheBuffer
*mVariableRuntimeNvCacheBuffer
*mVariableRuntimeVolatileCacheBuffer
*mVariableRuntimeCachePendingUpdate
Remove the two unnecessary global variables and
replace them by two local variables:
mVariableRuntimeNvCacheBufferSize
mVariableRuntimeVolatileCacheBufferSize
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Liming Gao
Cc: Jiaxin Wu
---
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
Install the callback of gEfiPeiMemoryDiscoveredPpiGuid
to create gEdkiiVariableRuntimeCacheInfoHobGuid in
VariablePei module. When PcdEnableVariableRuntimeCache
is TRUE, the callback will be installed to allocate
the needed buffer for different type variable runtime
cache, unblock the buffer and
Add MmUnblockMemoryLib in EmulatorPkg.dsc.
This lib will be required by VariablePei in
following commits.
Signed-off-by: Dun Tan
Cc: Andrew Fish
Cc: Ray Ni
---
EmulatorPkg/EmulatorPkg.dsc | 1 +
1 file changed, 1 insertion(+)
diff --git a/EmulatorPkg/EmulatorPkg.dsc
Add MmUnblockMemoryLib in OvmfPkgIa32X64.dsc.
This lib will be required by VariablePei in
following commits.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
---
OvmfPkg/OvmfPkgIa32X64.dsc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Add MmUnblockMemoryLib in ArmVirtCloudHv.dsc.
This lib will be required by VariablePei in
following commits.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Gerd Hoffmann
---
ArmVirtPkg/ArmVirtCloudHv.dsc | 2 ++
1 file changed, 2 insertions(+)
This commit defines VARIABLE_RUNTIME_CACHE_INFO HOB.
The HOB is used to store the address and size of the
buffer that will be used for variable runtime service
when the PcdEnableVariableRuntimeCache is TRUE.
In following patches, when PcdEnableVariableRuntimeCache
is TRUE, VariablePei module will
This patch set defines a new VARIABLE_RUNTIME_CACHE_INFO HOB. The HOB is used
to store the address and size of the buffer that will be used for variable
runtime service when the PcdEnableVariableRuntimeCache is TRUE.
In following patches, when PcdEnableVariableRuntimeCache is TRUE, VariablePei
Remove GetAcpiCpuData() in CpuS3.c. The mAcpiCpuData
is not needed in S3 boot anymore.
Signed-off-by: Dun Tan
Reviewed-by: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Jiaxin Wu
---
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 243
Remove the unneeded assignment of MpService2Ppi field
in SmmS3ResumeState. Previously, when the execution
combination of PEI and DXE are the same, the pointer
of mpservice ppi will be passed to CpuS3.c in smm cpu
driver to wakeup all APs, instead of init-sipi-sipi.
Currently, CpuS3.c doesn't need
This MpService2Ppi field in SMM_S3_RESUME_STATE is used to
wakeup AP to do the CPU initialization during smm s3 boot when
the execution mode of PEI and DXE are the same.
Currently, in CpuS3.c of smm cpu driver, BSP doesn't need to
wakeup AP anymore. The initialization for AP will be done in
After the code to load mtrr setting, set register table,
handle APIC setting and Interrupt after INIT-SIPI-SIPI
is moved, the InitializeCpuProcedure() only contains
following code logic:
1.Bsp runs ExecuteFirstSmiInit().
2.Bsp transfers AP to safe hlt-loop
During S3 boot, since APs will be
Remove ProgramVirtualWireMode()/DisableLvtInterrupts()
since APs won't be waken by INIT-SIPI-SIPI in CpuS3.c
any more. The two functions has been executed in
MpInitLibInitialize() in PeiMplib.
Signed-off-by: Dun Tan
Reviewed-by: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Jiaxin Wu
---
In this commit, change PeiMpLib to install callback
of gEdkiiEndOfS3ResumeGuid to relocate AP to new safe
buffer. The gEdkiiEndOfS3ResumeGuid is installed in
S3Resume.c before jmping to OS waking vector.
Previously, code in CpuS3.c of PiSmmCpuDxe driver will
prepare the new safe buffer for AP and
Install gEdkiiEndOfS3ResumeGuid in S3Resume to trigger
callback registered by PeiMpLib. The callback is to
relocate Ap to new safe memory before jump to OS waking
vector in S3 boot flow.
Signed-off-by: Dun Tan
Reviewed-by: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Jiaxin Wu
---
Move some code in DxeMpLib.C to common MpLib.c.
The related code is to relocate Ap to new safe buffer
before booting into OS. In next commits, these code
also will be used by PeiMpLib. This commit doesn't
change any code functionality.
Signed-off-by: Dun Tan
Reviewed-by: Ray Ni
Cc: Rahul Kumar
Abstract some DxeMpLib code to function in this commit.
Some of these internal functions will be moved to common
MpLib.c in following commits. Then PeiMpLib can reuse
the code.
Signed-off-by: Dun Tan
Reviewed-by: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Jiaxin Wu
---
Disable paging in IA32 RelocateApLoop assembly
code to fix the issue that the AP page table is
unavailiable after boot OS under IA32 execution mode.
This issue exist in IA32 PEI + IA32 DXE normal boot
(also S3 boot with IA32 PEI after previous three commits
are accepted). In current MpLib code,
Remove code to set register table in CpuS3.c.
In previous commit, PcdCpuFeaturesInitOnS3Resume
has been set to TRUE. So that CpuFeaturesPei PEIM
will initialize the CPU registers and perform CPU
features initialization.
Signed-off-by: Dun Tan
Reviewed-by: Ray Ni
Cc: Rahul Kumar
Cc: Gerd
Set PcdCpuFeaturesInitOnS3Resume to TRUE. So that
CpuFeaturesPei PEIM will initialize the CPU registers
and perform CPU features initialization.
Signed-off-by: Dun Tan
Reviewed-by: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Jiaxin Wu
---
UefiCpuPkg/UefiCpuPkg.dec | 4 ++--
1 file changed,
Remove code to load mtrr setting in CpuS3.c.
In previous commits, before transferring to
CpuS3.c, MTRR setting has been loaded in
S3RestoreConfig2() for all CPU.
Signed-off-by: Dun Tan
Reviewed-by: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Jiaxin Wu
---
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
Save MTRR by lockbox in CpuS3DataDxe. In S3 boot,
The MTRR setting will be restored in S3Resume.c
in following patches. Then S3Resume.c will wakeup
all APs to load the MTRR setting. This can avoid
waking up APs in CpuS3.c.
Signed-off-by: Dun Tan
Reviewed-by: Ray Ni
Cc: Rahul Kumar
Cc: Gerd
In this commit, S3Resume.c wakeup all Aps to run
LoadMtrrData for all cpu before transfer to CpuS3.c
in smm cpu driver. The MtrrSetting table can be restored
by gEdkiiS3MtrrSettingGuid which is saved by lockbox in
PEI phase. This can avoid waking up APs in CpuS3.c.
Signed-off-by: Dun Tan
Add locbox lib instance in DSC. The SmmLockBoxDxeLib
will be consumed by CpuS3DataDxe driver
Signed-off-by: Dun Tan
Reviewed-by: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Jiaxin Wu
---
UefiCpuPkg/UefiCpuPkg.dsc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Save MTRR by lockbox in CpuS3DataDxe. In S3 boot,
The MTRR setting will be restored in S3Resume.c
in following patches. Then S3Resume.c will wakeup
all APs to load the MTRR setting. This can avoid
waking up APs in CpuS3.c.
Signed-off-by: Dun Tan
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd
Add gEdkiiS3MtrrSettingGuid a new GUID for s3
MTRR setting. This GUID will be used to save
MTRR_SETTINGS at EndOfDxe by LockBox and restore
at S3 boot PEI phase for s3 usage.
Signed-off-by: Dun Tan
Reviewed-by: Ray Ni
Cc: Liming Gao
Cc: Jiaxin Wu
---
MdeModulePkg/MdeModulePkg.dec | 5 -
Comparing to V1 patchs set, the V2 patch set only adjusts the commits ordering
and modifies copy right year in some files.
This patch set is to remove some S3 related code in CpuS3.c of smm cpu driver.
It contain commits to:
1) S3 MTRRs operation:
> MdeModulePkg: Add gEdkiiS3MtrrSettingGuid
>
This patch is to fix issue when splitting leaf paging
entry in CpuPageTableLib code.
In previous code, before we assign the new child paging
structure address to the content of splitted paging entry,
PageTableLibSetPnle() is called to make sure the bit7 is
set to 0, which indicate the previous
Thanks for the comments.
How about change the commits order to be like:
1) S3 MTRRs operation:
2) AP page table unavailiable issue fix:
3) S3 ApHltLoopCode Operation:
> UefiCpuPkg:Abstract some DxeMpLib code to function
> UefiCpuPkg:Move some code in DxeMpLib to common place
>
Yes, let's do the cleanup for PcdCpuS3DataAddress in another new patch set.
Thanks,
Dun
-Original Message-
From: Wu, Jiaxin
Sent: Monday, May 13, 2024 11:04 AM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Ni, Ray ; Kumar, Rahul R ; Gerd
Hoffmann
Subject: RE: [PATCH 04/18] UefiCpuPkg: Save
egister table
> UefiCpuPkg: Remove GetAcpiCpuData() in CpuS3.c
2. Update all intel copyright year.
3. Add all reviewer in the 00 patch.
4. Add PR in the 00 patch (if have).
Thanks,
Jiaxin
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of duntan
> Sent: Fr
This MpService2Ppi field in SMM_S3_RESUME_STATE is used to
wakeup AP to do the CPU initialization during smm s3 boot when
the execution mode of PEI and DXE are the same.
Currently, in CpuS3.c of smm cpu driver, BSP doesn't need to
wakeup AP anymore. The initialization for AP will be done in
Remove GetAcpiCpuData() in CpuS3.c. The mAcpiCpuData
is not needed in S3 boot anymore.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Jiaxin Wu
---
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 243
Remove code to set register table in CpuS3.c.
In previous commit, PcdCpuFeaturesInitOnS3Resume
has been set to TRUE. So that CpuFeaturesPei PEIM
will initialize the CPU registers and perform CPU
features initialization.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Rahul Kumar
Cc:
After the code to load mtrr setting, set register table,
handle APIC setting and Interrupt after INIT-SIPI-SIPI
is moved, the InitializeCpuProcedure() only contains
following code logic:
1.Bsp runs ExecuteFirstSmiInit().
2.Bsp transfers AP to safe hlt-loop
During S3 boot, since APs will be
Set PcdCpuFeaturesInitOnS3Resume to TRUE. So that
CpuFeaturesPei PEIM will initialize the CPU registers
and perform CPU features initialization.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Jiaxin Wu
---
UefiCpuPkg/UefiCpuPkg.dec | 2 +-
1 file
Remove ProgramVirtualWireMode()/DisableLvtInterrupts()
since APs won't be waken by INIT-SIPI-SIPI in CpuS3.c
any more. The two functions has been executed in
MpInitLibInitialize() in PeiMplib.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Jiaxin Wu
Remove code to load mtrr setting in CpuS3.c.
In previous commits, before transferring to
CpuS3.c, MTRR setting has been loaded in
S3RestoreConfig2() for all CPU.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Jiaxin Wu
---
Disable paging in IA32 RelocateApLoop assembly
code to fix the issue that the AP page table is
unavailiable after boot OS under IA32 execution mode.
This issue exist in IA32 PEI + IA32 DXE normal boot
(also S3 boot with IA32 PEI after previous three commits
are accepted). In current MpLib code,
In this commit, change PeiMpLib to install callback
of gEdkiiEndOfS3ResumeGuid to relocate AP to new safe
buffer. The gEdkiiEndOfS3ResumeGuid is installed in
S3Resume.c before jmping to OS waking vector.
Previously, code in CpuS3.c of PiSmmCpuDxe driver will
prepare the new safe buffer for AP and
Move some code in DxeMpLib.C to common MpLib.c.
The related code is to relocate Ap to new safe buffer
before booting into OS. In next commits, these code
also will be used by PeiMpLib. This commit doesn't
change any code functionality.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Laszlo Ersek
Cc:
Abstract some DxeMpLib code to function in this commit.
Some of these internal functions will be moved to common
MpLib.c in following commits. Then PeiMpLib can reuse
the code.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Jiaxin Wu
---
Install gEdkiiEndOfS3ResumeGuid in S3Resume to trigger
callback registered by PeiMpLib. The callback is to
relocate Ap to new safe memory before jump to OS waking
vector in S3 boot flow.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Jiaxin Wu
---
Remove the duplicated mpservice locate in the code
logic. Previously, when the execution combination
of PEI and DXE are the same, the pointer of mpservice
ppi will be passed to CpuS3.c in smm cpu driver to
wakeup all APs, instead of init-sipi-sipi. Currently,
CpuS3.c doesn't need to wakeup Aps
In this commit, S3Resume.c wakeup all Aps to run
LoadMtrrData for all cpu before transfer to CpuS3.c
in smm cpu driver. The MtrrSetting table can be restored
by gEdkiiS3MtrrSettingGuid which is saved by lockbox in
PEI phase. This can avoid waking up APs in CpuS3.c.
Signed-off-by: Dun Tan
Cc: Ray
Save MTRR by lockbox in CpuS3DataDxe. In S3 boot,
The MTRR setting will be restored in S3Resume.c
in following patches. Then S3Resume.c will wakeup
all APs to load the MTRR setting. This can avoid
waking up APs in CpuS3.c.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Add locbox lib instance in DSC. The SmmLockBoxDxeLib
will be consumed by CpuS3DataDxe driver
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Jiaxin Wu
---
UefiCpuPkg/UefiCpuPkg.dsc | 1 +
1 file changed, 1 insertion(+)
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc
Save MTRR by lockbox in CpuS3DataDxe. In S3 boot,
The MTRR setting will be restored in S3Resume.c
in following patches. Then S3Resume.c will wakeup
all APs to load the MTRR setting. This can avoid
waking up APs in CpuS3.c.
Signed-off-by: Dun Tan
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd
Add gEdkiiS3MtrrSettingGuid a new GUID for s3
MTRR setting. This GUID will be used to save
MTRR_SETTINGS at EndOfDxe by LockBox and restore
at S3 boot PEI phase for s3 usage.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Liming Gao
Cc: Jiaxin Wu
---
MdeModulePkg/MdeModulePkg.dec | 3 +++
1 file
This patch set is to remove some S3 related code in CpuS3.c of smm cpu driver.
It contain commits to:
1.Save MTRR setting by lockbox in PEI phase
2.Load MTRR in S3Resume.c before transferring to CpuS3.c in smm cpu driver.
3.Add callback of gEdkiiEndOfS3ResumeGuid in PeiMpLib to relocate Ap to
Sort ApicIdOrderTable by following special rules:
1. Make sure BSP is the first entry.
2. For APs, big core first, then small core.
With this implementation, BIOS can present cores in order
of relative performance in MADT. Linux OS would schedule
cores by the order that they are presented in the
Add a new field CoreType in EFI_CPU_ID_ORDER_MAP
and get CoreType for all cores.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Jason Lou
Cc: Chasel Chiu
Cc: Nate DeSimone
Cc: Liming Gao
Cc: Eric Dong
---
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 50
This global variable mForceX2ApicId is not assigned
to any value in code and will be initialized to 0 when
the driver is loaded. So remove the global variable
and related code that will not be executed.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Jason Lou
Cc: Chasel Chiu
Cc: Nate DeSimone
Cc:
This patch set is to sort ApicIdOrderTable by following special rules:
1. Make sure BSP is the first entry.
2. For APs, big core first, then small core.
With this implementation, BIOS can present cores in order of relative
performance in MADT.
Linux OS would schedule cores by the order that they
Change AcpiProcessorUid in CpuApicIdOrderTable to
the index in MpService regardless of disabled core.
Let's take a simple example:
There are 2 enabled cores and 1 disabled core.
APICID Index in MpService
0x_0
0x_0010(disbaled) 1
0x_0040
Change AcpiProcessorUid in CpuApicIdOrderTable to
the Index value in MP service regardless of diabled
fore.
Let take a simple example:
CORE number APICID Index in MpService
CORE0 0x_ 0
CORE1(Disabled) 0x_0010 1
CORE2 0x_0040
Sort ApicIdOrderTable by following special rules:
1. Make sure BSP is the first entry.
2. For APs, big core first, then small core.
3. For APs, if the core type are the same,
sort them by AcpiProcessorUid.
With this implementation, BIOS can present cores in order
of relative performance in
Laszlo,
Sorry for the late reply. Thanks for your code refactoring patch and bugfix
patch!
Thanks,
Dun
-Original Message-
From: Laszlo Ersek
Sent: Thursday, February 15, 2024 4:45 PM
To: Kinney, Michael D ; Leif Lindholm
; devel@edk2.groups.io; Leif Lindholm
; Andrew Fish
Hi Gerd,
I've refined the comments and the commit message. Could you please help to
review again?
Thanks,
Dun
-Original Message-
From: devel@edk2.groups.io On Behalf Of duntan
Sent: Friday, January 12, 2024 4:32 PM
To: devel@edk2.groups.io
Cc: Ni, Ray ; Laszlo Ersek ; Kumar, Rahul
R
When creating smm page table, limit maximum
supported physical addresses bits returned by
CalculateMaximumSupportAddress() to 47 if
5-Level Paging is disabled.
This commit is to avoid issue that more than
47-bit physical addresses are requested in smm
page table when 5-level paging is disabled.
Hi Gerd,
I explain the reason why 47 here is since virtual addresses are sign-extended
in the commit message.
About the technical background, I also mentioned in the commit message " When
5-Level Paging is disabled and the PhysicalAddressBits retrived from CPU HOB
or CpuId is bigger than 47".
.groups.io On Behalf Of duntan
Sent: Thursday, January 11, 2024 5:00 PM
To: devel@edk2.groups.io
Cc: Ni, Ray ; Laszlo Ersek ; Kumar, Rahul
R ; Gerd Hoffmann
Subject: [edk2-devel] [Patch V3] UefiCpuPkg:Limit PhysicalAddressBits in
special case
When creating smm page table, limit maximum supported
Change name of gMpInformationHobGuid2 to
gMpInformation2HobGuid. It's to align with
the file name MpInformation2.h and the
structure name MP_INFORMATION2_HOB_DATA.
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Rahul Kumar
Cc: Gerd Hoffmann
---
UefiCpuPkg/CpuMpPei/CpuMpPei.c
When creating smm page table, limit maximum
supported physical address bits returned by
CalculateMaximumSupportAddress() to 47 if
5-Level Paging is disabled.
When 5-Level Paging is disabled and the
PhysicalAddressBits retrived from CPU HOB or
CpuId is bigger than 47, and since virtual
addresses
Oh, thanks for your comments! Will correct it in next version patch.
Thanks,
Dun
-Original Message-
From: Laszlo Ersek
Sent: Thursday, January 11, 2024 4:48 PM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Ni, Ray ; Kumar, Rahul R ; Gerd
Hoffmann
Subject: Re: [Patch V2] UefiCpuPkg:Limit
When creating smm page table, limit maximum
supported physical address bits returned by
CalculateMaximumSupportAddress() to 47 if
5-Level Paging is disabled.
When 5-Level Paging is disabled and the
PhysicalAddressBits retrived from CPU HOB or
CpuId is bigger than 47, and since virtual
addresses
Hi Gerd,
Thanks for your comments. I agree with your opinion. Will change the code and
related comments in V2 patch.
Thanks,
Dun
-Original Message-
From: Gerd Hoffmann
Sent: Wednesday, January 10, 2024 6:55 PM
To: Tan, Dun
Cc: devel@edk2.groups.io; Ni, Ray ; Laszlo Ersek
; Kumar,
When creating smm page table, limit maximum
supported physical address bits returned by
CalculateMaximumSupportAddress() to 48 if
5-Level Paging is disabled.
When 5-Level Paging is disabled and the
PhysicalAddressBits retrived from CPU HOB or
CpuId is bigger than 48, only [0, 2^48 -1]
range in
() of MpInitLibUp
On 1/8/24 06:08, duntan wrote:
> Please ignore the V2 PATCH set. No other change except adding BaseMemoryLib
> headfile and lib instance in .inf to pass build since ZeroMem() is used.
>
> Comparing to the V1 patch set:
> In "set EXTENDED_PROCESSOR_IN
s fixed in V3
patch set.
Thanks,
Dun
-Original Message-
From: devel@edk2.groups.io On Behalf Of duntan
Sent: Monday, January 8, 2024 11:56 AM
To: devel@edk2.groups.io
Subject: [edk2-devel] [Patch V2 0/2] Change the usage of input parameter
ProcessorNumber in MpInitLibGetProcessorI
Check lower 24 bits of ProcessorNumber instead of
the value of ProcessorNumber in the API
MpInitLibGetProcessorInfo() of MpInitLibUp instance.
Lower 24 bits of ProcessorNumber contains the actual
processor number.
The BIT24 of input ProcessorNumber might be set to
indicate if the
Set EXTENDED_PROCESSOR_INFORMATION to 0 in API
MpInitLibGetProcessorInfo() of MpInitLibUp. This
commit use ZeroMem() to set all fileds in output
EFI_PROCESSOR_INFORMATION to 0 before StatusFlag
field is reassigned.
Previously EXTENDED_PROCESSOR_INFORMATION in the API
MpInitLibGetProcessorInfo()
Please ignore the V2 PATCH set. No other change except adding BaseMemoryLib
headfile and lib instance in .inf to pass build since ZeroMem() is used.
Comparing to the V1 patch set:
In "set EXTENDED_PROCESSOR_INFORMATION to 0", set
EXTENDED_PROCESSOR_INFORMATION to 0 in API
Thanks for the comments. The code has been updated in the V2 patch set.
Thanks,
Dun
-Original Message-
From: Laszlo Ersek
Sent: Friday, January 5, 2024 9:56 PM
To: Ni, Ray ; devel@edk2.groups.io; Tan, Dun
Cc: Kumar, Rahul R ; Gerd Hoffmann
; Xu, Min M
Subject: Re: [edk2-devel]
Check lower 24 bits of ProcessorNumber instead of
the value of ProcessorNumber in the API
MpInitLibGetProcessorInfo() of MpInitLibUp instance.
Lower 24 bits of ProcessorNumber contains the actual
processor number.
The BIT24 of input ProcessorNumber might be set to
indicate if the
Set EXTENDED_PROCESSOR_INFORMATION to 0 in API
MpInitLibGetProcessorInfo() of MpInitLibUp. This
commit use ZeroMem() to set all fileds in output
EFI_PROCESSOR_INFORMATION to 0 before StatusFlag
field is reassigned.
Previously EXTENDED_PROCESSOR_INFORMATION in the API
MpInitLibGetProcessorInfo()
In the V2 patch set:
In "set EXTENDED_PROCESSOR_INFORMATION to 0", set
EXTENDED_PROCESSOR_INFORMATION to 0 in API MpInitLibGetProcessorInfo() of
MpInitLibUp. This commit use ZeroMem() to set all fileds in output
EFI_PROCESSOR_INFORMATION to 0 before StatusFlag field is reassigned.
In "Check
To: devel@edk2.groups.io; Tan, Dun
Cc: Ni, Ray ; Kumar, Rahul R ; Gerd
Hoffmann ; Xu, Min M
Subject: Re: [edk2-devel] [PATCH 1/2] UefiCpuPkg: Retrive
EXTENDED_PROCESSOR_INFORMATION
On 1/4/24 08:32, duntan wrote:
> Retrive EXTENDED_PROCESSOR_INFORMATION in the API
> MpInitLibGetProcess
Retrive EXTENDED_PROCESSOR_INFORMATION in the API
MpInitLibGetProcessorInfo() of MpInitLibUp instance
when the BIT24 of input ProcessorNumber is set.
It's to align with the behavior in PEI/DXE MpInitLib
Signed-off-by: Dun Tan
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc:
Check lower 24 bits of ProcessorNumber instead of
the value of ProcessorNumber in the API
MpInitLibGetProcessorInfo() of MpInitLibUp instance.
Lower 24 bits of ProcessorNumber contains the actual
processor number.
The BIT24 of input ProcessorNumber might be set to
indicate if the
In this patch set, the usage of input parameter ProcessorNumber in
MpInitLibGetProcessorInfo() of MpInitLibUp instance is changed.
1.Retrive EXTENDED_PROCESSOR_INFORMATION in the API MpInitLibGetProcessorInfo()
of MpInitLibUp instance when the BIT24 of input ProcessorNumber is set.
It's to align
limitation of the existing implementation?
>
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of duntan
> Sent: Friday, November 17, 2023 5:40 PM
> To: devel@edk2.groups.io
> Subject: [edk2-devel] [Patch V2 0/3] Move gMpInformationHobGuid from
> StandaloneMmPkg to Uefi
Thu, 9 Nov 2023 at 03:51, duntan wrote:
>
> Remove MpInformation.h in StandaloneMmPkg since it has been moved to
> UefiCpuPkg
>
> Signed-off-by: Dun Tan
> Cc: Ard Biesheuvel
> Cc: Sami Mujawar
> Cc: Ray Ni
Doesn't this break the ARM build?
> ---
>
st practicality, not laziness. It feels hopeless for me to
make a serious "dent" in reviewing any larger patch set this week, so I'll try
to spend review effort where it has a fleeting chance at enabling actual
progress.
Best regards,
Laszlo
>
> -Original Message-
> From:
eate a new MpInfo2Hob in UefiCpuPkg
in this patch set. Do you have any comments about the patch set?
Thanks,
Dun
-Original Message-
From: devel@edk2.groups.io On Behalf Of duntan
Sent: Friday, December 8, 2023 5:55 PM
To: devel@edk2.groups.io
Subject: [edk2-devel] [Patch V3 0/6] Create a
Modify the gSmmBaseHobGuid consumption code to
remove the asuumption that there is only one
gSmmBaseHobGuid. If the CPU number is big enough,
there will be more than one SmmBaseHob in the
HOB list.
Signed-off-by: Dun Tan
Cc: Eric Dong
Reviewed-by: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
---
Consume MpInfo2Hob in PiSmmCpuDxe driver to get
NumberOfProcessors, MaxNumberOfCpus and
EFI_PROCESSOR_INFORMATION for all CPU from the
MpInformation2 HOB.
This can avoid calling MP service.
Signed-off-by: Dun Tan
Cc: Eric Dong
Reviewed-by: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
---
Build MpInfo2HOB in CpuMpPei module so that later
PiSmmCpuDxe or other StandaloneMm module can consume
the HOB.
Since there might be more one gMpInformationHobGuid2
in HOB list, CpuMpPei create a gMpInformationHobGuid2
with 0 value NumberOfProcessors field in the end of the
process to indicate
In the V3 patch set,
In patch "UefiCpuPkg: Build MpInfo2HOB in CpuMpPei", the DEBUG message format
is modified
In patch "UefiCpuPkg: Consume MpInfo2Hob in PiSmmCpuDxe", remove unneccesary
assert check.
In patch "UefiCpuPkg: Avoid assuming only one smmbasehob", free allocated
buffer when error
Consume MpInfo2Hob in PiSmmCpuDxe driver to get
NumberOfProcessors, MaxNumberOfCpus and
EFI_PROCESSOR_INFORMATION for all CPU from the
MpInformation2 HOB.
This can avoid calling MP service.
Signed-off-by: Dun Tan
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
---
Modify the gSmmBaseHobGuid consumption code to
remove the asuumption that there is only one
gSmmBaseHobGuid. If the CPU number is big enough,
there will be more than one SmmBaseHob in the
HOB list.
Signed-off-by: Dun Tan
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
---
Cache core type in MpInfo2 HOB by CpuMpPei module.
Signed-off-by: Dun Tan
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
---
UefiCpuPkg/CpuMpPei/CpuMpPei.c | 59
+--
UefiCpuPkg/CpuMpPei/CpuMpPei.h | 2 ++
2 files changed,
Create gMpInformationHobGuid2 in UefiCpuPkg.
Currently, there is a gMpInformationHobGuid defined,
created and consumed only in StandaloneMmPkg. The HOB
contains the EFI_PROCESSOR_INFORMATION structure for
each CPU and the number of processors. This is the same
as the information that
Build MpInfo2HOB in CpuMpPei module so that later
PiSmmCpuDxe or other StandaloneMm module can consume
the HOB.
Since there might be more one gMpInformationHobGuid2
in HOB list, CpuMpPei create a gMpInformationHobGuid2
with 0 value NumberOfProcessors field in the end of the
process to indicate
In the V2 patch set, modify some function protype and some variables naming.
Original message:
Create and consume gMpInformationHobGuid2 in UefiCpuPkg in this patch series.
Currently, there is a gMpInformationHobGuid defined, created and consumed only
in StandaloneMmPkg.
The HOB contains the
Updated in original message.
Thanks,
Dun
-Original Message-
From: Ni, Ray
Sent: Wednesday, December 6, 2023 6:15 PM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Dong, Eric ; Kumar, Rahul R ;
Gerd Hoffmann
Subject: RE: [PATCH 6/6] UefiCpuPkg: Avoid assuming only one smmbasehob
>
Will change the commit based on the comments
Thanks,
Dun
-Original Message-
From: Ni, Ray
Sent: Wednesday, December 6, 2023 6:02 PM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Dong, Eric ; Kumar, Rahul R ;
Gerd Hoffmann
Subject: RE: [PATCH 5/6] UefiCpuPkg: Cache core type in MpInfo2 HOB
Will change the code based on comments 1-9.
About comments 10, "10. The depex change means that CpuSmm driver could run
before CpuMp driver runs. Have you verified if CpuSmm can start well even
removing CpuMp DXE driver?"
Yes, I verified it in OvmfIa32X64 boot. CpuSmm can start well even
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