Re: [edk2-devel] [edk2-platforms][PATCH V4 00/17] Split NorFlashDxe driver and add CadenceQspiNorFlashDeviceLib library
Merged as f69888ada859..35bca3ca71c0 Thanks. Regards, Sami Mujawar -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119355): https://edk2.groups.io/g/devel/message/119355 Mute This Topic: https://groups.io/mt/106365450/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms][PATCH V4 00/17] Split NorFlashDxe driver and add CadenceQspiNorFlashDeviceLib library
Other than my comments for patch 14 and 15 (the changes for which I will fix locally before merging), this patch series looks good to me. For this series, Reviewed-by: Sami Mujawar Regards, Sami Mujawar -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119354): https://edk2.groups.io/g/devel/message/119354 Mute This Topic: https://groups.io/mt/106365450/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms][PATCH V4 15/17] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe
Hi Sahil, I will drop the loop before merging the changes. Other than that this patch looks good to me. Reviewed-by: Sami Mujawar Regards, Sami Mujawar From: Sahil Kaushal Date: Wednesday 29 May 2024 at 12:51 To: Sami Mujawar , "devel@edk2.groups.io" Cc: Ard Biesheuvel , Leif Lindholm , nd Subject: Re: [edk2-platforms][PATCH V4 15/17] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe Hi Sami, Thank you for reviewing the patch. You are right. The do-while loop is redundant and hence can be removed. Thanks, Sahil From: Sami Mujawar Date: Wednesday, 29 May 2024 at 5:06 PM To: Sahil Kaushal , devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , nd Subject: Re: [edk2-platforms][PATCH V4 15/17] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe Hi Sahil, Please find my feedback inline marked [SAMI]. Regards, Sami Mujawar On 29/05/2024, 09:56, "Sahil Kaushal" mailto:sahil.kaus...@arm.com>> wrote: From: sahil mailto:sa...@arm.com>> In N1Sdp platform, the SoC is connected to IOFPGA which has a Cadence Quad SPI (QSPI) controller. This QSPI controller manages the flash chip device via QSPI bus. This patch adds CadenceQspiNorFlashDeviceLib which is used to manage and access the above configuration. Signed-off-by: sahil mailto:sa...@arm.com>> --- Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf | 32 + Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h | 46 + Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c | 1034 3 files changed, 1112 insertions(+) diff --git a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf new file mode 100644 index ..506876b62285 --- /dev/null +++ b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf @@ -0,0 +1,32 @@ +#/** @file +# +# Component description file for CadenceQspiNorFlashDeviceLib Library +# +# Copyright (c) 2024, Arm Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = CadenceQspiNorFlashDeviceLib + FILE_GUID = ed172366-066b-4998-9b5e-ca7f385a170b + MODULE_TYPE = DXE_RUNTIME_DRIVER + VERSION_STRING = 1.0 + LIBRARY_CLASS = NorFlashDeviceLib + +[Sources.common] + CadenceQspiNorFlashDeviceLib.c + CadenceQspiNorFlashDeviceLib.h + +[Packages] + MdePkg/MdePkg.dec + Platform/ARM/ARM.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + IoLib + TimerLib diff --git a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h new file mode 100644 index ..951a93481dd1 --- /dev/null +++ b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h @@ -0,0 +1,46 @@ +/** @file + + Copyright (c) 2024, ARM Limited. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ +#define CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ + +#define NOR_FLASH_ERASE_RETRY 10 + +// QSPI Controller defines +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OFFSET 0x90 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_EXECUTE 0x01 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_ENABLE 0x01 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BIT_POS 19 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS 16 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_STATUS_BIT 0x02 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OPCODE_BIT_POS 24 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_ENABLE 0x01 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_BYTE_3B 0x02 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READEN_BIT_POS 23 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS 20 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_8C 0x8 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_BIT_POS 7 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_DATA_BYTES(x) ((x - 1) << CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS) +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_ADDR_BYTES(x) ((x - 1) << CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS) + +#define CDNS_QSPI_FLASH_CMD_READ_DATA_REG_OFFSET 0xA0 + +#define CDNS_QSPI_FLASH_CMD_ADDR_REG_OFFSET 0x94 + +#define CDNS_QSPI_FLASH_CMD_STATUS_POLL_TIMEOUT_MS 1000u // Command Status Register read timeout + +#define SPINOR_SR_WIP BIT0 // Write in progress + +#define SPINOR_OP_WREN 0x06 // Write enable +#define SPINOR_OP_BE_4K 0x20 // Erase 4KiB block +#define SPINOR_OP_RDID 0x9f // Read JEDEC ID +#define SPINOR_OP_RDSR 0x05 // Read status register + +#define SPINOR_SR_WIP_POLL_TIMEOUT_MS 1000u // Status Register read timeout + +#endif /* CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ */ diff --git a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
Re: [edk2-devel] [edk2-platforms][PATCH V4 15/17] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe
Hi Sami, Thank you for reviewing the patch. You are right. The do-while loop is redundant and hence can be removed. Thanks, Sahil From: Sami Mujawar Date: Wednesday, 29 May 2024 at 5:06 PM To: Sahil Kaushal , devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , nd Subject: Re: [edk2-platforms][PATCH V4 15/17] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe Hi Sahil, Please find my feedback inline marked [SAMI]. Regards, Sami Mujawar On 29/05/2024, 09:56, "Sahil Kaushal" mailto:sahil.kaus...@arm.com>> wrote: From: sahil mailto:sa...@arm.com>> In N1Sdp platform, the SoC is connected to IOFPGA which has a Cadence Quad SPI (QSPI) controller. This QSPI controller manages the flash chip device via QSPI bus. This patch adds CadenceQspiNorFlashDeviceLib which is used to manage and access the above configuration. Signed-off-by: sahil mailto:sa...@arm.com>> --- Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf | 32 + Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h | 46 + Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c | 1034 3 files changed, 1112 insertions(+) diff --git a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf new file mode 100644 index ..506876b62285 --- /dev/null +++ b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf @@ -0,0 +1,32 @@ +#/** @file +# +# Component description file for CadenceQspiNorFlashDeviceLib Library +# +# Copyright (c) 2024, Arm Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = CadenceQspiNorFlashDeviceLib + FILE_GUID = ed172366-066b-4998-9b5e-ca7f385a170b + MODULE_TYPE = DXE_RUNTIME_DRIVER + VERSION_STRING = 1.0 + LIBRARY_CLASS = NorFlashDeviceLib + +[Sources.common] + CadenceQspiNorFlashDeviceLib.c + CadenceQspiNorFlashDeviceLib.h + +[Packages] + MdePkg/MdePkg.dec + Platform/ARM/ARM.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + IoLib + TimerLib diff --git a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h new file mode 100644 index ..951a93481dd1 --- /dev/null +++ b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h @@ -0,0 +1,46 @@ +/** @file + + Copyright (c) 2024, ARM Limited. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ +#define CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ + +#define NOR_FLASH_ERASE_RETRY 10 + +// QSPI Controller defines +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OFFSET 0x90 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_EXECUTE 0x01 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_ENABLE 0x01 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BIT_POS 19 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS 16 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_STATUS_BIT 0x02 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OPCODE_BIT_POS 24 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_ENABLE 0x01 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_BYTE_3B 0x02 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READEN_BIT_POS 23 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS 20 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_8C 0x8 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_BIT_POS 7 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_DATA_BYTES(x) ((x - 1) << CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS) +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_ADDR_BYTES(x) ((x - 1) << CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS) + +#define CDNS_QSPI_FLASH_CMD_READ_DATA_REG_OFFSET 0xA0 + +#define CDNS_QSPI_FLASH_CMD_ADDR_REG_OFFSET 0x94 + +#define CDNS_QSPI_FLASH_CMD_STATUS_POLL_TIMEOUT_MS 1000u // Command Status Register read timeout + +#define SPINOR_SR_WIP BIT0 // Write in progress + +#define SPINOR_OP_WREN 0x06 // Write enable +#define SPINOR_OP_BE_4K 0x20 // Erase 4KiB block +#define SPINOR_OP_RDID 0x9f // Read JEDEC ID +#define SPINOR_OP_RDSR 0x05 // Read status register + +#define SPINOR_SR_WIP_POLL_TIMEOUT_MS 1000u // Status Register read timeout + +#endif /* CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ */ diff --git a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c new file mode 100644 index ..f97c8d51fd48 --- /dev/null +++ b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c @@ -0,0 +1,1034 @@ +/** @file + + Copyright (c) 2024 ARM Limited. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include +#include + +#include
Re: [edk2-devel] [edk2-platforms][PATCH V4 14/17] Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp
Hi Sahil,
There is a typo in one of the macro names, see my comment inline marked [SAMI].
I will fix that up before merging.
Other than that, this patch looks good to me.
Reviewed-by: Sami Mujawar
Regards,
Sami Mujawar
On 29/05/2024, 09:56, "Sahil Kaushal" mailto:sahil.kaus...@arm.com>> wrote:
From: sahil mailto:sa...@arm.com>>
Add NOR flash library, this library provides APIs for getting the list
of NOR flash devices on the platform.
This flash is shared between AP core and System Control Processor. The
lower addresses are used to store SCP and AP boot images and higher
addresses will be used for variable storage.
Signed-off-by: sahil mailto:sa...@arm.com>>
---
Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf | 35 +
Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 1 +
Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c | 80
3 files changed, 116 insertions(+)
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
new file mode 100644
index ..a9495cf667d5
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
@@ -0,0 +1,35 @@
+## @file
+# NOR flash lib for ARM Neoverse N1 platform.
+#
+# Copyright (c) 2024, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = NorFlashNeoverseN1SocLib
+ FILE_GUID = 7006fcf1-a585-4272-92e3-b286b1dff5bb
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = NorFlashPlatformLib
+
+[Sources.common]
+ NorFlashLib.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Platform/ARM/ARM.dec
+ Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+
+[FixedPcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
index 2dae57a0f01a..2a592e5adc2f 100644
--- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
+++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
@@ -47,6 +47,7 @@
// SCP QSPI flash device
#define NEOVERSEN1SOC_SCP_QSPI_AHB_BASE 0x1800
#define NEOVERSEN1SOC_SCP_QSPI_AHB_SZ 0x200
+#define NEOVERSEN1SOC_FIRMWARE_IAMGES_SZ 0x80
[SAMI] I noticed there is a typo in the macro above. I will fix that locally
before merging.
/*
* Platform information structure stored in Non-secure SRAM. Platform
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
new file mode 100644
index ..a354ffb5ac6d
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
@@ -0,0 +1,80 @@
+/** @file
+* NOR flash lib for ARM Neoverse N1 platform
+*
+* Copyright (c) 2024, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include
+#include
+#include
+#include
+
+#define FW_ENV_REGION_BASE FixedPcdGet32 (PcdFlashNvStorageVariableBase)
+#define FW_ENV_REGION_SIZE (FixedPcdGet32 (PcdFlashNvStorageVariableSize) + \
+ FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + \
+ FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize))
+
+STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] = {
+ {
+ /// Environment variable region
+ NEOVERSEN1SOC_SCP_QSPI_AHB_BASE, ///< device base
+ FW_ENV_REGION_BASE, ///< region base
+ FW_ENV_REGION_SIZE, ///< region size
+ SIZE_4KB, ///< block size
+ },
+};
+
+/**
+ Dummy implementation of NorFlashPlatformInitialization to
+ comply with NorFlashPlatformLib structure.
+
+ @retval EFI_SUCCESS Success.
+**/
+EFI_STATUS
+NorFlashPlatformInitialization (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+/**
+ Get NOR flash region info
+
+ @param[out] NorFlashDevices NOR flash regions info.
+ @param[out] Count number of flash instance.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_ACCESS_DENIED Invalid variable region address.
+**/
+EFI_STATUS
+NorFlashPlatformGetDevices (
+ OUT NOR_FLASH_DESCRIPTION **NorFlashDevices,
+ OUT UINT32 *Count
+ )
+{
+ if ((NorFlashDevices == NULL) || (Count == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if ((NEOVERSEN1SOC_SCP_QSPI_AHB_BASE +
+ NEOVERSEN1SOC_FIRMWARE_IAMGES_SZ) >=
+ FW_ENV_REGION_BASE)
+ {
+ DEBUG ((
+ DEBUG_ERROR,
+ "NorFlashPlatformInitialization: Variable region overlapping with "
+ "firmware region.\n"
+ ));
+
+ return EFI_ACCESS_DENIED;
+ }
+
+ *NorFlashDevices = mNorFlashDevices;
+ *Count = ARRAY_SIZE (mNorFlashDevices);
+ return EFI_SUCCESS;
+}
--
2.25.1
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Re: [edk2-devel] [edk2-platforms][PATCH V4 15/17] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe
Hi Sahil,
Please find my feedback inline marked [SAMI].
Regards,
Sami Mujawar
On 29/05/2024, 09:56, "Sahil Kaushal" mailto:sahil.kaus...@arm.com>> wrote:
From: sahil mailto:sa...@arm.com>>
In N1Sdp platform, the SoC is connected to IOFPGA which has a
Cadence Quad SPI (QSPI) controller. This QSPI controller manages
the flash chip device via QSPI bus.
This patch adds CadenceQspiNorFlashDeviceLib which is used to
manage and access the above configuration.
Signed-off-by: sahil mailto:sa...@arm.com>>
---
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
| 32 +
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
| 46 +
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
| 1034
3 files changed, 1112 insertions(+)
diff --git
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
new file mode 100644
index ..506876b62285
--- /dev/null
+++
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
@@ -0,0 +1,32 @@
+#/** @file
+#
+# Component description file for CadenceQspiNorFlashDeviceLib Library
+#
+# Copyright (c) 2024, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = CadenceQspiNorFlashDeviceLib
+ FILE_GUID = ed172366-066b-4998-9b5e-ca7f385a170b
+ MODULE_TYPE = DXE_RUNTIME_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = NorFlashDeviceLib
+
+[Sources.common]
+ CadenceQspiNorFlashDeviceLib.c
+ CadenceQspiNorFlashDeviceLib.h
+
+[Packages]
+ MdePkg/MdePkg.dec
+ Platform/ARM/ARM.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ IoLib
+ TimerLib
diff --git
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
new file mode 100644
index ..951a93481dd1
--- /dev/null
+++
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
@@ -0,0 +1,46 @@
+/** @file
+
+ Copyright (c) 2024, ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_
+#define CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_
+
+#define NOR_FLASH_ERASE_RETRY 10
+
+// QSPI Controller defines
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OFFSET 0x90
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_EXECUTE 0x01
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_ENABLE 0x01
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BIT_POS 19
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS 16
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_STATUS_BIT 0x02
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OPCODE_BIT_POS 24
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_ENABLE 0x01
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_BYTE_3B 0x02
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READEN_BIT_POS 23
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS 20
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_8C 0x8
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_BIT_POS 7
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_DATA_BYTES(x) ((x - 1) <<
CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS)
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_ADDR_BYTES(x) ((x - 1) <<
CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS)
+
+#define CDNS_QSPI_FLASH_CMD_READ_DATA_REG_OFFSET 0xA0
+
+#define CDNS_QSPI_FLASH_CMD_ADDR_REG_OFFSET 0x94
+
+#define CDNS_QSPI_FLASH_CMD_STATUS_POLL_TIMEOUT_MS 1000u // Command Status
Register read timeout
+
+#define SPINOR_SR_WIP BIT0 // Write in progress
+
+#define SPINOR_OP_WREN 0x06 // Write enable
+#define SPINOR_OP_BE_4K 0x20 // Erase 4KiB block
+#define SPINOR_OP_RDID 0x9f // Read JEDEC ID
+#define SPINOR_OP_RDSR 0x05 // Read status register
+
+#define SPINOR_SR_WIP_POLL_TIMEOUT_MS 1000u // Status Register read timeout
+
+#endif /* CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ */
diff --git
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
new file mode 100644
index ..f97c8d51fd48
--- /dev/null
+++
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
@@ -0,0 +1,1034 @@
+/** @file
+
+ Copyright (c) 2024 ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "CadenceQspiNorFlashDeviceLib.h"
+
+/**
+ Converts milliseconds into number of ticks of the performance counter.
+
+ @param[in] Milliseconds Milliseconds to convert into ticks.
+
+ @retval Milliseconds expressed as number of ticks.
+
+**/
+STATIC
+UINT64
+MilliSecondsToTicks (
+ IN UINTN Milliseconds
+ )
+{
+ UINT64 NanoSecondsPerTick;
+ UINT64 NanoSeconds;
+
+ NanoSecondsPerTick =
Re: [edk2-devel] [edk2-platforms 2/3] AmdPlatformPkg: Implements SmmCorePlatformHookLib library
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Abner Chang
> -Original Message-
> From: Abdul Lateef Attar
> Sent: Tuesday, May 28, 2024 10:08 PM
> To: devel@edk2.groups.io
> Cc: Attar, AbdulLateef (Abdul Lateef) ; Chang,
> Abner ; Grimes, Paul
> Subject: [edk2-platforms 2/3] AmdPlatformPkg: Implements
> SmmCorePlatformHookLib library
>
> Implements SmmCorePlatformHookLib library for AMD platform.
>
> Cc: Abner Chang
> Cc: Paul Grimes
> Signed-off-by: Abdul Lateef Attar
> ---
> .../AMD/AmdPlatformPkg/AmdPlatformPkg.dec | 5 +
> .../AMD/AmdPlatformPkg/AmdPlatformPkg.dsc | 6 +
> .../Library/AmdSmmCorePlatformHookLib.h | 68 +++
> .../SmmCorePlatformHookLib.c | 169 ++
> .../SmmCorePlatformHookLib.inf| 39
> .../SmmCorePlatformHookLib.uni| 11 ++
> 6 files changed, 298 insertions(+)
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Include/Library/AmdSmmCorePlatformHoo
> kLib.h
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Library/SmmCorePlatformHookLib/SmmCor
> ePlatformHookLib.c
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Library/SmmCorePlatformHookLib/SmmCor
> ePlatformHookLib.inf
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Library/SmmCorePlatformHookLib/SmmCor
> ePlatformHookLib.uni
>
> diff --git a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
> b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
> index 106820dc85..3020e628a3 100644
> --- a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
> +++ b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
> @@ -21,6 +21,11 @@
>## @libraryclass Defines a get/set interface for platform specific data.
>PlatformSocLib|Include/Library/AmdPlatformSocLib.h
>
> + ## @libraryclass AMD SMM core platform hook library
> + # Provide the functions to register hook before and
> + # after SMM dispatcher.
> +
> SmmCorePlatformHookLib|Include/Library/AmdSmmCorePlatformHookLib.h
> +
> [Guids]
>gAmdPlatformPkgTokenSpaceGuid = { 0x663DE733, 0x70E0, 0x4D37,
> { 0xBB, 0x30, 0x7D, 0x9E, 0xAF, 0x9B, 0xDA, 0xE9 }}
>
> diff --git a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
> b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
> index d11d3594e3..482e6f2f30 100644
> --- a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
> +++ b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
> @@ -62,6 +62,9 @@
>
> MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemor
> yAllocationLib.inf
>
> PlatformSocLib|AmdPlatformPkg/Library/DxePlatformSocLib/DxePlatformSoc
> LibNull.inf
>
> +[LibraryClasses.common.SMM_CORE]
> +
> SmmCorePlatformHookLib|AmdPlatformPkg/Library/SmmCorePlatformHook
> Lib/SmmCorePlatformHookLib.inf
> +
> [Components]
>
> AmdPlatformPkg/Library/BaseAlwaysFalseDepexLib/BaseAlwaysFalseDepexLi
> b.inf
>AmdPlatformPkg/Library/DxePlatformSocLib/DxePlatformSocLibNull.inf
> @@ -73,3 +76,6 @@
>AmdPlatformPkg/Universal/LogoDxe/LogoDxe.inf
> #
> Server platfrom Bitmap logo driver
>AmdPlatformPkg/Universal/LogoDxe/S3LogoDxe.inf
>AmdPlatformPkg/Universal/SmbiosCommonDxe/SmbiosCommonDxe.inf
> +
> +[Components.common.SMM_CORE]
> +
> AmdPlatformPkg/Library/SmmCorePlatformHookLib/SmmCorePlatformHook
> Lib.inf
> diff --git
> a/Platform/AMD/AmdPlatformPkg/Include/Library/AmdSmmCorePlatformHo
> okLib.h
> b/Platform/AMD/AmdPlatformPkg/Include/Library/AmdSmmCorePlatformHo
> okLib.h
> new file mode 100644
> index 00..6ae76920b4
> --- /dev/null
> +++
> b/Platform/AMD/AmdPlatformPkg/Include/Library/AmdSmmCorePlatformHo
> okLib.h
> @@ -0,0 +1,68 @@
> +/** @file
> + AMD Smm Core Platform Hook Library
> +
> + Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef AMD_SMM_CORE_PLATFORM_HOOK_LIB_
> +#define AMD_SMM_CORE_PLATFORM_HOOK_LIB_
> +
> +/**
> + This is the prototype of SMM Dispatcher hook before.
> +
> + @retval EFI_STATUS
> +
> +**/
> +typedef
> +EFI_STATUS
> +(EFIAPI *AMD_SMM_DISPATCH_HOOK_BEFORE)(
> + VOID
> + );
> +
> +/**
> + This is the prototype of SMM Dispatcher after before.
> +
> + @retval EFI_STATUS
> +
> +**/
> +typedef
> +EFI_STATUS
> +(EFIAPI *AMD_SMM_DISPATCH_HOOK_AFTER)(
> + VOID
> + );
> +
> +typedef UINT32 AMD_SMM_DISPATCH_HOOK_PRIORITY;
> +
> +///
> +/// This is the structure of the SMM Dispatcher hook record
> +///
> +typedef struct {
> + LIST_ENTRYNextList; ///< Point to
> next
> AMD_SMM_DISPATCH_HOOK.
> + AMD_SMM_DISPATCH_HOOK_BEFORE AmdSmmDispatchHookBefore;
> ///< The hook before function.
> + AMD_SMM_DISPATCH_HOOK_AFTER AmdSmmDispatchHookAfter; ///<
> The hook after function.
> + AMD_SMM_DISPATCH_HOOK_PRIORITYPriority; ///< The
> priority
> of this hook instance.
> + ///<
Re: [edk2-devel] [edk2-platforms 3/3] AmdPlatformPkg: Adds SPI smm core platform hook
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Abner Chang
> -Original Message-
> From: Abdul Lateef Attar
> Sent: Tuesday, May 28, 2024 10:08 PM
> To: devel@edk2.groups.io
> Cc: Attar, AbdulLateef (Abdul Lateef) ; Chang,
> Abner ; Grimes, Paul
> Subject: [edk2-platforms 3/3] AmdPlatformPkg: Adds SPI smm core platform
> hook
>
> Register a smm core platform hook handler for SPI device,
> using AMD SmmCorePlatformHookLib library.
>
> This platform hook saves the SPI host controller state.
>
> Cc: Abner Chang
> Cc: Paul Grimes
> Signed-off-by: Abdul Lateef Attar
> ---
> .../AMD/AmdPlatformPkg/AmdPlatformPkg.dec | 3 +
> .../AMD/AmdPlatformPkg/AmdPlatformPkg.dsc | 2 +
> .../Include/Protocol/AmdSpiSmmHcState.h | 107 +
> .../SmmCoreAmdSpiHcHookLib.c | 145 ++
> .../SmmCoreAmdSpiHcHookLib.h | 20 +++
> .../SmmCoreAmdSpiHcHookLib.inf| 41 +
> .../SmmCoreAmdSpiHcHookLib.uni| 11 ++
> 7 files changed, 329 insertions(+)
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Include/Protocol/AmdSpiSmmHcState.h
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Library/SmmCoreAmdSpiHcHookLib/SmmC
> oreAmdSpiHcHookLib.c
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Library/SmmCoreAmdSpiHcHookLib/SmmC
> oreAmdSpiHcHookLib.h
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Library/SmmCoreAmdSpiHcHookLib/SmmC
> oreAmdSpiHcHookLib.inf
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Library/SmmCoreAmdSpiHcHookLib/SmmC
> oreAmdSpiHcHookLib.uni
>
> diff --git a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
> b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
> index 3020e628a3..907c5b9b74 100644
> --- a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
> +++ b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
> @@ -29,6 +29,9 @@
> [Guids]
>gAmdPlatformPkgTokenSpaceGuid = { 0x663DE733, 0x70E0, 0x4D37,
> { 0xBB, 0x30, 0x7D, 0x9E, 0xAF, 0x9B, 0xDA, 0xE9 }}
>
> +[Protocols]
> + gAmdSpiHcStateProtocolGuid = { 0x189566ab, 0x245, 0x43ae, {0x9d,
> 0x1, 0xd2, 0x21, 0x1c, 0xb9, 0x1a, 0xda }}
> +
> [PcdsDynamic]
>## Event GUID to trigger logo displaying
># Default set to
> gMinPlatformPkgTokenSpaceGuid.gBdsEventAfterConsoleReadyBeforeBootO
> ptionGuid
> diff --git a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
> b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
> index 482e6f2f30..012270074d 100644
> --- a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
> +++ b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
> @@ -64,6 +64,7 @@
>
> [LibraryClasses.common.SMM_CORE]
>
> SmmCorePlatformHookLib|AmdPlatformPkg/Library/SmmCorePlatformHook
> Lib/SmmCorePlatformHookLib.inf
> +
> SmmCoreAmdSpiHcHookLib|AmdPlatformPkg/Library/SmmCoreAmdSpiHcH
> ookLib/SmmCoreAmdSpiHcHookLib.inf
>
> [Components]
>
> AmdPlatformPkg/Library/BaseAlwaysFalseDepexLib/BaseAlwaysFalseDepexLi
> b.inf
> @@ -79,3 +80,4 @@
>
> [Components.common.SMM_CORE]
>
> AmdPlatformPkg/Library/SmmCorePlatformHookLib/SmmCorePlatformHook
> Lib.inf
> +
> AmdPlatformPkg/Library/SmmCoreAmdSpiHcHookLib/SmmCoreAmdSpiHcH
> ookLib.inf
> diff --git
> a/Platform/AMD/AmdPlatformPkg/Include/Protocol/AmdSpiSmmHcState.h
> b/Platform/AMD/AmdPlatformPkg/Include/Protocol/AmdSpiSmmHcState.h
> new file mode 100644
> index 00..0e2bccb3ef
> --- /dev/null
> +++
> b/Platform/AMD/AmdPlatformPkg/Include/Protocol/AmdSpiSmmHcState.h
> @@ -0,0 +1,107 @@
> +/** @file
> + Header file of AMD SMM SPI host controller state protocol
> +
> + Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +**/
> +
> +#ifndef AMD_SMM_SPI_HC_STATE_PROTOCOL_H_
> +#define AMD_SMM_SPI_HC_STATE_PROTOCOL_H_
> +
> +typedef struct _SMM_EFI_SPI_HC_STATE_PROTOCOL
> SMM_EFI_SPI_HC_STATE_PROTOCOL;
> +
> +/**
> + Save/Restore the state of the SPI Host Controller
> +
> + Use a chipset specific method to save the state of the SPI Host controller
> so
> + it can be used without disturbing other transactions.
> +
> + @param[in] This Pointer to an SMM_EFI_SPI_HC_STATE_PROTOCOL
> structure.
> +
> + @retval EFI_SUCCESSThe State was saved successfully
> + @retval DEVICE_ERROR SPI Executes command failed
> +
> +**/
> +typedef EFI_STATUS
> +(EFIAPI *SMM_SPI_HC_STATE)(
> + IN CONST SMM_EFI_SPI_HC_STATE_PROTOCOL *This
> + );
> +
> +/**
> + Lock/Unlock the SPI host controller register
> +
> + Use a chipset specific method to lock or unlock SPI host controller
> register.
> +
> + @param[in] This Pointer to an SMM_EFI_SPI_HC_STATE_PROTOCOL
> structure.
> +
> + @retval EFI_SUCCESS The clock was set up successfully
> + @retval DEVICE_ERROR SPI Executes command failed
> +
> +
> +**/
> +typedef EFI_STATUS
> +(EFIAPI *SMM_SPI_HC_LOCK_UNLOCK)(
> + IN CONST SMM_EFI_SPI_HC_STATE_PROTOCOL *This
> + );
> +
> +/**
> +
Re: [edk2-devel] [edk2-platforms 1/3] AmdPlatformPkg: Removes unused gBoardBdsBootFromDevicePathProtocolGuid
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Abner Chang
> -Original Message-
> From: Abdul Lateef Attar
> Sent: Tuesday, May 28, 2024 10:08 PM
> To: devel@edk2.groups.io
> Cc: Attar, AbdulLateef (Abdul Lateef) ; Chang,
> Abner ; Grimes, Paul
> Subject: [edk2-platforms 1/3] AmdPlatformPkg: Removes unused
> gBoardBdsBootFromDevicePathProtocolGuid
>
> Removes unused gBoardBdsBootFromDevicePathProtocolGuid protocol,
> and its corresponding code changes.
> Adds missing Pcd/SmbiosPcd.h file.
>
> Cc: Abner Chang
> Cc: Paul Grimes
> Signed-off-by: Abdul Lateef Attar
> ---
> .../AmdPlatformPkg/Include/Pcd/SmbiosPcd.h| 58
> .../SmbiosCommonDxe/DefaultLomDevicePath.c| 130 --
> .../Universal/SmbiosCommonDxe/SmbiosCommon.h | 12 --
> .../SmbiosCommonDxe/SmbiosCommonDxe.inf | 3 -
> .../SmbiosCommonDxe/SmbiosCommonEntryPoint.c | 2 -
> 5 files changed, 58 insertions(+), 147 deletions(-)
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Include/Pcd/SmbiosPcd.h
> delete mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/DefaultLom
> DevicePath.c
>
> diff --git a/Platform/AMD/AmdPlatformPkg/Include/Pcd/SmbiosPcd.h
> b/Platform/AMD/AmdPlatformPkg/Include/Pcd/SmbiosPcd.h
> new file mode 100644
> index 00..2dd0480df9
> --- /dev/null
> +++ b/Platform/AMD/AmdPlatformPkg/Include/Pcd/SmbiosPcd.h
> @@ -0,0 +1,58 @@
> +/** @file
> + Miscellaneous smbios data structures.
> +
> + Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +**/
> +
> +#ifndef AMD_SMBIOS_PCD_H_
> +#define AMD_SMBIOS_PCD_H_
> +
> +#include
> +#include
> +
> +#define AMD_SMBIOS_TYPE8_MAX_PORT_CONNETORS16
> +#define AMD_SMBIOS_TYPE41_MAX_ONBOARD_DEVICES 16
> +
> +typedef struct {
> + CHAR8IntDesignatorStr[SMBIOS_STRING_MAX_LENGTH];
> + CHAR8ExtDesignatorStr[SMBIOS_STRING_MAX_LENGTH];
> +} PORT_CONNECTOR_STR;
> +
> +//
> +// AMD SMBIOS type 8 record structure.
> +//
> +typedef struct {
> + SMBIOS_TABLE_TYPE8Type8Data;
> + PORT_CONNECTOR_STRDesinatorStr;
> +} SMBIOS_PORT_CONNECTOR_RECORD;
> +
> +//
> +// AMD SMBIOS type 8 record structure array.
> +//
> +typedef struct {
> + SMBIOS_PORT_CONNECTOR_RECORD
> SmbiosPortConnectorRecords[AMD_SMBIOS_TYPE8_MAX_PORT_CONNETOR
> S];
> +} SMBIOS_PORT_CONNECTOR_RECORD_ARRAY;
> +
> +//
> +// AMD SMBIOS type 41 record structure
> +//
> +typedef struct {
> + SMBIOS_TABLE_STRINGReferenceDesignation;
> + UINT8 DeviceType;
> + UINT8 DeviceEnabled;
> + UINT8 DeviceTypeInstance;
> + UINT16 VendorId;
> + UINT16 DeviceId;
> + CHAR8 RefDesignationStr[SMBIOS_STRING_MAX_LENGTH];
> +} SMBIOS_ONBOARD_DEV_EXT_INFO_RECORD;
> +
> +//
> +// AMD SMBIOS type 41 record structure array.
> +//
> +typedef struct {
> + SMBIOS_ONBOARD_DEV_EXT_INFO_RECORD
> SmbiosOnboardDevExtInfos[AMD_SMBIOS_TYPE41_MAX_ONBOARD_DEVIC
> ES];
> +} SMBIOS_ONBOARD_DEV_EXT_INFO_ARRAY;
> +
> +#endif // AMD_SMBIOS_PCD_H_
> diff --git
> a/Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/DefaultLo
> mDevicePath.c
> b/Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/DefaultLo
> mDevicePath.c
> deleted file mode 100644
> index 92c7aa5e07..00
> ---
> a/Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/DefaultLo
> mDevicePath.c
> +++ /dev/null
> @@ -1,130 +0,0 @@
> -/** @file
> - This file contains the implementation of the DefaultLomDevicePath protocol.
> - The DefaultLomDevicePath protocol is used to identify the default LOM
> device
> - path for the system. The protocol is installed by the SmbiosCommonDxe
> driver
> - and is used by the BDS to identify the default LOM device path for the
> system.
> -
> - Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved.
> -
> - SPDX-License-Identifier: BSD-2-Clause-Patent
> -**/
> -
> -#include
> -#include
> -#include
> -#include
> -#include
> -#include
> -#include
> -#include
> -#include "SmbiosCommon.h"
> -#include
> -#include
> -
> -EFI_HANDLEmBoardBdsHandle = NULL;
> -BOARD_BDS_BOOT_FROM_DEVICE_PATH_PROTOCOL
> mBootDevicePathProtocol;
> -
> -/**
> - Find the Lan-On-Motherboard device path. Installs
> BOARD_BDS_BOOT_FROM_DEVICE_PATH_PROTOCOL
> - with the LOM device path protocol
> -
> - @retval EFI NOT_FOUND LOM device path is not found
> - @retval EFI_SUCCESS LOM device path found
> -**/
> -EFI_STATUS
> -EFIAPI
> -InstallLomDevicePath (
> - )
> -{
> - SMBIOS_ONBOARD_DEV_EXT_INFO_RECORD *DevExtInfoRecord;
> - EFI_STATUS Status;
> - EFI_HANDLE *PciHandles;
> - UINTN PciHandlesSize;
> - UINTN Index;
> - EFI_PCI_IO_PROTOCOL *PciProtocol;
> - PCI_IO_DEVICE
[edk2-devel] [edk2-platforms][PATCH V4 17/17] Platform/ARM/N1Sdp: Enable FaultTolerantWrite Dxe driver for N1Sdp
From: sahil This driver enables Fault Tolerant Write protocol, which provides fault tolerant write capability for block devices. Signed-off-by: sahil --- Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 5 + Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 1 + 2 files changed, 6 insertions(+) diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc index fd630fa08c35..743c2e647b76 100644 --- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc @@ -162,6 +162,10 @@ [PcdsFixedAtBuild.common] gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20 # NOR flash support + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x18F4 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x0002 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x18F2 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x0002 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x18F0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0002 @@ -228,6 +232,7 @@ [Components.common] NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf } + MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf # ACPI Support MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf index 07118725f168..7b7eda51c70c 100644 --- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf @@ -90,6 +90,7 @@ [FV.FvMain] INF MdeModulePkg/Universal/Metronome/Metronome.inf INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf -- 2.25.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119332): https://edk2.groups.io/g/devel/message/119332 Mute This Topic: https://groups.io/mt/106365468/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms][PATCH V4 16/17] Platform/ARM/N1Sdp: Persistent storage for N1Sdp
From: sahil
Enable persistent storage on QSPI flash device.
Signed-off-by: sahil
---
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 19 ++-
Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 2 ++
2 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index 46412bff7d78..fd630fa08c35 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -161,11 +161,9 @@ [PcdsFixedAtBuild.common]
# ACPI Table Version
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
- # Runtime Variable storage
- gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0
- gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE
- gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
- gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800
+ # NOR flash support
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x18F0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0002
#
@@ -197,6 +195,16 @@ [Components.common]
gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x800F
}
+ # NOR flash support
+ Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf {
+
+
NorFlashDeviceLib|Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
+
NorFlashPlatformLib|Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
+ NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf
+
+ gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress|0x1C0C
+ }
+
# Architectural Protocols
ArmPkg/Drivers/CpuDxe/CpuDxe.inf
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
@@ -217,6 +225,7 @@ [Components.common]
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
+
NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
}
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
index 7aae8e6a753b..07118725f168 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
@@ -140,6 +140,8 @@ [FV.FvMain]
INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+ INF Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
+
INF Platform/ARM/Drivers/BootMonFs/BootMonFs.inf
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
--
2.25.1
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[edk2-devel] [edk2-platforms][PATCH V4 15/17] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe
From: sahil In N1Sdp platform, the SoC is connected to IOFPGA which has a Cadence Quad SPI (QSPI) controller. This QSPI controller manages the flash chip device via QSPI bus. This patch adds CadenceQspiNorFlashDeviceLib which is used to manage and access the above configuration. Signed-off-by: sahil --- Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf | 32 + Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h | 46 + Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c | 1034 3 files changed, 1112 insertions(+) diff --git a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf new file mode 100644 index ..506876b62285 --- /dev/null +++ b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf @@ -0,0 +1,32 @@ +#/** @file +# +# Component description file for CadenceQspiNorFlashDeviceLib Library +# +# Copyright (c) 2024, Arm Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION= 0x00010005 + BASE_NAME = CadenceQspiNorFlashDeviceLib + FILE_GUID = ed172366-066b-4998-9b5e-ca7f385a170b + MODULE_TYPE= DXE_RUNTIME_DRIVER + VERSION_STRING = 1.0 + LIBRARY_CLASS = NorFlashDeviceLib + +[Sources.common] + CadenceQspiNorFlashDeviceLib.c + CadenceQspiNorFlashDeviceLib.h + +[Packages] + MdePkg/MdePkg.dec + Platform/ARM/ARM.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + IoLib + TimerLib diff --git a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h new file mode 100644 index ..951a93481dd1 --- /dev/null +++ b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h @@ -0,0 +1,46 @@ +/** @file + + Copyright (c) 2024, ARM Limited. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ +#define CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ + +#define NOR_FLASH_ERASE_RETRY 10 + +// QSPI Controller defines +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OFFSET 0x90 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_EXECUTE0x01 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_ENABLE0x01 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BIT_POS 19 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS 16 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_STATUS_BIT 0x02 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OPCODE_BIT_POS 24 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_ENABLE0x01 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_BYTE_3B 0x02 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READEN_BIT_POS 23 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS 20 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_8C 0x8 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_BIT_POS 7 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_DATA_BYTES(x) ((x - 1) << CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS) +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_ADDR_BYTES(x) ((x - 1) << CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS) + +#define CDNS_QSPI_FLASH_CMD_READ_DATA_REG_OFFSET 0xA0 + +#define CDNS_QSPI_FLASH_CMD_ADDR_REG_OFFSET 0x94 + +#define CDNS_QSPI_FLASH_CMD_STATUS_POLL_TIMEOUT_MS 1000u // Command Status Register read timeout + +#define SPINOR_SR_WIP BIT0 // Write in progress + +#define SPINOR_OP_WREN 0x06 // Write enable +#define SPINOR_OP_BE_4K 0x20 // Erase 4KiB block +#define SPINOR_OP_RDID 0x9f // Read JEDEC ID +#define SPINOR_OP_RDSR 0x05 // Read status register + +#define SPINOR_SR_WIP_POLL_TIMEOUT_MS 1000u // Status Register read timeout + +#endif /* CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ */ diff --git a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c new file mode 100644 index ..f97c8d51fd48 --- /dev/null +++ b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c @@ -0,0 +1,1034 @@ +/** @file + + Copyright (c) 2024 ARM Limited. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include +#include + +#include "CadenceQspiNorFlashDeviceLib.h" + +/** + Converts milliseconds into number of ticks of the performance counter. + + @param[in] Milliseconds Milliseconds to convert into ticks. + + @retval Milliseconds expressed as number of
[edk2-devel] [edk2-platforms][PATCH V4 14/17] Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp
From: sahil
Add NOR flash library, this library provides APIs for getting the list
of NOR flash devices on the platform.
This flash is shared between AP core and System Control Processor. The
lower addresses are used to store SCP and AP boot images and higher
addresses will be used for variable storage.
Signed-off-by: sahil
---
Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf | 35 +
Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 1 +
Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c | 80
3 files changed, 116 insertions(+)
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
new file mode 100644
index ..a9495cf667d5
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
@@ -0,0 +1,35 @@
+## @file
+# NOR flash lib for ARM Neoverse N1 platform.
+#
+# Copyright (c) 2024, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION= 0x0001001B
+ BASE_NAME = NorFlashNeoverseN1SocLib
+ FILE_GUID = 7006fcf1-a585-4272-92e3-b286b1dff5bb
+ MODULE_TYPE= DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = NorFlashPlatformLib
+
+[Sources.common]
+ NorFlashLib.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Platform/ARM/ARM.dec
+ Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+
+[FixedPcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
index 2dae57a0f01a..2a592e5adc2f 100644
--- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
+++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
@@ -47,6 +47,7 @@
// SCP QSPI flash device
#define NEOVERSEN1SOC_SCP_QSPI_AHB_BASE 0x1800
#define NEOVERSEN1SOC_SCP_QSPI_AHB_SZ0x200
+#define NEOVERSEN1SOC_FIRMWARE_IAMGES_SZ 0x80
/*
* Platform information structure stored in Non-secure SRAM. Platform
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
new file mode 100644
index ..a354ffb5ac6d
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
@@ -0,0 +1,80 @@
+/** @file
+* NOR flash lib for ARM Neoverse N1 platform
+*
+* Copyright (c) 2024, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include
+#include
+#include
+#include
+
+#define FW_ENV_REGION_BASE FixedPcdGet32 (PcdFlashNvStorageVariableBase)
+#define FW_ENV_REGION_SIZE (FixedPcdGet32 (PcdFlashNvStorageVariableSize) + \
+FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + \
+FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize))
+
+STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] = {
+ {
+/// Environment variable region
+NEOVERSEN1SOC_SCP_QSPI_AHB_BASE,///< device base
+FW_ENV_REGION_BASE, ///< region base
+FW_ENV_REGION_SIZE, ///< region size
+SIZE_4KB, ///< block size
+ },
+};
+
+/**
+ Dummy implementation of NorFlashPlatformInitialization to
+ comply with NorFlashPlatformLib structure.
+
+ @retvalEFI_SUCCESSSuccess.
+**/
+EFI_STATUS
+NorFlashPlatformInitialization (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+/**
+ Get NOR flash region info
+
+ @param[out]NorFlashDevicesNOR flash regions info.
+ @param[out]Count number of flash instance.
+
+ @retvalEFI_SUCCESSSuccess.
+ @retvalEFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retvalEFI_ACCESS_DENIED Invalid variable region address.
+**/
+EFI_STATUS
+NorFlashPlatformGetDevices (
+ OUT NOR_FLASH_DESCRIPTION **NorFlashDevices,
+ OUT UINT32 *Count
+ )
+{
+ if ((NorFlashDevices == NULL) || (Count == NULL)) {
+return EFI_INVALID_PARAMETER;
+ }
+
+ if ((NEOVERSEN1SOC_SCP_QSPI_AHB_BASE +
+ NEOVERSEN1SOC_FIRMWARE_IAMGES_SZ) >=
+ FW_ENV_REGION_BASE)
+ {
+DEBUG ((
+ DEBUG_ERROR,
+ "NorFlashPlatformInitialization: Variable region overlapping with "
+ "firmware region.\n"
+ ));
+
+return EFI_ACCESS_DENIED;
+ }
+
+ *NorFlashDevices = mNorFlashDevices;
+ *Count = ARRAY_SIZE (mNorFlashDevices);
+ return
[edk2-devel] [edk2-platforms][PATCH V4 13/17] Silicon/ARM/NeoverseN1Soc: Enable SCP QSPI flash region
From: sahil
Enable SCP QSPI flash region access by adding it in the PlatformLibMem.
This flash is shared between AP core and System Control Processor. The
lower addresses are used to store SCP and AP boot images and higher
addresses will be used for variable storage.
Signed-off-by: sahil
---
Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 7 +++
Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c | 8 +++-
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
index 5483e7bc5f68..2dae57a0f01a 100644
--- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
+++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
@@ -4,6 +4,9 @@
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
+* Arm Neoverse N1 System Development Platform Technical Reference Manual
+* https://developer.arm.com/documentation/101489//?lang=en
+*
**/
#ifndef NEOVERSEN1SOC_PLATFORM_H_
@@ -41,6 +44,10 @@
#define NEOVERSEN1SOC_EXP_PERIPH_BASE0 0x1C00
#define NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ0x130
+// SCP QSPI flash device
+#define NEOVERSEN1SOC_SCP_QSPI_AHB_BASE 0x1800
+#define NEOVERSEN1SOC_SCP_QSPI_AHB_SZ0x200
+
/*
* Platform information structure stored in Non-secure SRAM. Platform
* information are passed from the trusted firmware with the below structure
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
index 80daedb33416..282bfbc81736 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
@@ -14,7 +14,7 @@
#include
// The total number of descriptors, including the final "end-of-table"
descriptor.
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 19
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 20
/**
Returns the Virtual Memory Map of the platform.
@@ -203,6 +203,12 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[Index].Length =
NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ;
VirtualMemoryTable[Index].Attributes =
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+ // SCP QSPI flash device
+ VirtualMemoryTable[++Index].PhysicalBase = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;
+ VirtualMemoryTable[Index].VirtualBase = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;
+ VirtualMemoryTable[Index].Length = NEOVERSEN1SOC_SCP_QSPI_AHB_SZ;
+ VirtualMemoryTable[Index].Attributes =
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
if (PlatInfo->MultichipMode == 1) {
//Remote DDR (2GB)
VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdExtMemorySpace) +
--
2.25.1
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[edk2-devel] [edk2-platforms][PATCH V4 12/17] Platform/ARM: Add optional provision to fetch and print NOR Flash info
From: sahil This patch adds an optional functionality in NorFlashDxe to fetch and print NOR Flash information from NorFlashInfoLib using its JEDEC ID. NOR Flash libraries will implement a function "NorFlashReadID" which will fetch and return JEDEC ID. This JEDEC ID can be then printed along with the NOR Flash info by NorFlashInfoLib. If this functionality is not needed then the function can just return EFI_UNSUPPORTED. Signed-off-by: sahil --- Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 2 ++ Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc| 2 ++ Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc | 2 ++ Platform/ARM/JunoPkg/ArmJuno.dsc | 2 ++ Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc| 2 ++ Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf | 1 + Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf| 1 + Platform/ARM/Include/Library/NorFlashDeviceLib.h | 17 + Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c | 18 ++ Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 18 ++ Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.c | 18 ++ 11 files changed, 83 insertions(+) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc index 3dcf422eab4b..107a5311b666 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc @@ -36,6 +36,8 @@ [LibraryClasses.common] LcdPlatformLib|Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgiLib.inf NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf + # NOR flash identification support + NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc index ab0e2a957a1b..19fd08dd7817 100644 --- a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc @@ -65,6 +65,8 @@ [LibraryClasses.common.MM_STANDALONE] IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/StandaloneMmNorFlashLib.inf + # NOR flash identification support + NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNull/PlatformSecureLibNull.inf diff --git a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc index 70ff049d3248..f7f7b39bbf58 100644 --- a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc +++ b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc @@ -95,6 +95,8 @@ [LibraryClasses.common] ArmPlatformSysConfigLib|Platform/ARM/VExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf + # NOR flash identification support + NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf # ARM PL031 RTC Driver diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc index 81d2cbe4359f..1ca43b9e7dba 100644 --- a/Platform/ARM/JunoPkg/ArmJuno.dsc +++ b/Platform/ARM/JunoPkg/ArmJuno.dsc @@ -42,6 +42,8 @@ [LibraryClasses.common] NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/JunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf + # NOR flash identification support + NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf diff --git a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc index a5805da49c92..a0a9d9a21a1b 100644 --- a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc +++ b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc @@ -102,6 +102,8 @@ [LibraryClasses.common.MM_STANDALONE] !if $(ENABLE_UEFI_SECURE_VARIABLE) == TRUE
[edk2-devel] [edk2-platforms][PATCH V4 11/17] Platform/ARM/NorFlashDxe: Fix memory leak in NorFlashCreateInstance()
From: sahil
This patch adds error_handler1 and error_handler2 labels in
NorFlashCreateInstance() function to handle the cleanup.
error_handler1: Frees just the Instance structure as the
ShadowBuffer is not allocated yet.
error_handler2: Frees both Instance and Instance->ShadowBuffer.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c | 16 +++-
Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 17 -
2 files changed, 23 insertions(+), 10 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
index e01b05d91978..ebe985bdf02b 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -135,7 +135,8 @@ NorFlashCreateInstance (
Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);
if (Instance->ShadowBuffer == NULL) {
-return EFI_OUT_OF_RESOURCES;
+Status = EFI_OUT_OF_RESOURCES;
+goto error_handler1;
}
if (SupportFvb) {
@@ -152,8 +153,7 @@ NorFlashCreateInstance (
NULL
);
if (EFI_ERROR (Status)) {
- FreePool (Instance);
- return Status;
+ goto error_handler2;
}
} else {
Status = gBS->InstallMultipleProtocolInterfaces (
@@ -167,13 +167,19 @@ NorFlashCreateInstance (
NULL
);
if (EFI_ERROR (Status)) {
- FreePool (Instance);
- return Status;
+ goto error_handler2;
}
}
*NorFlashInstance = Instance;
return Status;
+
+error_handler2:
+ FreePool (Instance->ShadowBuffer);
+
+error_handler1:
+ FreePool (Instance);
+ return Status;
}
EFI_STATUS
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
index 16fe3762e125..6bfbf58f6907 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
@@ -129,7 +129,8 @@ NorFlashCreateInstance (
Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);
if (Instance->ShadowBuffer == NULL) {
-return EFI_OUT_OF_RESOURCES;
+Status = EFI_OUT_OF_RESOURCES;
+goto error_handler1;
}
if (SupportFvb) {
@@ -142,17 +143,23 @@ NorFlashCreateInstance (
>FvbProtocol
);
if (EFI_ERROR (Status)) {
- FreePool (Instance);
- return Status;
+ goto error_handler2;
}
} else {
DEBUG ((DEBUG_ERROR, "standalone MM NOR Flash driver only support
FVB.\n"));
-FreePool (Instance);
-return EFI_UNSUPPORTED;
+Status = EFI_UNSUPPORTED;
+goto error_handler2;
}
*NorFlashInstance = Instance;
return Status;
+
+error_handler2:
+ FreePool (Instance->ShadowBuffer);
+
+error_handler1:
+ FreePool (Instance);
+ return Status;
}
EFI_STATUS
--
2.25.1
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[edk2-devel] [edk2-platforms][PATCH V4 10/17] Platform/ARM: Add HostControllerBaseAddress variable
From: sahil
This variable holds the QSPI controller's base address.
It is defined in ARM.dec as well with the default value of 0x0.
In case a platform is not using it, they can just ignore this
variable and the default value of 0x0 will be propogated and
the variable will not be used.
Signed-off-by: sahil
---
Platform/ARM/ARM.dec | 3 ++
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf | 3 ++
Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf | 2 ++
Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h | 1 +
Platform/ARM/Include/Library/NorFlashDeviceLib.h | 11 ---
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c| 34
+---
Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 12 ---
7 files changed, 54 insertions(+), 12 deletions(-)
diff --git a/Platform/ARM/ARM.dec b/Platform/ARM/ARM.dec
index 86d1fcb4878e..a5e28c372903 100644
--- a/Platform/ARM/ARM.dec
+++ b/Platform/ARM/ARM.dec
@@ -26,3 +26,6 @@ [Guids]
[PcdsFeatureFlag.common]
gPlatformArmTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x001
+
+[PcdsFixedAtBuild.common]
+ gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress|0x0|UINT32|0x0002
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
index de160025b632..6522968d6c5a 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
@@ -65,5 +65,8 @@ [Pcd.common]
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+[FixedPcd]
+ gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress
+
[Depex]
gEfiCpuArchProtocolGuid
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
index d9e7de07165c..eb86d423f106 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
@@ -59,5 +59,7 @@ [FixedPcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+ gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress
+
[Depex]
TRUE
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
index 7fcb949843e8..98464e4868b1 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
@@ -34,6 +34,7 @@
//
EFI_STATUS
NorFlashCreateInstance (
+ IN UINTNHostRegisterBase,
IN UINTNNorFlashDeviceBase,
IN UINTNNorFlashRegionBase,
IN UINTNNorFlashSize,
diff --git a/Platform/ARM/Include/Library/NorFlashDeviceLib.h
b/Platform/ARM/Include/Library/NorFlashDeviceLib.h
index 6833c1ddc456..348136630e78 100644
--- a/Platform/ARM/Include/Library/NorFlashDeviceLib.h
+++ b/Platform/ARM/Include/Library/NorFlashDeviceLib.h
@@ -36,10 +36,13 @@ struct _NOR_FLASH_INSTANCE {
UINT32 Signature; ///< NOR Flash instance
signature.
EFI_HANDLE Handle;///< NOR Flash instance
handle.
- UINTN DeviceBaseAddress; ///< NOR Flash
device base address.
- UINTN RegionBaseAddress; ///< NOR Flash
region base address.
- UINTN Size; ///< NOR Flash
region size.
- EFI_LBAStartLba; ///< Region start
LBA.
+ UINTN HostControllerBaseAddress; ///< NOR
Flash host controller base address.
+///< This
field is optional if no host
+///<
controller is present.
+ UINTN DeviceBaseAddress; ///< NOR
Flash device base address.
+ UINTN RegionBaseAddress; ///< NOR
Flash region base address.
+ UINTN Size; ///< NOR
Flash region size.
+ EFI_LBAStartLba; ///<
Region start LBA.
EFI_BLOCK_IO_PROTOCOL BlockIoProtocol; ///< Instance's
Block IO protocol handle.
EFI_BLOCK_IO_MEDIA Media; ///< Instance's
Media information.
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
index 1c12572ab663..e01b05d91978 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -1,6 +1,6 @@
/** @file NorFlashDxe.c
- Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.
+ Copyright
[edk2-devel] [edk2-platforms][PATCH V4 09/17] Platform/ARM/NorFlashDxe: Switch from NorFlash.c to NorFlashDeviceLib
From: sahil NorFlashDeviceLib can be used to provide implementations of different NOR Flash to NorFlashDxe, i.e. NorFlashDxe links with NorFlashDeviceLib and the platforms can specify their respective NorFlashDeviceLib instances. This patch adds the following major changes: 1. Adds changes in NorFlashDxe to look for NorFlashDeviceLib instead of NorFlash.c for flash specific implementation 2. Remove NorFlash.c and NorFlash.h as they are no longer required. 3. Add changes to platform description files to provide P30NorFlashDeviceLib as NorFlashDeviceLib Signed-off-by: sahil --- Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 1 + Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc | 1 + Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc | 1 + Platform/ARM/JunoPkg/ArmJuno.dsc | 1 + Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc | 1 + Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf | 5 +- Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf | 6 +- Platform/ARM/Drivers/NorFlashDxe/NorFlash.h | 108 --- Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 956 Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c | 1 - Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c| 1 - Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c| 1 - Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 1 - 13 files changed, 7 insertions(+), 1077 deletions(-) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc index 1bf489ffeb39..3dcf422eab4b 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc @@ -34,6 +34,7 @@ [LibraryClasses.common] BasePathLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf LcdHwLib|ArmPlatformPkg/Library/HdLcd/HdLcd.inf LcdPlatformLib|Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgiLib.inf + NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc index 0dd9ebbfc16c..ab0e2a957a1b 100644 --- a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc @@ -63,6 +63,7 @@ [LibraryClasses.common.MM_STANDALONE] AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf BaseCryptLib|CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf + NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/StandaloneMmNorFlashLib.inf OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf diff --git a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc index 9f51e05af561..70ff049d3248 100644 --- a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc +++ b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc @@ -93,6 +93,7 @@ [LibraryClasses.common] # Versatile Express Specific Libraries PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf ArmPlatformSysConfigLib|Platform/ARM/VExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf + NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc index 7fe796a53433..81d2cbe4359f 100644 --- a/Platform/ARM/JunoPkg/ArmJuno.dsc +++ b/Platform/ARM/JunoPkg/ArmJuno.dsc @@ -40,6 +40,7 @@ [LibraryClasses.common] ArmPlatformLib|Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf + NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/JunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf diff --git a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc index 0e77b76cae69..a5805da49c92 100644 --- a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc +++ b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc @@ -100,6 +100,7 @@ [LibraryClasses.common.MM_STANDALONE] # STMM for Variable runtime service. !if $(ENABLE_UEFI_SECURE_VARIABLE) == TRUE +
[edk2-devel] [edk2-platforms][PATCH V4 08/17] Platform/ARM: Add P30NorFlashDeviceLib Library
From: sahil This patch implements functions to interact with P30 NOR Flash. The code is taken from Platform/ARM/Drivers/NorFlashDxe/NorFlash.c file. Signed-off-by: sahil --- Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf | 35 + Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h | 98 ++ Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.c | 953 3 files changed, 1086 insertions(+) diff --git a/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf new file mode 100644 index ..0707edb54442 --- /dev/null +++ b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf @@ -0,0 +1,35 @@ +#/** @file +# +# Component description file for P30NorFlashDeviceLib library +# +# Copyright (c) 2011 - 2024, Arm Limited. All rights reserved. +# Copyright (c) 2020, Linaro, Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION= 0x00010005 + BASE_NAME = P30NorFlashDeviceLib + FILE_GUID = ed172366-066b-4998-9b5e-ca7f385a1709 + MODULE_TYPE= DXE_DRIVER + VERSION_STRING = 1.0 + LIBRARY_CLASS = NorFlashDeviceLib + +[Sources.common] + P30NorFlashDeviceLib.c + P30NorFlashDeviceLib.h + +[Packages] + MdePkg/MdePkg.dec + Platform/ARM/ARM.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + IoLib + +[Pcd.common] + gPlatformArmTokenSpaceGuid.PcdNorFlashCheckBlockLocked diff --git a/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h new file mode 100644 index ..c310b2310d62 --- /dev/null +++ b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h @@ -0,0 +1,98 @@ +/** @file P30NorFlashDeviceLib.h + + Copyright (c) 2011 - 2024, Arm Limited. All rights reserved. + Copyright (c) 2020, Linaro, Ltd. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef P30_NOR_FLASH_DEVICE_LIB_H_ +#define P30_NOR_FLASH_DEVICE_LIB_H_ + +#define NOR_FLASH_ERASE_RETRY 10 + +// Device access macros +// These are necessary because we use 2 x 16bit parts to make up 32bit data + +#define HIGH_16_BITS 0x +#define LOW_16_BITS 0x +#define LOW_8_BITS0x00FF + +#define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) ) + +#define GET_LOW_BYTE(value) ( value & LOW_8_BITS ) +#define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) ) + +// Each command must be sent simultaneously to both chips, +// i.e. at the lower 16 bits AND at the higher 16 bits +#define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2)) +#define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) ) +#define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd)) + +#define BOTH_ALIGNED(a, b, align) UINTN)(a) | (UINTN)(b)) & ((align) - 1)) == 0) + +// Status Register Bits +#define P30_SR_BIT_WRITE(BIT7 << 16 | BIT7) +#define P30_SR_BIT_ERASE_SUSPEND(BIT6 << 16 | BIT6) +#define P30_SR_BIT_ERASE(BIT5 << 16 | BIT5) +#define P30_SR_BIT_PROGRAM (BIT4 << 16 | BIT4) +#define P30_SR_BIT_VPP (BIT3 << 16 | BIT3) +#define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 | BIT2) +#define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1) +#define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0) + +// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family + +// On chip buffer size for buffered programming operations +// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes. +// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes +#define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128) +#define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4)) +#define MAX_BUFFERED_PROG_ITERATIONS 1000 +#define BOUNDARY_OF_32_WORDS 0x7F + +// CFI Addresses +#define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10 +#define P30_CFI_ADDR_VENDOR_ID 0x13 + +// CFI Data +#define CFI_QRY 0x00595251 + +// READ Commands +#define P30_CMD_READ_DEVICE_ID 0x0090 +#define P30_CMD_READ_STATUS_REGISTER 0x0070 +#define P30_CMD_CLEAR_STATUS_REGISTER 0x0050 +#define P30_CMD_READ_ARRAY 0x00FF +#define P30_CMD_READ_CFI_QUERY 0x0098 + +// WRITE Commands +#define P30_CMD_WORD_PROGRAM_SETUP0x0040 +#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010 +#define P30_CMD_BUFFERED_PROGRAM_SETUP0x00E8 +#define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0 +#define P30_CMD_BEFP_SETUP0x0080 +#define P30_CMD_BEFP_CONFIRM 0x00D0 + +// ERASE Commands +#define P30_CMD_BLOCK_ERASE_SETUP
[edk2-devel] [edk2-platforms][PATCH V4 07/17] Platform/ARM: Create NorFlashDeviceLib library interface for flash specific functions
From: sahil
NorFlashDeviceLib can be used to provide implementations of different
NOR Flash to NorFlashDxe, i.e. NorFlashDxe links with NorFlashDeviceLib
and the platforms can specify their respective NorFlashDeviceLib
instances.
This patch splits NorFlash.h and moves out the function prototypes and
macros that are expected by NorFlashDxe to be implemented by any
Nor Flash implementation to NorFlashDeviceLib.h file.
Signed-off-by: sahil
---
Platform/ARM/ARM.dec | 1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlash.h | 105 +
Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h | 1 +
Platform/ARM/Include/Library/NorFlashDeviceLib.h | 236
4 files changed, 239 insertions(+), 104 deletions(-)
diff --git a/Platform/ARM/ARM.dec b/Platform/ARM/ARM.dec
index be7e6dc83fde..86d1fcb4878e 100644
--- a/Platform/ARM/ARM.dec
+++ b/Platform/ARM/ARM.dec
@@ -17,6 +17,7 @@ [Includes]
[LibraryClasses]
BdsLib|Include/Library/BdsLib.h
+ NorFlashDeviceLib|Include/Library/NorFlashDeviceLib.h
NorFlashPlatformLib|Include/Library/NorFlashPlatformLib.h
[Guids]
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index f30d499042ed..6cb1f64b9875 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -20,6 +20,7 @@
#include
#include
+#include
#define NOR_FLASH_ERASE_RETRY 10
@@ -40,7 +41,6 @@
#define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr) ((BaseAddr) +
((OffsetAddr) << 2))
#define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd
& LOW_16_BITS) )
#define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd)MmioWrite32
(CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))
-#define GET_NOR_BLOCK_ADDRESS(BaseAddr, Lba, LbaSize) ( BaseAddr +
(UINTN)((Lba) * LbaSize) )
// Status Register Bits
#define P30_SR_BIT_WRITE(BIT7 << 16 | BIT7)
@@ -105,107 +105,4 @@
#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060
#define P30_CMD_READ_CONFIGURATION_REGISTER0x0003
-typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;
-
-#pragma pack (1)
-typedef struct {
- VENDOR_DEVICE_PATH Vendor;
- UINT8 Index;
- EFI_DEVICE_PATH_PROTOCOLEnd;
-} NOR_FLASH_DEVICE_PATH;
-#pragma pack ()
-
-struct _NOR_FLASH_INSTANCE {
- UINT32 Signature;
- EFI_HANDLE Handle;
-
- UINTN DeviceBaseAddress;
- UINTN RegionBaseAddress;
- UINTN Size;
- EFI_LBAStartLba;
-
- EFI_BLOCK_IO_PROTOCOL BlockIoProtocol;
- EFI_BLOCK_IO_MEDIA Media;
- EFI_DISK_IO_PROTOCOL DiskIoProtocol;
-
- EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOLFvbProtocol;
- VOID *ShadowBuffer;
-
- NOR_FLASH_DEVICE_PATH DevicePath;
-};
-
-//
-// NorFlash.c
-//
-EFI_STATUS
-NorFlashWriteSingleBlock (
- INNOR_FLASH_INSTANCE *Instance,
- INEFI_LBA Lba,
- INUINTN Offset,
- IN OUTUINTN *NumBytes,
- INUINT8 *Buffer
- );
-
-EFI_STATUS
-NorFlashWriteBlocks (
- IN NOR_FLASH_INSTANCE *Instance,
- IN EFI_LBA Lba,
- IN UINTN BufferSizeInBytes,
- IN VOID*Buffer
- );
-
-EFI_STATUS
-NorFlashReadBlocks (
- IN NOR_FLASH_INSTANCE *Instance,
- IN EFI_LBA Lba,
- IN UINTN BufferSizeInBytes,
- OUT VOID *Buffer
- );
-
-EFI_STATUS
-NorFlashRead (
- IN NOR_FLASH_INSTANCE *Instance,
- IN EFI_LBA Lba,
- IN UINTN Offset,
- IN UINTN BufferSizeInBytes,
- OUT VOID *Buffer
- );
-
-EFI_STATUS
-NorFlashReset (
- IN NOR_FLASH_INSTANCE *Instance
- );
-
-EFI_STATUS
-NorFlashEraseSingleBlock (
- IN NOR_FLASH_INSTANCE *Instance,
- IN UINTN BlockAddress
- );
-
-EFI_STATUS
-NorFlashWriteFullBlock (
- IN NOR_FLASH_INSTANCE *Instance,
- IN EFI_LBA Lba,
- IN UINT32 *DataBuffer,
- IN UINT32 BlockSizeInWords
- );
-
-EFI_STATUS
-NorFlashUnlockAndEraseSingleBlock (
- IN NOR_FLASH_INSTANCE *Instance,
- IN UINTN BlockAddress
- );
-
-VOID
-EFIAPI
-NorFlashLock (
- IN EFI_TPL *OriginalTPL
- );
-
-VOID
-EFIAPI
-NorFlashUnlock (
- IN EFI_TPL OriginalTPL
- );
-
#endif /* __NOR_FLASH_H__ */
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
index c0a3b5861532..7fcb949843e8 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
@@ -19,6 +19,7 @@
#include
#include
+#include
#include
#include
[edk2-devel] [edk2-platforms][PATCH V4 06/17] Platform/ARM/NorFlashDxe: Make local functions STATIC
From: sahil
This patch makes local functions not being used outside
NorFlash.c STATIC.
Also, NorFlashWriteBuffer() is specific to a particular
flash implementation and need not be implemented by
other NOR flash device IPs.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlash.h | 21
Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 3 +++
2 files changed, 3 insertions(+), 21 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index 3102c5e13bad..f30d499042ed 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -134,14 +134,6 @@ struct _NOR_FLASH_INSTANCE {
NOR_FLASH_DEVICE_PATH DevicePath;
};
-EFI_STATUS
-NorFlashWriteBuffer (
- IN NOR_FLASH_INSTANCE *Instance,
- IN UINTN TargetAddress,
- IN UINTN BufferSizeInBytes,
- IN UINT32 *Buffer
- );
-
//
// NorFlash.c
//
@@ -190,19 +182,6 @@ NorFlashEraseSingleBlock (
IN UINTN BlockAddress
);
-EFI_STATUS
-NorFlashUnlockSingleBlockIfNecessary (
- IN NOR_FLASH_INSTANCE *Instance,
- IN UINTN BlockAddress
- );
-
-EFI_STATUS
-NorFlashWriteSingleWord (
- IN NOR_FLASH_INSTANCE *Instance,
- IN UINTN WordAddress,
- IN UINT32 WriteData
- );
-
EFI_STATUS
NorFlashWriteFullBlock (
IN NOR_FLASH_INSTANCE *Instance,
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 15000a692b02..254b8937e210 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -103,6 +103,7 @@ NorFlashUnlockSingleBlock (
return EFI_SUCCESS;
}
+STATIC
EFI_STATUS
NorFlashUnlockSingleBlockIfNecessary (
IN NOR_FLASH_INSTANCE *Instance,
@@ -175,6 +176,7 @@ NorFlashEraseSingleBlock (
return Status;
}
+STATIC
EFI_STATUS
NorFlashWriteSingleWord (
IN NOR_FLASH_INSTANCE *Instance,
@@ -245,6 +247,7 @@ NorFlashWriteSingleWord (
* Therefore, it is a requirement to align buffer writes to 32-bit word
boundaries.
* i.e. the last 4 bits of the target start address must be zero: 0x..00
*/
+STATIC
EFI_STATUS
NorFlashWriteBuffer (
IN NOR_FLASH_INSTANCE *Instance,
--
2.25.1
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[edk2-devel] [edk2-platforms][PATCH V4 05/17] Platform/ARM/NorFlashDxe: Remove unimplemented functions from NorFlash.h
From: sahil
This patch removes NorFlashReadCfiData() and NorFlashWrite()
prototypes from NorFlash.h as these are not implemented or
used anywhere in NorFlashDxe driver.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlash.h | 17 -
1 file changed, 17 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index bd5c6a949cf0..3102c5e13bad 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -134,14 +134,6 @@ struct _NOR_FLASH_INSTANCE {
NOR_FLASH_DEVICE_PATH DevicePath;
};
-EFI_STATUS
-NorFlashReadCfiData (
- IN UINTN DeviceBaseAddress,
- IN UINTN CFI_Offset,
- IN UINT32 NumberOfBytes,
- OUT UINT32 *Data
- );
-
EFI_STATUS
NorFlashWriteBuffer (
IN NOR_FLASH_INSTANCE *Instance,
@@ -187,15 +179,6 @@ NorFlashRead (
OUT VOID *Buffer
);
-EFI_STATUS
-NorFlashWrite (
- INNOR_FLASH_INSTANCE *Instance,
- INEFI_LBA Lba,
- INUINTN Offset,
- IN OUTUINTN *NumBytes,
- INUINT8 *Buffer
- );
-
EFI_STATUS
NorFlashReset (
IN NOR_FLASH_INSTANCE *Instance
--
2.25.1
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[edk2-devel] [edk2-platforms][PATCH V4 04/17] Platform/ARM/NorFlashDxe: Move flash specific functions to NorFlash.c
From: sahil
Refactoring done in this patch has two major parts:
1. Moving out NorFlashUnlockAndEraseSingleBlock and
NorFlashWriteFullBlock functions from NorFlashDxe.c and
NorFlashStandaloneMm.c to NorFlash.c files.
2. At the same time, we are adding NorFlashLock and NorFlashUnlock
functions which will take care of TPL related operations needed by
functions mentioned in point 1. These functions are implemented
in NorFlashDxe.c but are just dummy placeholder functions in
NorFlashStandaloneMm.c file.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlash.h | 26 +++
Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h | 14 --
Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 136 +-
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c | 193
Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 151 +++
5 files changed, 225 insertions(+), 295 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index e0ebb1e2fd35..bd5c6a949cf0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -220,4 +220,30 @@ NorFlashWriteSingleWord (
IN UINT32 WriteData
);
+EFI_STATUS
+NorFlashWriteFullBlock (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN EFI_LBA Lba,
+ IN UINT32 *DataBuffer,
+ IN UINT32 BlockSizeInWords
+ );
+
+EFI_STATUS
+NorFlashUnlockAndEraseSingleBlock (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN UINTN BlockAddress
+ );
+
+VOID
+EFIAPI
+NorFlashLock (
+ IN EFI_TPL *OriginalTPL
+ );
+
+VOID
+EFIAPI
+NorFlashUnlock (
+ IN EFI_TPL OriginalTPL
+ );
+
#endif /* __NOR_FLASH_H__ */
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
index e329e0727617..c0a3b5861532 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
@@ -31,20 +31,6 @@
//
// NorFlashDxe.c
//
-EFI_STATUS
-NorFlashWriteFullBlock (
- IN NOR_FLASH_INSTANCE *Instance,
- IN EFI_LBA Lba,
- IN UINT32 *DataBuffer,
- IN UINT32 BlockSizeInWords
- );
-
-EFI_STATUS
-NorFlashUnlockAndEraseSingleBlock (
- IN NOR_FLASH_INSTANCE *Instance,
- IN UINTN BlockAddress
- );
-
EFI_STATUS
NorFlashCreateInstance (
IN UINTNNorFlashDeviceBase,
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 4e5a97c83c7b..15000a692b02 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -10,7 +10,6 @@
#include
#include "NorFlash.h"
-#include "NorFlashCommon.h"
//
// Global variable declarations
@@ -817,3 +816,138 @@ NorFlashReset (
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
return EFI_SUCCESS;
}
+
+/**
+ * This function unlock and erase an entire NOR Flash block.
+**/
+EFI_STATUS
+NorFlashUnlockAndEraseSingleBlock (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN UINTN BlockAddress
+ )
+{
+ EFI_STATUS Status;
+ UINTN Index;
+ EFI_TPL OriginalTPL;
+
+ NorFlashLock ();
+
+ Index = 0;
+ // The block erase might fail a first time (SW bug ?). Retry it ...
+ do {
+// Unlock the block if we have to
+Status = NorFlashUnlockSingleBlockIfNecessary (Instance, BlockAddress);
+if (EFI_ERROR (Status)) {
+ break;
+}
+
+Status = NorFlashEraseSingleBlock (Instance, BlockAddress);
+Index++;
+ } while ((Index < NOR_FLASH_ERASE_RETRY) && (Status == EFI_WRITE_PROTECTED));
+
+ if (Index == NOR_FLASH_ERASE_RETRY) {
+DEBUG ((DEBUG_ERROR, "EraseSingleBlock(BlockAddress=0x%08x: Block Locked
Error (try to erase %d times)\n", BlockAddress, Index));
+ }
+
+ NorFlashUnlock (OriginalTPL);
+
+ return Status;
+}
+
+EFI_STATUS
+NorFlashWriteFullBlock (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN EFI_LBA Lba,
+ IN UINT32 *DataBuffer,
+ IN UINT32 BlockSizeInWords
+ )
+{
+ EFI_STATUS Status;
+ UINTN WordAddress;
+ UINT32 WordIndex;
+ UINTN BufferIndex;
+ UINTN BlockAddress;
+ UINTN BuffersInBlock;
+ UINTN RemainingWords;
+ EFI_TPL OriginalTPL;
+ UINTN Cnt;
+
+ Status = EFI_SUCCESS;
+
+ // Get the physical address of the block
+ BlockAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress, Lba,
BlockSizeInWords * 4);
+
+ // Start writing from the first address at the start of the block
+ WordAddress = BlockAddress;
+
+ NorFlashLock ();
+
+ Status = NorFlashUnlockAndEraseSingleBlock (Instance, BlockAddress);
+ if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "WriteSingleBlock: ERROR - Failed to Unlock and Erase
the single block at 0x%X\n", BlockAddress));
+goto EXIT;
+ }
+
+ // To speed up
[edk2-devel] [edk2-platforms][PATCH V4 03/17] Platform/ARM/NorFlashDxe: Add NorFlashCommon.h header file
From: sahil
This patch splits NorFlash.h and adds NorFlashCommon.h which
will have all the flash independent functions and macros.
Whereas all the flash specific functions will be in NorFlash.h
header file.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf | 1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf | 1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlash.h | 199
--
Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h | 221
Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c | 1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c| 1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c| 1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 1 +
9 files changed, 228 insertions(+), 199 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
index cdf1f5c27f35..18e99bac 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
@@ -21,6 +21,7 @@ [Sources.common]
NorFlash.h
NorFlashBlockIoDxe.c
NorFlashDxe.c
+ NorFlashCommon.h
NorFlashFvb.c
[Packages]
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
index 001f281220f2..69c40ccf9c27 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
@@ -22,6 +22,7 @@ [Sources.common]
NorFlash.c
NorFlash.h
NorFlashFvb.c
+ NorFlashCommon.h
NorFlashStandaloneMm.c
[Packages]
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index d4d97bd22cc5..e0ebb1e2fd35 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -20,9 +20,6 @@
#include
#include
-#include
-#include
-#include
#define NOR_FLASH_ERASE_RETRY 10
@@ -108,11 +105,6 @@
#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060
#define P30_CMD_READ_CONFIGURATION_REGISTER0x0003
-#define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')
-#define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol,
NOR_FLASH_SIGNATURE)
-#define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE,
BlockIoProtocol, NOR_FLASH_SIGNATURE)
-#define INSTANCE_FROM_DISKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE,
DiskIoProtocol, NOR_FLASH_SIGNATURE)
-
typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;
#pragma pack (1)
@@ -158,197 +150,6 @@ NorFlashWriteBuffer (
IN UINT32 *Buffer
);
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoReset (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN BOOLEANExtendedVerification
- );
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoReadBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBALba,
- IN UINTN BufferSizeInBytes,
- OUT VOID *Buffer
- );
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoWriteBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBALba,
- IN UINTN BufferSizeInBytes,
- IN VOID *Buffer
- );
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoFlushBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This
- );
-
-//
-// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.ReadDisk
-//
-EFI_STATUS
-EFIAPI
-NorFlashDiskIoReadDisk (
- IN EFI_DISK_IO_PROTOCOL *This,
- IN UINT32MediaId,
- IN UINT64Offset,
- IN UINTN BufferSize,
- OUT VOID *Buffer
- );
-
-//
-// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.WriteDisk
-//
-EFI_STATUS
-EFIAPI
-NorFlashDiskIoWriteDisk (
- IN EFI_DISK_IO_PROTOCOL *This,
- IN UINT32MediaId,
- IN UINT64Offset,
- IN UINTN BufferSize,
- IN VOID *Buffer
- );
-
-//
-// NorFlashFvbDxe.c
-//
-
-EFI_STATUS
-EFIAPI
-FvbGetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
- OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- );
-
-EFI_STATUS
-EFIAPI
-FvbSetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
- IN OUTEFI_FVB_ATTRIBUTES_2 *Attributes
- );
-
-EFI_STATUS
-EFIAPI
-FvbGetPhysicalAddress (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
- OUT EFI_PHYSICAL_ADDRESS *Address
- );
-
-EFI_STATUS
-EFIAPI
[edk2-devel] [edk2-platforms][PATCH V4 02/17] Platform/ARM/NorFlashDxe: Move NorFlashVirtualNotifyEvent
From: sahil
Moving this function from NorFlash.c to NorFlashDxe.c as it is not
dependent on any particular flash implementation.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlash.h| 14 +++
Platform/ARM/Drivers/NorFlashDxe/NorFlash.c| 44
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c | 44
3 files changed, 51 insertions(+), 51 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index c83032e87d9c..d4d97bd22cc5 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -342,6 +342,13 @@ NorFlashFvbInitialize (
IN NOR_FLASH_INSTANCE *Instance
);
+VOID
+EFIAPI
+NorFlashVirtualNotifyEvent (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ );
+
//
// NorFlash.c
//
@@ -412,11 +419,4 @@ NorFlashWriteSingleWord (
IN UINT32 WriteData
);
-VOID
-EFIAPI
-NorFlashVirtualNotifyEvent (
- IN EFI_EVENT Event,
- IN VOID *Context
- );
-
#endif /* __NOR_FLASH_H__ */
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 60854ef2a7d0..55f6abd0eef3 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -816,47 +816,3 @@ NorFlashReset (
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
return EFI_SUCCESS;
}
-
-/**
- Fixup internal data so that EFI can be call in virtual mode.
- Call the passed in Child Notify event and convert any pointers in
- lib to virtual mode.
-
- @param[in]Event The Event that is being processed
- @param[in]Context Event Context
-**/
-VOID
-EFIAPI
-NorFlashVirtualNotifyEvent (
- IN EFI_EVENT Event,
- IN VOID *Context
- )
-{
- UINTN Index;
-
- for (Index = 0; Index < mNorFlashDeviceCount; Index++) {
-EfiConvertPointer (0x0, (VOID
**)[Index]->DeviceBaseAddress);
-EfiConvertPointer (0x0, (VOID
**)[Index]->RegionBaseAddress);
-
-// Convert BlockIo protocol
-EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.FlushBlocks);
-EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.ReadBlocks);
-EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.Reset);
-EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.WriteBlocks);
-
-// Convert Fvb
-EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.EraseBlocks);
-EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.GetAttributes);
-EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.GetBlockSize);
-EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.GetPhysicalAddress);
-EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.Read);
-EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.SetAttributes);
-EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.Write);
-
-if (mNorFlashInstances[Index]->ShadowBuffer != NULL) {
- EfiConvertPointer (0x0, (VOID
**)[Index]->ShadowBuffer);
-}
- }
-
- return;
-}
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
index f7b92de21a57..963af7dcf435 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -504,3 +504,47 @@ NorFlashFvbInitialize (
return Status;
}
+
+/**
+ Fixup internal data so that EFI can be call in virtual mode.
+ Call the passed in Child Notify event and convert any pointers in
+ lib to virtual mode.
+
+ @param[in]Event The Event that is being processed
+ @param[in]Context Event Context
+**/
+VOID
+EFIAPI
+NorFlashVirtualNotifyEvent (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ UINTN Index;
+
+ for (Index = 0; Index < mNorFlashDeviceCount; Index++) {
+EfiConvertPointer (0x0, (VOID
**)[Index]->DeviceBaseAddress);
+EfiConvertPointer (0x0, (VOID
**)[Index]->RegionBaseAddress);
+
+// Convert BlockIo protocol
+EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.FlushBlocks);
+EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.ReadBlocks);
+EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.Reset);
+EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.WriteBlocks);
+
+// Convert Fvb
+EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.EraseBlocks);
+EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.GetAttributes);
+EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.GetBlockSize);
+EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.GetPhysicalAddress);
+EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.Read);
+EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.SetAttributes);
+EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.Write);
+
+if (mNorFlashInstances[Index]->ShadowBuffer != NULL) {
+ EfiConvertPointer (0x0, (VOID
[edk2-devel] [edk2-platforms][PATCH V4 01/17] Platform/ARM/NorFlashDxe: Move DiskIo related functions out of NorFlash.c
From: sahil
Moving these functions from NorFlash.c to NorFlashBlockIoDxe.c as
they are not dependent on any particular flash implementation.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 129
Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c | 129
2 files changed, 129 insertions(+), 129 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 1b431073ee93..60854ef2a7d0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -807,135 +807,6 @@ NorFlashWriteSingleBlock (
return EFI_SUCCESS;
}
-/*
- Although DiskIoDxe will automatically install the DiskIO protocol whenever
- we install the BlockIO protocol, its implementation is sub-optimal as it
reads
- and writes entire blocks using the BlockIO protocol. In fact we can access
- NOR flash with a finer granularity than that, so we can improve performance
- by directly producing the DiskIO protocol.
-*/
-
-/**
- Read BufferSize bytes from Offset into Buffer.
-
- @param This Protocol instance pointer.
- @param MediaId Id of the media, changes every time the media
is replaced.
- @param OffsetThe starting byte offset to read from
- @param BufferSizeSize of Buffer
- @param BufferBuffer containing read data
-
- @retval EFI_SUCCESS The data was read correctly from the device.
- @retval EFI_DEVICE_ERROR The device reported an error while performing
the read.
- @retval EFI_NO_MEDIA There is no media in the device.
- @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.
- @retval EFI_INVALID_PARAMETER The read request contains device addresses
that are not
-valid for the device.
-
-**/
-EFI_STATUS
-EFIAPI
-NorFlashDiskIoReadDisk (
- IN EFI_DISK_IO_PROTOCOL *This,
- IN UINT32MediaId,
- IN UINT64DiskOffset,
- IN UINTN BufferSize,
- OUT VOID *Buffer
- )
-{
- NOR_FLASH_INSTANCE *Instance;
- UINT32 BlockSize;
- UINT32 BlockOffset;
- EFI_LBA Lba;
-
- Instance = INSTANCE_FROM_DISKIO_THIS (This);
-
- if (MediaId != Instance->Media.MediaId) {
-return EFI_MEDIA_CHANGED;
- }
-
- BlockSize = Instance->Media.BlockSize;
- Lba = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize,
);
-
- return NorFlashRead (Instance, Lba, BlockOffset, BufferSize, Buffer);
-}
-
-/**
- Writes a specified number of bytes to a device.
-
- @param This Indicates a pointer to the calling context.
- @param MediaIdID of the medium to be written.
- @param Offset The starting byte offset on the logical block I/O device
to write.
- @param BufferSize The size in bytes of Buffer. The number of bytes to write
to the device.
- @param Buffer A pointer to the buffer containing the data to be written.
-
- @retval EFI_SUCCESS The data was written correctly to the device.
- @retval EFI_WRITE_PROTECTED The device can not be written to.
- @retval EFI_DEVICE_ERROR The device reported an error while performing
the write.
- @retval EFI_NO_MEDIA There is no media in the device.
- @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.
- @retval EFI_INVALID_PARAMETER The write request contains device addresses
that are not
- valid for the device.
-
-**/
-EFI_STATUS
-EFIAPI
-NorFlashDiskIoWriteDisk (
- IN EFI_DISK_IO_PROTOCOL *This,
- IN UINT32MediaId,
- IN UINT64DiskOffset,
- IN UINTN BufferSize,
- IN VOID *Buffer
- )
-{
- NOR_FLASH_INSTANCE *Instance;
- UINT32 BlockSize;
- UINT32 BlockOffset;
- EFI_LBA Lba;
- UINTN RemainingBytes;
- UINTN WriteSize;
- EFI_STATUS Status;
-
- Instance = INSTANCE_FROM_DISKIO_THIS (This);
-
- if (MediaId != Instance->Media.MediaId) {
-return EFI_MEDIA_CHANGED;
- }
-
- BlockSize = Instance->Media.BlockSize;
- Lba = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize,
);
-
- RemainingBytes = BufferSize;
-
- // Write either all the remaining bytes, or the number of bytes that bring
- // us up to a block boundary, whichever is less.
- // (DiskOffset | (BlockSize - 1)) + 1) rounds DiskOffset up to the next
- // block boundary (even if it is already on one).
- WriteSize = MIN (RemainingBytes, ((DiskOffset | (BlockSize - 1)) + 1) -
DiskOffset);
-
- do {
-if (WriteSize == BlockSize) {
- // Write a full block
- Status = NorFlashWriteFullBlock (Instance, Lba, Buffer, BlockSize /
sizeof (UINT32));
-} else {
- // Write a partial block
- Status = NorFlashWriteSingleBlock
[edk2-devel] [edk2-platforms][PATCH V4 00/17] Split NorFlashDxe driver and add CadenceQspiNorFlashDeviceLib library
From: sahil This patch series adds the following changes: 1. Splits the NorFlashDxe driver to introduce a NorFlashDeviceLib that implements the specifics for the respective flash. This will allow us to plug different libraries implementing functionality of various NOR Flash. The flash specific code in NorFlashDxe has been moved to P30NorFlashDeviceLib library. 2. Adds support for CadenceQspiNorFlashDeviceLib which is used by N1Sdp platform along with NorFlashDxe driver. N1Sdp uses an emulated variable storage on DDR memory for the variable storage. But this emulated variable storage is a volatile memory and so the values of variables can't persist on next reboot or in power cycle. In N1Sdp platform, the SoC is connected to IOFPGA which has a Cadence Quad SPI (QSPI) controller. This QSPI controller manages the flash chip device via QSPI bus. With these changes we use this NOR flash device for persistent variable storage. 3. Fixes memory leak in NorFlashCreateInstance() function. v4: - Fixed code review comments v3: - Fixed code review comments - Added 3 new patches for the following: - Fix memory leak in NorFlashCreateInstance() - Make local functions STATIC in NorFlashDxe - Remove unimplemented functions from NorFlash.h v2: - Fixed code review comments - Split the NorFlashDxe driver and moved flash specific code to P30NorFlashDeviceLib - Added NOR flash Dxe Driver for N1Sdp as a library instead of a driver Link to branch with the patches in this series - https://github.com/sah01Kaushal/edk2-platforms/tree/n1sdp_persistent_storage_v4 Links to v3: https://edk2.groups.io/g/devel/message/119142 https://edk2.groups.io/g/devel/message/119143 https://edk2.groups.io/g/devel/message/119144 https://edk2.groups.io/g/devel/message/119145 https://edk2.groups.io/g/devel/message/119146 https://edk2.groups.io/g/devel/message/119147 https://edk2.groups.io/g/devel/message/119148 https://edk2.groups.io/g/devel/message/119149 https://edk2.groups.io/g/devel/message/119150 https://edk2.groups.io/g/devel/message/119151 https://edk2.groups.io/g/devel/message/119152 https://edk2.groups.io/g/devel/message/119153 https://edk2.groups.io/g/devel/message/119154 https://edk2.groups.io/g/devel/message/119155 https://edk2.groups.io/g/devel/message/119156 https://edk2.groups.io/g/devel/message/119157 https://edk2.groups.io/g/devel/message/119158 https://edk2.groups.io/g/devel/message/119159 https://github.com/sah01Kaushal/edk2-platforms/tree/n1sdp_persistent_storage_v3 Links to v2: https://edk2.groups.io/g/devel/topic/105690949 https://edk2.groups.io/g/devel/topic/105690948 https://edk2.groups.io/g/devel/topic/105690947 https://edk2.groups.io/g/devel/topic/105690946 https://edk2.groups.io/g/devel/topic/105690945 https://edk2.groups.io/g/devel/topic/105690944 https://edk2.groups.io/g/devel/topic/105690943 https://edk2.groups.io/g/devel/topic/105690942 https://edk2.groups.io/g/devel/topic/105690941 https://edk2.groups.io/g/devel/topic/105690940 https://edk2.groups.io/g/devel/topic/105690939 https://edk2.groups.io/g/devel/topic/105690938 https://edk2.groups.io/g/devel/topic/105690937 https://edk2.groups.io/g/devel/topic/105690936 https://edk2.groups.io/g/devel/topic/105690935 https://github.com/sah01Kaushal/edk2-platforms/tree/n1sdp_persistent_storage_v2 Links to v1: https://edk2.groups.io/g/devel/topic/102625035 https://edk2.groups.io/g/devel/topic/102625033 https://edk2.groups.io/g/devel/topic/102625034 https://edk2.groups.io/g/devel/topic/102625036 https://edk2.groups.io/g/devel/topic/102625037 https://edk2.groups.io/g/devel/topic/102625038 sahil (17): Platform/ARM/NorFlashDxe: Move DiskIo related functions out of NorFlash.c Platform/ARM/NorFlashDxe: Move NorFlashVirtualNotifyEvent Platform/ARM/NorFlashDxe: Add NorFlashCommon.h header file Platform/ARM/NorFlashDxe: Move flash specific functions to NorFlash.c Platform/ARM/NorFlashDxe: Remove unimplemented functions from NorFlash.h Platform/ARM/NorFlashDxe: Make local functions STATIC Platform/ARM: Create NorFlashDeviceLib library interface for flash specific functions Platform/ARM: Add P30NorFlashDeviceLib Library Platform/ARM/NorFlashDxe: Switch from NorFlash.c to NorFlashDeviceLib Platform/ARM: Add HostControllerBaseAddress variable Platform/ARM/NorFlashDxe: Fix memory leak in NorFlashCreateInstance() Platform/ARM: Add optional provision to fetch and print NOR Flash info Silicon/ARM/NeoverseN1Soc: Enable SCP QSPI flash region Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe Platform/ARM/N1Sdp: Persistent storage for N1Sdp Platform/ARM/N1Sdp: Enable FaultTolerantWrite Dxe driver for N1Sdp Platform/ARM/ARM.dec |4 + Platform/ARM/SgiPkg/SgiPlatform.dsc.inc |3 +
[edk2-devel] [edk2-platforms 2/3] AmdPlatformPkg: Implements SmmCorePlatformHookLib library
Implements SmmCorePlatformHookLib library for AMD platform.
Cc: Abner Chang
Cc: Paul Grimes
Signed-off-by: Abdul Lateef Attar
---
.../AMD/AmdPlatformPkg/AmdPlatformPkg.dec | 5 +
.../AMD/AmdPlatformPkg/AmdPlatformPkg.dsc | 6 +
.../Library/AmdSmmCorePlatformHookLib.h | 68 +++
.../SmmCorePlatformHookLib.c | 169 ++
.../SmmCorePlatformHookLib.inf| 39
.../SmmCorePlatformHookLib.uni| 11 ++
6 files changed, 298 insertions(+)
create mode 100644
Platform/AMD/AmdPlatformPkg/Include/Library/AmdSmmCorePlatformHookLib.h
create mode 100644
Platform/AMD/AmdPlatformPkg/Library/SmmCorePlatformHookLib/SmmCorePlatformHookLib.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Library/SmmCorePlatformHookLib/SmmCorePlatformHookLib.inf
create mode 100644
Platform/AMD/AmdPlatformPkg/Library/SmmCorePlatformHookLib/SmmCorePlatformHookLib.uni
diff --git a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
index 106820dc85..3020e628a3 100644
--- a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
+++ b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
@@ -21,6 +21,11 @@
## @libraryclass Defines a get/set interface for platform specific data.
PlatformSocLib|Include/Library/AmdPlatformSocLib.h
+ ## @libraryclass AMD SMM core platform hook library
+ # Provide the functions to register hook before and
+ # after SMM dispatcher.
+ SmmCorePlatformHookLib|Include/Library/AmdSmmCorePlatformHookLib.h
+
[Guids]
gAmdPlatformPkgTokenSpaceGuid = { 0x663DE733, 0x70E0, 0x4D37, { 0xBB,
0x30, 0x7D, 0x9E, 0xAF, 0x9B, 0xDA, 0xE9 }}
diff --git a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
index d11d3594e3..482e6f2f30 100644
--- a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
+++ b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
@@ -62,6 +62,9 @@
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
PlatformSocLib|AmdPlatformPkg/Library/DxePlatformSocLib/DxePlatformSocLibNull.inf
+[LibraryClasses.common.SMM_CORE]
+
SmmCorePlatformHookLib|AmdPlatformPkg/Library/SmmCorePlatformHookLib/SmmCorePlatformHookLib.inf
+
[Components]
AmdPlatformPkg/Library/BaseAlwaysFalseDepexLib/BaseAlwaysFalseDepexLib.inf
AmdPlatformPkg/Library/DxePlatformSocLib/DxePlatformSocLibNull.inf
@@ -73,3 +76,6 @@
AmdPlatformPkg/Universal/LogoDxe/LogoDxe.inf
# Server platfrom Bitmap logo driver
AmdPlatformPkg/Universal/LogoDxe/S3LogoDxe.inf
AmdPlatformPkg/Universal/SmbiosCommonDxe/SmbiosCommonDxe.inf
+
+[Components.common.SMM_CORE]
+ AmdPlatformPkg/Library/SmmCorePlatformHookLib/SmmCorePlatformHookLib.inf
diff --git
a/Platform/AMD/AmdPlatformPkg/Include/Library/AmdSmmCorePlatformHookLib.h
b/Platform/AMD/AmdPlatformPkg/Include/Library/AmdSmmCorePlatformHookLib.h
new file mode 100644
index 00..6ae76920b4
--- /dev/null
+++ b/Platform/AMD/AmdPlatformPkg/Include/Library/AmdSmmCorePlatformHookLib.h
@@ -0,0 +1,68 @@
+/** @file
+ AMD Smm Core Platform Hook Library
+
+ Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef AMD_SMM_CORE_PLATFORM_HOOK_LIB_
+#define AMD_SMM_CORE_PLATFORM_HOOK_LIB_
+
+/**
+ This is the prototype of SMM Dispatcher hook before.
+
+ @retval EFI_STATUS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *AMD_SMM_DISPATCH_HOOK_BEFORE)(
+ VOID
+ );
+
+/**
+ This is the prototype of SMM Dispatcher after before.
+
+ @retval EFI_STATUS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *AMD_SMM_DISPATCH_HOOK_AFTER)(
+ VOID
+ );
+
+typedef UINT32 AMD_SMM_DISPATCH_HOOK_PRIORITY;
+
+///
+/// This is the structure of the SMM Dispatcher hook record
+///
+typedef struct {
+ LIST_ENTRYNextList; ///< Point to
next AMD_SMM_DISPATCH_HOOK.
+ AMD_SMM_DISPATCH_HOOK_BEFORE AmdSmmDispatchHookBefore; ///< The hook
before function.
+ AMD_SMM_DISPATCH_HOOK_AFTER AmdSmmDispatchHookAfter; ///< The hook
after function.
+ AMD_SMM_DISPATCH_HOOK_PRIORITYPriority; ///< The
priority of this hook instance.
+ ///< Priority
could be implemented for
+ ///< future
usage.
+} AMD_SMM_DISPATCH_HOOK;
+
+/**
+ Register a SMM dispatcher hook.
+
+ @param[in] SmmDispatchHookBefore Function hook to SMM Dispatch before.
+ @param[in] SmmDispatchHookAfter Function hook to SMM Dispatch after.
+ @param[in] Priority The priority to execute the hook.
+
+ @retval EFI_SUCCESS The hook is registered successfully.
+
+**/
+EFI_STATUS
+RegisterSmmDispatcherHook (
+ IN AMD_SMM_DISPATCH_HOOK_BEFORESmmDispatchHookBefore OPTIONAL,
+ IN AMD_SMM_DISPATCH_HOOK_AFTER
[edk2-devel] [edk2-platforms 3/3] AmdPlatformPkg: Adds SPI smm core platform hook
Register a smm core platform hook handler for SPI device,
using AMD SmmCorePlatformHookLib library.
This platform hook saves the SPI host controller state.
Cc: Abner Chang
Cc: Paul Grimes
Signed-off-by: Abdul Lateef Attar
---
.../AMD/AmdPlatformPkg/AmdPlatformPkg.dec | 3 +
.../AMD/AmdPlatformPkg/AmdPlatformPkg.dsc | 2 +
.../Include/Protocol/AmdSpiSmmHcState.h | 107 +
.../SmmCoreAmdSpiHcHookLib.c | 145 ++
.../SmmCoreAmdSpiHcHookLib.h | 20 +++
.../SmmCoreAmdSpiHcHookLib.inf| 41 +
.../SmmCoreAmdSpiHcHookLib.uni| 11 ++
7 files changed, 329 insertions(+)
create mode 100644
Platform/AMD/AmdPlatformPkg/Include/Protocol/AmdSpiSmmHcState.h
create mode 100644
Platform/AMD/AmdPlatformPkg/Library/SmmCoreAmdSpiHcHookLib/SmmCoreAmdSpiHcHookLib.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Library/SmmCoreAmdSpiHcHookLib/SmmCoreAmdSpiHcHookLib.h
create mode 100644
Platform/AMD/AmdPlatformPkg/Library/SmmCoreAmdSpiHcHookLib/SmmCoreAmdSpiHcHookLib.inf
create mode 100644
Platform/AMD/AmdPlatformPkg/Library/SmmCoreAmdSpiHcHookLib/SmmCoreAmdSpiHcHookLib.uni
diff --git a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
index 3020e628a3..907c5b9b74 100644
--- a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
+++ b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
@@ -29,6 +29,9 @@
[Guids]
gAmdPlatformPkgTokenSpaceGuid = { 0x663DE733, 0x70E0, 0x4D37, { 0xBB,
0x30, 0x7D, 0x9E, 0xAF, 0x9B, 0xDA, 0xE9 }}
+[Protocols]
+ gAmdSpiHcStateProtocolGuid = { 0x189566ab, 0x245, 0x43ae, {0x9d, 0x1,
0xd2, 0x21, 0x1c, 0xb9, 0x1a, 0xda }}
+
[PcdsDynamic]
## Event GUID to trigger logo displaying
# Default set to
gMinPlatformPkgTokenSpaceGuid.gBdsEventAfterConsoleReadyBeforeBootOptionGuid
diff --git a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
index 482e6f2f30..012270074d 100644
--- a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
+++ b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dsc
@@ -64,6 +64,7 @@
[LibraryClasses.common.SMM_CORE]
SmmCorePlatformHookLib|AmdPlatformPkg/Library/SmmCorePlatformHookLib/SmmCorePlatformHookLib.inf
+
SmmCoreAmdSpiHcHookLib|AmdPlatformPkg/Library/SmmCoreAmdSpiHcHookLib/SmmCoreAmdSpiHcHookLib.inf
[Components]
AmdPlatformPkg/Library/BaseAlwaysFalseDepexLib/BaseAlwaysFalseDepexLib.inf
@@ -79,3 +80,4 @@
[Components.common.SMM_CORE]
AmdPlatformPkg/Library/SmmCorePlatformHookLib/SmmCorePlatformHookLib.inf
+ AmdPlatformPkg/Library/SmmCoreAmdSpiHcHookLib/SmmCoreAmdSpiHcHookLib.inf
diff --git a/Platform/AMD/AmdPlatformPkg/Include/Protocol/AmdSpiSmmHcState.h
b/Platform/AMD/AmdPlatformPkg/Include/Protocol/AmdSpiSmmHcState.h
new file mode 100644
index 00..0e2bccb3ef
--- /dev/null
+++ b/Platform/AMD/AmdPlatformPkg/Include/Protocol/AmdSpiSmmHcState.h
@@ -0,0 +1,107 @@
+/** @file
+ Header file of AMD SMM SPI host controller state protocol
+
+ Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef AMD_SMM_SPI_HC_STATE_PROTOCOL_H_
+#define AMD_SMM_SPI_HC_STATE_PROTOCOL_H_
+
+typedef struct _SMM_EFI_SPI_HC_STATE_PROTOCOL SMM_EFI_SPI_HC_STATE_PROTOCOL;
+
+/**
+ Save/Restore the state of the SPI Host Controller
+
+ Use a chipset specific method to save the state of the SPI Host controller so
+ it can be used without disturbing other transactions.
+
+ @param[in] This Pointer to an SMM_EFI_SPI_HC_STATE_PROTOCOL
structure.
+
+ @retval EFI_SUCCESSThe State was saved successfully
+ @retval DEVICE_ERROR SPI Executes command failed
+
+**/
+typedef EFI_STATUS
+(EFIAPI *SMM_SPI_HC_STATE)(
+ IN CONST SMM_EFI_SPI_HC_STATE_PROTOCOL *This
+ );
+
+/**
+ Lock/Unlock the SPI host controller register
+
+ Use a chipset specific method to lock or unlock SPI host controller register.
+
+ @param[in] This Pointer to an SMM_EFI_SPI_HC_STATE_PROTOCOL
structure.
+
+ @retval EFI_SUCCESS The clock was set up successfully
+ @retval DEVICE_ERROR SPI Executes command failed
+
+
+**/
+typedef EFI_STATUS
+(EFIAPI *SMM_SPI_HC_LOCK_UNLOCK)(
+ IN CONST SMM_EFI_SPI_HC_STATE_PROTOCOL *This
+ );
+
+/**
+ Block/Unblock SPI opcode
+
+ Use a chipset specific method to block and unclock specific SPI opcode.
+
+ @param[in] This Pointer to an SMM_EFI_SPI_HC_STATE_PROTOCOL
structure.
+
+ @retval EFI_SUCCESS The clock was set up successfully
+ @retval DEVICE_ERROR SPI Executes command failed
+
+**/
+typedef EFI_STATUS
+(EFIAPI *SMM_SPI_HC_BLOCK_UNBLOCK_OPCODE)(
+ IN CONST SMM_EFI_SPI_HC_STATE_PROTOCOL *This,
+ IN UINT8 Opcode
+ );
+
+/**
+ Block/Unblock any SPI opcodes
+
+ Use a chipset specific method to block and unclock all SPI opcodes.
+
+ @param[in] This Pointer to an
[edk2-devel] [edk2-platforms 1/3] AmdPlatformPkg: Removes unused gBoardBdsBootFromDevicePathProtocolGuid
Removes unused gBoardBdsBootFromDevicePathProtocolGuid protocol,
and its corresponding code changes.
Adds missing Pcd/SmbiosPcd.h file.
Cc: Abner Chang
Cc: Paul Grimes
Signed-off-by: Abdul Lateef Attar
---
.../AmdPlatformPkg/Include/Pcd/SmbiosPcd.h| 58
.../SmbiosCommonDxe/DefaultLomDevicePath.c| 130 --
.../Universal/SmbiosCommonDxe/SmbiosCommon.h | 12 --
.../SmbiosCommonDxe/SmbiosCommonDxe.inf | 3 -
.../SmbiosCommonDxe/SmbiosCommonEntryPoint.c | 2 -
5 files changed, 58 insertions(+), 147 deletions(-)
create mode 100644 Platform/AMD/AmdPlatformPkg/Include/Pcd/SmbiosPcd.h
delete mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/DefaultLomDevicePath.c
diff --git a/Platform/AMD/AmdPlatformPkg/Include/Pcd/SmbiosPcd.h
b/Platform/AMD/AmdPlatformPkg/Include/Pcd/SmbiosPcd.h
new file mode 100644
index 00..2dd0480df9
--- /dev/null
+++ b/Platform/AMD/AmdPlatformPkg/Include/Pcd/SmbiosPcd.h
@@ -0,0 +1,58 @@
+/** @file
+ Miscellaneous smbios data structures.
+
+ Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef AMD_SMBIOS_PCD_H_
+#define AMD_SMBIOS_PCD_H_
+
+#include
+#include
+
+#define AMD_SMBIOS_TYPE8_MAX_PORT_CONNETORS16
+#define AMD_SMBIOS_TYPE41_MAX_ONBOARD_DEVICES 16
+
+typedef struct {
+ CHAR8IntDesignatorStr[SMBIOS_STRING_MAX_LENGTH];
+ CHAR8ExtDesignatorStr[SMBIOS_STRING_MAX_LENGTH];
+} PORT_CONNECTOR_STR;
+
+//
+// AMD SMBIOS type 8 record structure.
+//
+typedef struct {
+ SMBIOS_TABLE_TYPE8Type8Data;
+ PORT_CONNECTOR_STRDesinatorStr;
+} SMBIOS_PORT_CONNECTOR_RECORD;
+
+//
+// AMD SMBIOS type 8 record structure array.
+//
+typedef struct {
+ SMBIOS_PORT_CONNECTOR_RECORD
SmbiosPortConnectorRecords[AMD_SMBIOS_TYPE8_MAX_PORT_CONNETORS];
+} SMBIOS_PORT_CONNECTOR_RECORD_ARRAY;
+
+//
+// AMD SMBIOS type 41 record structure
+//
+typedef struct {
+ SMBIOS_TABLE_STRINGReferenceDesignation;
+ UINT8 DeviceType;
+ UINT8 DeviceEnabled;
+ UINT8 DeviceTypeInstance;
+ UINT16 VendorId;
+ UINT16 DeviceId;
+ CHAR8 RefDesignationStr[SMBIOS_STRING_MAX_LENGTH];
+} SMBIOS_ONBOARD_DEV_EXT_INFO_RECORD;
+
+//
+// AMD SMBIOS type 41 record structure array.
+//
+typedef struct {
+ SMBIOS_ONBOARD_DEV_EXT_INFO_RECORD
SmbiosOnboardDevExtInfos[AMD_SMBIOS_TYPE41_MAX_ONBOARD_DEVICES];
+} SMBIOS_ONBOARD_DEV_EXT_INFO_ARRAY;
+
+#endif // AMD_SMBIOS_PCD_H_
diff --git
a/Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/DefaultLomDevicePath.c
b/Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/DefaultLomDevicePath.c
deleted file mode 100644
index 92c7aa5e07..00
---
a/Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/DefaultLomDevicePath.c
+++ /dev/null
@@ -1,130 +0,0 @@
-/** @file
- This file contains the implementation of the DefaultLomDevicePath protocol.
- The DefaultLomDevicePath protocol is used to identify the default LOM device
- path for the system. The protocol is installed by the SmbiosCommonDxe driver
- and is used by the BDS to identify the default LOM device path for the
system.
-
- Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved.
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include "SmbiosCommon.h"
-#include
-#include
-
-EFI_HANDLEmBoardBdsHandle = NULL;
-BOARD_BDS_BOOT_FROM_DEVICE_PATH_PROTOCOL mBootDevicePathProtocol;
-
-/**
- Find the Lan-On-Motherboard device path. Installs
BOARD_BDS_BOOT_FROM_DEVICE_PATH_PROTOCOL
- with the LOM device path protocol
-
- @retval EFI NOT_FOUND LOM device path is not found
- @retval EFI_SUCCESS LOM device path found
-**/
-EFI_STATUS
-EFIAPI
-InstallLomDevicePath (
- )
-{
- SMBIOS_ONBOARD_DEV_EXT_INFO_RECORD *DevExtInfoRecord;
- EFI_STATUS Status;
- EFI_HANDLE *PciHandles;
- UINTN PciHandlesSize;
- UINTN Index;
- EFI_PCI_IO_PROTOCOL *PciProtocol;
- PCI_IO_DEVICE *PciIoDevice;
- UINT8 NumberOfDevices;
- UINT8 DevIdx;
- UINTN SegmentNumber;
- UINTN BusNumber;
- UINTN DeviceNumber;
- UINTN FunctionNumber;
-
- NumberOfDevices = PcdGet8 (PcdAmdSmbiosType41Number);
- DevExtInfoRecord = (SMBIOS_ONBOARD_DEV_EXT_INFO_RECORD *)PcdGetPtr
(PcdAmdSmbiosType41);
-
- // No device entries found
- if (NumberOfDevices == 0) {
-DEBUG ((DEBUG_INFO, "No onboard devices found.\n"));
-return EFI_NOT_FOUND;
- }
-
- // search through
[edk2-devel] [edk2-platforms 0/3] AmdPlatformPkg: SmbiosDxe and SPI supporting libraries
PR: https://github.com/tianocore/edk2-platforms/pull/148 Fix the build failure for SmbiosDxe driver by removing unused protocol. Adds PCD defines for smbios. Adds SPI supporting libraries. Cc: Abner Chang Cc: Paul Grimes Abdul Lateef Attar (3): AmdPlatformPkg: Removes unused gBoardBdsBootFromDevicePathProtocolGuid AmdPlatformPkg: Implements SmmCorePlatformHookLib library AmdPlatformPkg: Adds SPI smm core platform hook .../AMD/AmdPlatformPkg/AmdPlatformPkg.dec | 8 + .../AMD/AmdPlatformPkg/AmdPlatformPkg.dsc | 8 + .../Library/AmdSmmCorePlatformHookLib.h | 68 +++ .../AmdPlatformPkg/Include/Pcd/SmbiosPcd.h| 58 ++ .../Include/Protocol/AmdSpiSmmHcState.h | 107 +++ .../SmmCoreAmdSpiHcHookLib.c | 145 +++ .../SmmCoreAmdSpiHcHookLib.h | 20 +++ .../SmmCoreAmdSpiHcHookLib.inf| 41 + .../SmmCoreAmdSpiHcHookLib.uni| 11 ++ .../SmmCorePlatformHookLib.c | 169 ++ .../SmmCorePlatformHookLib.inf| 39 .../SmmCorePlatformHookLib.uni| 11 ++ .../SmbiosCommonDxe/DefaultLomDevicePath.c| 130 -- .../Universal/SmbiosCommonDxe/SmbiosCommon.h | 12 -- .../SmbiosCommonDxe/SmbiosCommonDxe.inf | 3 - .../SmbiosCommonDxe/SmbiosCommonEntryPoint.c | 2 - 16 files changed, 685 insertions(+), 147 deletions(-) create mode 100644 Platform/AMD/AmdPlatformPkg/Include/Library/AmdSmmCorePlatformHookLib.h create mode 100644 Platform/AMD/AmdPlatformPkg/Include/Pcd/SmbiosPcd.h create mode 100644 Platform/AMD/AmdPlatformPkg/Include/Protocol/AmdSpiSmmHcState.h create mode 100644 Platform/AMD/AmdPlatformPkg/Library/SmmCoreAmdSpiHcHookLib/SmmCoreAmdSpiHcHookLib.c create mode 100644 Platform/AMD/AmdPlatformPkg/Library/SmmCoreAmdSpiHcHookLib/SmmCoreAmdSpiHcHookLib.h create mode 100644 Platform/AMD/AmdPlatformPkg/Library/SmmCoreAmdSpiHcHookLib/SmmCoreAmdSpiHcHookLib.inf create mode 100644 Platform/AMD/AmdPlatformPkg/Library/SmmCoreAmdSpiHcHookLib/SmmCoreAmdSpiHcHookLib.uni create mode 100644 Platform/AMD/AmdPlatformPkg/Library/SmmCorePlatformHookLib/SmmCorePlatformHookLib.c create mode 100644 Platform/AMD/AmdPlatformPkg/Library/SmmCorePlatformHookLib/SmmCorePlatformHookLib.inf create mode 100644 Platform/AMD/AmdPlatformPkg/Library/SmmCorePlatformHookLib/SmmCorePlatformHookLib.uni delete mode 100644 Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/DefaultLomDevicePath.c -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119304): https://edk2.groups.io/g/devel/message/119304 Mute This Topic: https://groups.io/mt/106349076/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platform 0/2] AmdPlatformPkg: Fix the build failure
[AMD Official Use Only - AMD Internal Distribution Only]
This patch set was reviewed on GitHub PR.
Hi Abdul, please go ahead to push this patch.
Thanks!
Reviewed-by: Abner Chang
> -Original Message-
> From: Abdul Lateef Attar
> Sent: Tuesday, May 28, 2024 11:28 AM
> To: devel@edk2.groups.io
> Cc: Attar, AbdulLateef (Abdul Lateef) ; Grimes,
> Paul ; Chang, Abner
> Subject: [edk2-platform 0/2] AmdPlatformPkg: Fix the build failure
>
> PR: https://github.com/tianocore/edk2-platforms/pull/146
>
> Cc: Paul Grimes
> Cc: Abner Chang
>
> Abdul Lateef Attar (2):
> AmdPlatformPkg: Corrects file path of LogoDxe driver
> AmdPlatformPkg: Fix windows VC compilation warning
>
> .../Universal/Acpi/AcpiCommon/PciSsdt.c | 4 +-
> .../LogoDxe/{LogoDxe => }/JpegLogo.idf| 0
> .../LogoDxe/{LogoDxe => }/JpegLogoDxe.inf | 0
> .../Universal/LogoDxe/{LogoDxe => }/Logo.bmp | Bin
> .../AmdPlatformPkg/Universal/LogoDxe/Logo.c | 392 +-
> .../Universal/LogoDxe/{LogoDxe => }/Logo.h| 0
> .../Universal/LogoDxe/{LogoDxe => }/Logo.idf | 0
> .../Universal/LogoDxe/{LogoDxe => }/Logo.jpg | Bin
> .../LogoDxe/{LogoDxe => }/LogoDxe.inf | 0
> .../Universal/LogoDxe/LogoDxe/Logo.c | 194 -
> .../Universal/LogoDxe/LogoDxe/S3Logo.bmp | Bin 964114 -> 0 bytes
> .../Universal/LogoDxe/LogoDxe/S3Logo.idf | 10 -
> .../Universal/LogoDxe/LogoDxe/S3LogoDxe.inf | 57 ---
> .../Universal/LogoDxe/S3Logo.idf | 19 +-
> .../Universal/LogoDxe/S3LogoDxe.inf | 112 ++---
> 15 files changed, 263 insertions(+), 525 deletions(-)
> rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe
> => }/JpegLogo.idf (100%)
> rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe
> => }/JpegLogoDxe.inf (100%)
> rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe
> => }/Logo.bmp (100%)
> rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe
> => }/Logo.h (100%)
> rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe
> => }/Logo.idf (100%)
> rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe
> => }/Logo.jpg (100%)
> rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe
> => }/LogoDxe.inf (100%)
> delete mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/Logo.c
> delete mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/S3Logo.bmp
> delete mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/S3Logo.idf
> delete mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/S3LogoDxe.inf
>
> --
> 2.34.1
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[edk2-devel] [edk2-platform 2/2] AmdPlatformPkg: Fix windows VC compilation warning
Fix windows VC compilattion warning for AcpiCommon driver.
Cc: Paul Grimes
Cc: Abner Chang
Signed-off-by: Abdul Lateef Attar
---
.../AMD/AmdPlatformPkg/Universal/Acpi/AcpiCommon/PciSsdt.c| 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Platform/AMD/AmdPlatformPkg/Universal/Acpi/AcpiCommon/PciSsdt.c
b/Platform/AMD/AmdPlatformPkg/Universal/Acpi/AcpiCommon/PciSsdt.c
index a9d3c83a5e..162e455c63 100644
--- a/Platform/AMD/AmdPlatformPkg/Universal/Acpi/AcpiCommon/PciSsdt.c
+++ b/Platform/AMD/AmdPlatformPkg/Universal/Acpi/AcpiCommon/PciSsdt.c
@@ -261,7 +261,7 @@ InternalInsertRootBridgeResources (
if ((LocalBuffer->ResType == ACPI_ADDRESS_SPACE_TYPE_BUS) &&
(LocalBuffer->AddrRangeMin == RootBridge->Object->BaseBusNumber))
{
-BaseBusNumber = LocalBuffer->AddrRangeMin;
+BaseBusNumber = (UINTN)LocalBuffer->AddrRangeMin;
break;
}
}
@@ -290,7 +290,7 @@ InternalInsertRootBridgeResources (
break;
} else if (LocalBuffer->Header.Header.Byte ==
ACPI_QWORD_ADDRESS_SPACE_DESCRIPTOR) {
if (LocalBuffer->ResType == ACPI_ADDRESS_SPACE_TYPE_BUS) {
-BaseBusNumber = LocalBuffer->AddrRangeMin;
+BaseBusNumber = (UINTN)LocalBuffer->AddrRangeMin;
Status= AmlCodeGenRdWordBusNumber (
FALSE,
TRUE,
--
2.34.1
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[edk2-devel] [edk2-platform 0/2] AmdPlatformPkg: Fix the build failure
PR: https://github.com/tianocore/edk2-platforms/pull/146
Cc: Paul Grimes
Cc: Abner Chang
Abdul Lateef Attar (2):
AmdPlatformPkg: Corrects file path of LogoDxe driver
AmdPlatformPkg: Fix windows VC compilation warning
.../Universal/Acpi/AcpiCommon/PciSsdt.c | 4 +-
.../LogoDxe/{LogoDxe => }/JpegLogo.idf| 0
.../LogoDxe/{LogoDxe => }/JpegLogoDxe.inf | 0
.../Universal/LogoDxe/{LogoDxe => }/Logo.bmp | Bin
.../AmdPlatformPkg/Universal/LogoDxe/Logo.c | 392 +-
.../Universal/LogoDxe/{LogoDxe => }/Logo.h| 0
.../Universal/LogoDxe/{LogoDxe => }/Logo.idf | 0
.../Universal/LogoDxe/{LogoDxe => }/Logo.jpg | Bin
.../LogoDxe/{LogoDxe => }/LogoDxe.inf | 0
.../Universal/LogoDxe/LogoDxe/Logo.c | 194 -
.../Universal/LogoDxe/LogoDxe/S3Logo.bmp | Bin 964114 -> 0 bytes
.../Universal/LogoDxe/LogoDxe/S3Logo.idf | 10 -
.../Universal/LogoDxe/LogoDxe/S3LogoDxe.inf | 57 ---
.../Universal/LogoDxe/S3Logo.idf | 19 +-
.../Universal/LogoDxe/S3LogoDxe.inf | 112 ++---
15 files changed, 263 insertions(+), 525 deletions(-)
rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe =>
}/JpegLogo.idf (100%)
rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe =>
}/JpegLogoDxe.inf (100%)
rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe => }/Logo.bmp
(100%)
rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe => }/Logo.h
(100%)
rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe => }/Logo.idf
(100%)
rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe => }/Logo.jpg
(100%)
rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe => }/LogoDxe.inf
(100%)
delete mode 100644 Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/Logo.c
delete mode 100644
Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/S3Logo.bmp
delete mode 100644
Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/S3Logo.idf
delete mode 100644
Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/S3LogoDxe.inf
--
2.34.1
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[edk2-devel] [edk2-platform 1/2] AmdPlatformPkg: Corrects file path of LogoDxe driver
Removes extra directory.
Cc: Paul Grimes
Cc: Abner Chang
Signed-off-by: Abdul Lateef Attar
---
.../LogoDxe/{LogoDxe => }/JpegLogo.idf| 0
.../LogoDxe/{LogoDxe => }/JpegLogoDxe.inf | 0
.../Universal/LogoDxe/{LogoDxe => }/Logo.bmp | Bin
.../AmdPlatformPkg/Universal/LogoDxe/Logo.c | 392 +-
.../Universal/LogoDxe/{LogoDxe => }/Logo.h| 0
.../Universal/LogoDxe/{LogoDxe => }/Logo.idf | 0
.../Universal/LogoDxe/{LogoDxe => }/Logo.jpg | Bin
.../LogoDxe/{LogoDxe => }/LogoDxe.inf | 0
.../Universal/LogoDxe/LogoDxe/Logo.c | 194 -
.../Universal/LogoDxe/LogoDxe/S3Logo.bmp | Bin 964114 -> 0 bytes
.../Universal/LogoDxe/LogoDxe/S3Logo.idf | 10 -
.../Universal/LogoDxe/LogoDxe/S3LogoDxe.inf | 57 ---
.../Universal/LogoDxe/S3Logo.idf | 19 +-
.../Universal/LogoDxe/S3LogoDxe.inf | 112 ++---
14 files changed, 261 insertions(+), 523 deletions(-)
rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe =>
}/JpegLogo.idf (100%)
rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe =>
}/JpegLogoDxe.inf (100%)
rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe => }/Logo.bmp
(100%)
rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe => }/Logo.h
(100%)
rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe => }/Logo.idf
(100%)
rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe => }/Logo.jpg
(100%)
rename Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/{LogoDxe => }/LogoDxe.inf
(100%)
delete mode 100644 Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/Logo.c
delete mode 100644
Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/S3Logo.bmp
delete mode 100644
Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/S3Logo.idf
delete mode 100644
Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/S3LogoDxe.inf
diff --git a/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/JpegLogo.idf
b/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/JpegLogo.idf
similarity index 100%
rename from Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/JpegLogo.idf
rename to Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/JpegLogo.idf
diff --git
a/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/JpegLogoDxe.inf
b/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/JpegLogoDxe.inf
similarity index 100%
rename from
Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/JpegLogoDxe.inf
rename to Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/JpegLogoDxe.inf
diff --git a/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/Logo.bmp
b/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.bmp
similarity index 100%
rename from Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/LogoDxe/Logo.bmp
rename to Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.bmp
diff --git a/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c
b/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c
index 4463ba58eb..69fa1dc0e5 100644
--- a/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c
+++ b/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c
@@ -1,198 +1,194 @@
-/**
- Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
-**/
-
-/** @file
- Logo DXE Driver, install Edk2 Platform Logo protocol.
-
- Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-#include "Logo.h"
-
-EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx;
-EFI_HII_HANDLE mHiiHandle;
-LOGO_ENTRY mLogos[] = {
- {
-IMAGE_TOKEN (IMG_LOGO),
-EdkiiPlatformLogoDisplayAttributeCenter,
-0,
-0
- }
-};
-
-/**
- Load a platform logo image and return its data and attributes.
-
- @param[in] This The pointer to this protocol instance.
- @param[in, out] Instance The visible image instance is found.
- @param[out] Image Points to the image.
- @param[out] Attribute The display attributes of the image
returned.
- @param[out] OffsetX The X offset of the image regarding the
Attribute.
- @param[out] OffsetY The Y offset of the image regarding the
Attribute.
-
- @retval EFI_SUCCESSThe image was fetched successfully.
- @retval EFI_NOT_FOUND The specified image could not be found.
- @retval EFI_INVALID_PARAMETER One of the given input parameters are
incorrect
-**/
-EFI_STATUS
-EFIAPI
-GetImage (
- IN EDKII_PLATFORM_LOGO_PROTOCOL*This,
- IN OUT UINT32 *Instance,
- OUT EFI_IMAGE_INPUT*Image,
- OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute,
- OUT INTN *OffsetX,
- OUT INTN *OffsetY
- )
-{
- UINT32 Current;
-
- if ((Instance == NULL) || (Image == NULL)
Re: [edk2-devel] [edk2-rfc] Proposal to switch TianoCore Code Review from email to GitHub Pull Requests on 5-24-2024
The transition now is simpler and more streamlined than what is described there. I'll update the project to reflect the current state so it can serve as a reference and guide related work in the future. Thanks, Michael On 5/24/2024 8:20 AM, Rebecca Cran wrote: There's a GitHub Project for this at https://github.com/orgs/tianocore/projects/5 which it looks like Michael Kubacki created last year. I suspect it's obsolete though, since it looks like the tasks haven't been updated recently. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119257): https://edk2.groups.io/g/devel/message/119257 Mute This Topic: https://groups.io/mt/106280281/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-rfc] Proposal to switch TianoCore Code Review from email to GitHub Pull Requests on 5-24-2024
There's a GitHub Project for this at https://github.com/orgs/tianocore/projects/5 which it looks like Michael Kubacki created last year. I suspect it's obsolete though, since it looks like the tasks haven't been updated recently. -- Rebecca Cran On 5/1/24 11:43 AM, Michael D Kinney wrote: Hello, I would like to propose that TianoCore move all code review from email based code reviews to GitHub Pull Requests based code reviews. The proposed date to switch would be immediately after the next stable tag which is currently scheduled for May 24, 2024. Updates to the following Wiki page would be required to describe the required process when using GitHub Pull Requests for all code review related activity. https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Development-Process A couple examples of the changes that would need to be documented are: * All contributors, maintainers, and reviewers must have GitHub IDs. * The commit message would no longer require Cc:, Reviewed-by:, Acked-by: or Tested-by: tags. The only required tag would be Signed-off-by. * The Pull Request submitter is required to invite the required maintainers and reviewers to the pull request. This is the same set of maintainers and reviewers that are required to be listed in Cc: tags in today's process. * Maintainers are responsible for verifying that all conversations in the code review are resolved and that all review approvals from the required set of maintainers are present before setting the 'push' label. Please provide feedback 1) If you are not in favor of this change. 2) If you are not in favor of the proposed date of this change. 3) On the process changes you would like to see documented in the Wiki pages related to using GitHub Pull Request based code reviews. There is some prototype work to automate/simplify some of the PR based code review process steps. Those could be added over time as resources are available to finish and support them. Best regards, Mike -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119255): https://edk2.groups.io/g/devel/message/119255 Mute This Topic: https://groups.io/mt/106280281/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms][PATCH 2/3] Platform/AMD: Update Readme.md
Reviewed-by: Abdul Lateef Attar -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119205): https://edk2.groups.io/g/devel/message/119205 Mute This Topic: https://groups.io/mt/106257080/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms][PATCH 1/3] Platform/AMD: Initial commit of cross platform/board interfaces
Reviewed-by: Abdul Lateef Attar ( abdullateef.at...@amd.com ) -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119204): https://edk2.groups.io/g/devel/message/119204 Mute This Topic: https://groups.io/mt/106257082/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms][PATCH 3/3] edk2-platform/Maintainer: Add entries for AMD packages
[AMD Official Use Only - AMD Internal Distribution Only] Reviewed-by: Paul Grimes mailto:paul.gri...@amd.com>> From: devel@edk2.groups.io on behalf of Abdul Lateef Attar via groups.io Sent: Thursday, May 23, 2024 7:00:03 PM To: devel@edk2.groups.io ; michael.d.kin...@intel.com ; Chang, Abner Cc: Leif Lindholm Subject: Re: [edk2-devel] [edk2-platforms][PATCH 3/3] edk2-platform/Maintainer: Add entries for AMD packages Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding. Reviewed-by: Abdul Lateef Attar <mailto:abdullateef.at...@amd.com> On 23-05-2024 21:57, Michael D Kinney via groups.io wrote: Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding. Reviewed-by: Michael D Kinney <mailto:michael.d.kin...@intel.com> -Original Message- From: abner.ch...@amd.com<mailto:abner.ch...@amd.com> <mailto:abner.ch...@amd.com> Sent: Wednesday, May 22, 2024 9:12 PM To: devel@edk2.groups.io<mailto:devel@edk2.groups.io> Cc: Leif Lindholm <mailto:quic_llind...@quicinc.com>; Kinney, Michael D <mailto:michael.d.kin...@intel.com> Subject: [edk2-platforms][PATCH 3/3] edk2-platform/Maintainer: Add entries for AMD packages From: Abner Chang <mailto:abner.ch...@amd.com> Signed-off-by: Abner Chang <mailto:abner.ch...@amd.com> Cc: Leif Lindholm <mailto:quic_llind...@quicinc.com> Cc: Michael D Kinney <mailto:michael.d.kin...@intel.com> --- Maintainers.txt | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/Maintainers.txt b/Maintainers.txt index 877620a1b0..af688c3813 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -86,8 +86,20 @@ M: Leif Lindholm <mailto:quic_llind...@quicinc.com> AMD F: Platform/AMD M: Abner Chang <mailto:abner.ch...@amd.com> -M: Abdul Lateef Attar <mailto:abdat...@amd.com> +M: Abdul Lateef Attar <mailto:abdullateef.at...@amd.com> +M: Paul Grimes <mailto:paul.gri...@amd.com> + +F: Platform/AMD/AgesaModulePkg +F: Platform/AMD/AgesaPkg +F: Platform/AMD/AmdCbsPkg +M: Paul Grimes <mailto:paul.gri...@amd.com> +R: Abdul Lateef Attar <mailto:abdullateef.at...@amd.com> +R: Abner Chang <mailto:abner.ch...@amd.com> + +F: Platform/AMD/AmdCpmPkg +M: Abdul Lateef Attar <mailto:abdullateef.at...@amd.com> R: Paul Grimes <mailto:paul.gri...@amd.com> +R: Abner Chang <mailto:abner.ch...@amd.com> AMD Seattle F: Platform/AMD/OverdriveBoard/ -- 2.37.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119203): https://edk2.groups.io/g/devel/message/119203 Mute This Topic: https://groups.io/mt/106257081/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms][PATCH 2/3] Platform/AMD: Update Readme.md
[AMD Official Use Only - AMD Internal Distribution Only] Thanks for the up-stream, Abner. Looks good to me. Reviewed-by: Paul Grimes From: Yao, Ken Sent: Thursday, May 23, 2024 1:30:48 AM To: Zhai, MingXin (Duke) ; Chang, Abner ; devel@edk2.groups.io Cc: Grimes, Paul ; Attar, AbdulLateef (Abdul Lateef) ; Fu, Igniculus ; Xing, Eric Subject: RE: [edk2-platforms][PATCH 2/3] Platform/AMD: Update Readme.md [AMD Official Use Only - AMD Internal Distribution Only] [AMD Official Use Only - AMD Internal Distribution Only] Thanks Abner for the up-stream. Looks good to me. Reviewed-by: Ken Yao -Original Message- From: Zhai, MingXin (Duke) Sent: Thursday, May 23, 2024 3:47 PM To: Chang, Abner ; devel@edk2.groups.io Cc: Grimes, Paul ; Attar, AbdulLateef (Abdul Lateef) ; Fu, Igniculus ; Yao, Ken ; Xing, Eric Subject: RE: [edk2-platforms][PATCH 2/3] Platform/AMD: Update Readme.md [AMD Official Use Only - AMD Internal Distribution Only] Thanks Abner for the up-stream. Looks good to me. -Original Message- From: Chang, Abner Sent: Thursday, May 23, 2024 12:12 PM To: devel@edk2.groups.io Cc: Grimes, Paul ; Attar, AbdulLateef (Abdul Lateef) ; Fu, Igniculus ; Yao, Ken ; Xing, Eric ; Zhai, MingXin (Duke) Subject: [edk2-platforms][PATCH 2/3] Platform/AMD: Update Readme.md From: Abner Chang Cc: Paul Grimes Cc: Abdul Lateef Attar Cc: Igniculus Fu Cc: Ken Yao Cc: Eric Xing Cc: Duke Zhai Signed-off-by: Abner Chang --- Platform/AMD/Readme.md | 64 -- 1 file changed, 49 insertions(+), 15 deletions(-) diff --git a/Platform/AMD/Readme.md b/Platform/AMD/Readme.md index 99d2b990c7..3297c6ba59 100644 --- a/Platform/AMD/Readme.md +++ b/Platform/AMD/Readme.md @@ -7,18 +7,25 @@ booting certain AMD platforms. The definition of sub-folders is described in bel ## Term and Definitions +* **AGESA** + + AMD Generic Encapsulated Software Architecture that are executed as + part of a host platform BIOS. + * **AMD Platform** (platform in short) - AMD platform refers to a platform that supports the particular AMD SoC (processor), such as AMD EPYC Milan and Genoa processors. + AMD platform refers to a platform that supports the particular AMD + SoC (processor), such as AMD EPYC Milan and Genoa processors. * **AMD Board** (board in short) AMD board is a generic terminology refers to a board that is designed based on a specific AMD SoC architecture (also referred as AMD platform). More than one boards - are possibly designed to support an AMD platform with different configuration, such as 1-processor socket or 2-processor sockets board. + are possibly designed to support an AMD platform with different + configuration, such as 1-processor socket or 2-processor sockets board. * **AMD edk2 Platform Package** (platform package in short) - + The folder has the AMD edk2 platform common modules. * **AMD edk2 Board Package** (board package in short) @@ -28,29 +35,52 @@ booting certain AMD platforms. The definition of sub-folders is described in bel ## Package Definition +* **AgesaModulePkg** + + This package contains all of the private interfaces and build + configuration files for the AGESA support. + +* **AgesaPkg** + + This package contains all of the public interfaces and build + configuration files for the AGESA support. + +* **AmdCbsPkg** + + AMD Configurable BIOS Setting. Provides the edk2 formset following + the UEFI HII spec to configure BIOS settings. + +* **AmdCpmPkg** + + AMD Common Platform Module software is a BIOS procedure library + designed to aid AMD customers to quickly implement AMD platform technology into their products. + * **AmdPlatformPkg** - AMD platform edk2 package under this folder provides the common edk2 modules those - are leverage by platforms. Usually those modules have no dependencies with - particular platforms. The module under this scope can provides a common implementation - for all platforms, or it may just provide a framework but the differences of implementation could be configured through the PCDs declared in AmdPlatformPkg.dec, or - the board level library provided in the \Pkg. + AMD platform edk2 package under this folder provides the common edk2 + modules that are leveraged by platforms. Usually those modules have no + dependencies with particular platforms. Modules under this scope can + provide a common implementation for all platforms, or may just + provide a framework but the differences of implementation could be + configured through the PCDs declared in AmdPlatformPkg.dec, or the board level library provided in the \Pkg. * **AmdMinBoardPkg** - This package provides the common edk2 modules those can be leverage across AMD boards those use MinPlatformPkg framework. + This package provides the common edk2 modules that can be leveraged + across AMD boards using the MinPlatform framework. * **\Board** - This is
Re: [edk2-devel] [edk2-platforms][PATCH 3/3] edk2-platform/Maintainer: Add entries for AMD packages
Reviewed-by: Abdul Lateef Attar On 23-05-2024 21:57, Michael D Kinney via groups.io wrote: Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding. Reviewed-by: Michael D Kinney -Original Message- From:abner.ch...@amd.com Sent: Wednesday, May 22, 2024 9:12 PM To:devel@edk2.groups.io Cc: Leif Lindholm; Kinney, Michael D Subject: [edk2-platforms][PATCH 3/3] edk2-platform/Maintainer: Add entries for AMD packages From: Abner Chang Signed-off-by: Abner Chang Cc: Leif Lindholm Cc: Michael D Kinney --- Maintainers.txt | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/Maintainers.txt b/Maintainers.txt index 877620a1b0..af688c3813 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -86,8 +86,20 @@ M: Leif Lindholm AMD F: Platform/AMD M: Abner Chang -M: Abdul Lateef Attar +M: Abdul Lateef Attar +M: Paul Grimes + +F: Platform/AMD/AgesaModulePkg +F: Platform/AMD/AgesaPkg +F: Platform/AMD/AmdCbsPkg +M: Paul Grimes +R: Abdul Lateef Attar +R: Abner Chang + +F: Platform/AMD/AmdCpmPkg +M: Abdul Lateef Attar R: Paul Grimes +R: Abner Chang AMD Seattle F: Platform/AMD/OverdriveBoard/ -- 2.37.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119171): https://edk2.groups.io/g/devel/message/119171 Mute This Topic: https://groups.io/mt/106257081/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms][PATCH 3/3] edk2-platform/Maintainer: Add entries for AMD packages
Reviewed-by: Michael D Kinney > -Original Message- > From: abner.ch...@amd.com > Sent: Wednesday, May 22, 2024 9:12 PM > To: devel@edk2.groups.io > Cc: Leif Lindholm ; Kinney, Michael D > > Subject: [edk2-platforms][PATCH 3/3] edk2-platform/Maintainer: Add entries > for AMD packages > > From: Abner Chang > > Signed-off-by: Abner Chang > Cc: Leif Lindholm > Cc: Michael D Kinney > --- > Maintainers.txt | 14 +- > 1 file changed, 13 insertions(+), 1 deletion(-) > > diff --git a/Maintainers.txt b/Maintainers.txt > index 877620a1b0..af688c3813 100644 > --- a/Maintainers.txt > +++ b/Maintainers.txt > @@ -86,8 +86,20 @@ M: Leif Lindholm > AMD > F: Platform/AMD > M: Abner Chang > -M: Abdul Lateef Attar > +M: Abdul Lateef Attar > +M: Paul Grimes > + > +F: Platform/AMD/AgesaModulePkg > +F: Platform/AMD/AgesaPkg > +F: Platform/AMD/AmdCbsPkg > +M: Paul Grimes > +R: Abdul Lateef Attar > +R: Abner Chang > + > +F: Platform/AMD/AmdCpmPkg > +M: Abdul Lateef Attar > R: Paul Grimes > +R: Abner Chang > > AMD Seattle > F: Platform/AMD/OverdriveBoard/ > -- > 2.37.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119166): https://edk2.groups.io/g/devel/message/119166 Mute This Topic: https://groups.io/mt/106257081/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms][PATCH V3 01/17] Platform/ARM/NorFlashDxe: Move DiskIo related functions out of NorFlash.c
Hi Sahil,
I cannot apply your patches cleanly. Can you share a github branch with your
patches, please?
Regards,
Sami Mujawar
On 23/05/2024, 11:56, "Sahil Kaushal" mailto:sahil.kaus...@arm.com>> wrote:
From: sahil mailto:sa...@arm.com>>
Moving these functions from NorFlash.c to NorFlashBlockIoDxe.c as
they are not dependent on any particular flash implementation.
Signed-off-by: sahil mailto:sa...@arm.com>>
---
Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 129
Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c | 129
2 files changed, 129 insertions(+), 129 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 1b431073ee93..60854ef2a7d0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -807,135 +807,6 @@ NorFlashWriteSingleBlock (
return EFI_SUCCESS;
}
-/*
- Although DiskIoDxe will automatically install the DiskIO protocol whenever
- we install the BlockIO protocol, its implementation is sub-optimal as it reads
- and writes entire blocks using the BlockIO protocol. In fact we can access
- NOR flash with a finer granularity than that, so we can improve performance
- by directly producing the DiskIO protocol.
-*/
-
-/**
- Read BufferSize bytes from Offset into Buffer.
-
- @param This Protocol instance pointer.
- @param MediaId Id of the media, changes every time the media is replaced.
- @param Offset The starting byte offset to read from
- @param BufferSize Size of Buffer
- @param Buffer Buffer containing read data
-
- @retval EFI_SUCCESS The data was read correctly from the device.
- @retval EFI_DEVICE_ERROR The device reported an error while performing the
read.
- @retval EFI_NO_MEDIA There is no media in the device.
- @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.
- @retval EFI_INVALID_PARAMETER The read request contains device addresses that
are not
- valid for the device.
-
-**/
-EFI_STATUS
-EFIAPI
-NorFlashDiskIoReadDisk (
- IN EFI_DISK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 DiskOffset,
- IN UINTN BufferSize,
- OUT VOID *Buffer
- )
-{
- NOR_FLASH_INSTANCE *Instance;
- UINT32 BlockSize;
- UINT32 BlockOffset;
- EFI_LBA Lba;
-
- Instance = INSTANCE_FROM_DISKIO_THIS (This);
-
- if (MediaId != Instance->Media.MediaId) {
- return EFI_MEDIA_CHANGED;
- }
-
- BlockSize = Instance->Media.BlockSize;
- Lba = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize, );
-
- return NorFlashRead (Instance, Lba, BlockOffset, BufferSize, Buffer);
-}
-
-/**
- Writes a specified number of bytes to a device.
-
- @param This Indicates a pointer to the calling context.
- @param MediaId ID of the medium to be written.
- @param Offset The starting byte offset on the logical block I/O device to
write.
- @param BufferSize The size in bytes of Buffer. The number of bytes to write
to the device.
- @param Buffer A pointer to the buffer containing the data to be written.
-
- @retval EFI_SUCCESS The data was written correctly to the device.
- @retval EFI_WRITE_PROTECTED The device can not be written to.
- @retval EFI_DEVICE_ERROR The device reported an error while performing the
write.
- @retval EFI_NO_MEDIA There is no media in the device.
- @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.
- @retval EFI_INVALID_PARAMETER The write request contains device addresses
that are not
- valid for the device.
-
-**/
-EFI_STATUS
-EFIAPI
-NorFlashDiskIoWriteDisk (
- IN EFI_DISK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN UINT64 DiskOffset,
- IN UINTN BufferSize,
- IN VOID *Buffer
- )
-{
- NOR_FLASH_INSTANCE *Instance;
- UINT32 BlockSize;
- UINT32 BlockOffset;
- EFI_LBA Lba;
- UINTN RemainingBytes;
- UINTN WriteSize;
- EFI_STATUS Status;
-
- Instance = INSTANCE_FROM_DISKIO_THIS (This);
-
- if (MediaId != Instance->Media.MediaId) {
- return EFI_MEDIA_CHANGED;
- }
-
- BlockSize = Instance->Media.BlockSize;
- Lba = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize, );
-
- RemainingBytes = BufferSize;
-
- // Write either all the remaining bytes, or the number of bytes that bring
- // us up to a block boundary, whichever is less.
- // (DiskOffset | (BlockSize - 1)) + 1) rounds DiskOffset up to the next
- // block boundary (even if it is already on one).
- WriteSize = MIN (RemainingBytes, ((DiskOffset | (BlockSize - 1)) + 1) -
DiskOffset);
-
- do {
- if (WriteSize == BlockSize) {
- // Write a full block
- Status = NorFlashWriteFullBlock (Instance, Lba, Buffer, BlockSize / sizeof
(UINT32));
- } else {
- // Write a partial block
- Status = NorFlashWriteSingleBlock (Instance, Lba, BlockOffset, ,
Buffer);
- }
-
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
Re: [edk2-devel] [edk2-platforms][PATCH V3 11/17] Platform/ARM/NorFlashDxe: Fix memory leak in NorFlashCreateInstance()
Hi Sahil,
Thank you for this patch.
I have a minor suggession marked inline as [SAMI].
Otherwise this patch looks good to me.
Reviewed-by: Sami Mujawar
Regards,
Sami Mujawar
On 23/05/2024 11:55 am, Sahil Kaushal wrote:
From: sahil
This patch adds error_handler1 and error_handler2 labels in
NorFlashCreateInstance() function to handle the cleanup.
error_handler1: Frees just the Instance structure as the
ShadowBuffer is not allocated yet.
error_handler2: Frees both Instance and Instance->ShadowBuffer.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c | 18
+-
Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 19
++-
2 files changed, 27 insertions(+), 10 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
index e01b05d91978..fd47bd9e4c63 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -135,7 +135,8 @@ NorFlashCreateInstance (
Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);
if (Instance->ShadowBuffer == NULL) {
-return EFI_OUT_OF_RESOURCES;
+Status = EFI_OUT_OF_RESOURCES;
+goto error_handler1;
}
if (SupportFvb) {
@@ -152,8 +153,7 @@ NorFlashCreateInstance (
NULL
);
if (EFI_ERROR (Status)) {
- FreePool (Instance);
- return Status;
+ goto error_handler2;
}
} else {
Status = gBS->InstallMultipleProtocolInterfaces (
@@ -167,12 +167,20 @@ NorFlashCreateInstance (
NULL
);
if (EFI_ERROR (Status)) {
- FreePool (Instance);
- return Status;
+ goto error_handler2;
}
}
*NorFlashInstance = Instance;
[SNIP]
+ return EFI_SUCCESS;
+
+error_handler1:
+ FreePool (Instance);
+ return Status;
+
+error_handler2:
+ FreePool (Instance->ShadowBuffer);
+ FreePool (Instance);
return Status;
[/SNIP]
[SAMI] I think the above code can be simplified as below:
---
+ return Status;
+
+error_handler2:
+ FreePool (Instance->ShadowBuffer);
+error_handler2:
+ FreePool (Instance);
return Status;
---
A similar change is reuired later in this patch below.
If you agree, I will fix this up before merging the patch.
[/SAMI]
}
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
index 16fe3762e125..17dfe26627dd 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
@@ -129,7 +129,8 @@ NorFlashCreateInstance (
Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);
if (Instance->ShadowBuffer == NULL) {
-return EFI_OUT_OF_RESOURCES;
+Status = EFI_OUT_OF_RESOURCES;
+goto error_handler1;
}
if (SupportFvb) {
@@ -142,16 +143,24 @@ NorFlashCreateInstance (
>FvbProtocol
);
if (EFI_ERROR (Status)) {
- FreePool (Instance);
- return Status;
+ goto error_handler2;
}
} else {
DEBUG ((DEBUG_ERROR, "standalone MM NOR Flash driver only support
FVB.\n"));
-FreePool (Instance);
-return EFI_UNSUPPORTED;
+Status = EFI_UNSUPPORTED;
+goto error_handler2;
}
*NorFlashInstance = Instance;
+ return EFI_SUCCESS;
+
+error_handler1:
+ FreePool (Instance);
+ return Status;
+
+error_handler2:
+ FreePool (Instance->ShadowBuffer);
+ FreePool (Instance);
return Status;
}
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Re: [edk2-devel] [edk2-platforms][PATCH 2/3] Platform/AMD: Update Readme.md
[AMD Official Use Only - AMD Internal Distribution Only] [AMD Official Use Only - AMD Internal Distribution Only] Thanks Abner for the up-stream. Looks good to me. Reviewed-by: Ken Yao -Original Message- From: Zhai, MingXin (Duke) Sent: Thursday, May 23, 2024 3:47 PM To: Chang, Abner ; devel@edk2.groups.io Cc: Grimes, Paul ; Attar, AbdulLateef (Abdul Lateef) ; Fu, Igniculus ; Yao, Ken ; Xing, Eric Subject: RE: [edk2-platforms][PATCH 2/3] Platform/AMD: Update Readme.md [AMD Official Use Only - AMD Internal Distribution Only] Thanks Abner for the up-stream. Looks good to me. -Original Message- From: Chang, Abner Sent: Thursday, May 23, 2024 12:12 PM To: devel@edk2.groups.io Cc: Grimes, Paul ; Attar, AbdulLateef (Abdul Lateef) ; Fu, Igniculus ; Yao, Ken ; Xing, Eric ; Zhai, MingXin (Duke) Subject: [edk2-platforms][PATCH 2/3] Platform/AMD: Update Readme.md From: Abner Chang Cc: Paul Grimes Cc: Abdul Lateef Attar Cc: Igniculus Fu Cc: Ken Yao Cc: Eric Xing Cc: Duke Zhai Signed-off-by: Abner Chang --- Platform/AMD/Readme.md | 64 -- 1 file changed, 49 insertions(+), 15 deletions(-) diff --git a/Platform/AMD/Readme.md b/Platform/AMD/Readme.md index 99d2b990c7..3297c6ba59 100644 --- a/Platform/AMD/Readme.md +++ b/Platform/AMD/Readme.md @@ -7,18 +7,25 @@ booting certain AMD platforms. The definition of sub-folders is described in bel ## Term and Definitions +* **AGESA** + + AMD Generic Encapsulated Software Architecture that are executed as + part of a host platform BIOS. + * **AMD Platform** (platform in short) - AMD platform refers to a platform that supports the particular AMD SoC (processor), such as AMD EPYC Milan and Genoa processors. + AMD platform refers to a platform that supports the particular AMD + SoC (processor), such as AMD EPYC Milan and Genoa processors. * **AMD Board** (board in short) AMD board is a generic terminology refers to a board that is designed based on a specific AMD SoC architecture (also referred as AMD platform). More than one boards - are possibly designed to support an AMD platform with different configuration, such as 1-processor socket or 2-processor sockets board. + are possibly designed to support an AMD platform with different + configuration, such as 1-processor socket or 2-processor sockets board. * **AMD edk2 Platform Package** (platform package in short) - + The folder has the AMD edk2 platform common modules. * **AMD edk2 Board Package** (board package in short) @@ -28,29 +35,52 @@ booting certain AMD platforms. The definition of sub-folders is described in bel ## Package Definition +* **AgesaModulePkg** + + This package contains all of the private interfaces and build + configuration files for the AGESA support. + +* **AgesaPkg** + + This package contains all of the public interfaces and build + configuration files for the AGESA support. + +* **AmdCbsPkg** + + AMD Configurable BIOS Setting. Provides the edk2 formset following + the UEFI HII spec to configure BIOS settings. + +* **AmdCpmPkg** + + AMD Common Platform Module software is a BIOS procedure library + designed to aid AMD customers to quickly implement AMD platform technology into their products. + * **AmdPlatformPkg** - AMD platform edk2 package under this folder provides the common edk2 modules those - are leverage by platforms. Usually those modules have no dependencies with - particular platforms. The module under this scope can provides a common implementation - for all platforms, or it may just provide a framework but the differences of implementation could be configured through the PCDs declared in AmdPlatformPkg.dec, or - the board level library provided in the \Pkg. + AMD platform edk2 package under this folder provides the common edk2 + modules that are leveraged by platforms. Usually those modules have no + dependencies with particular platforms. Modules under this scope can + provide a common implementation for all platforms, or may just + provide a framework but the differences of implementation could be + configured through the PCDs declared in AmdPlatformPkg.dec, or the board level library provided in the \Pkg. * **AmdMinBoardPkg** - This package provides the common edk2 modules those can be leverage across AMD boards those use MinPlatformPkg framework. + This package provides the common edk2 modules that can be leveraged + across AMD boards using the MinPlatform framework. * **\Board** - This is the folder named by SoC and accommodate one or multiple board packages those - are designed base on the same SoC platform. Board folder may contain edk2 - package meta files directly or the sub-folders named by \Pkg for a - variety configurations of a platform. + This is the folder named by SoC and accommodates one or multiple + board packages that are designed based on the same SoC platform. Board folder may contain edk2 package meta
[edk2-devel] [edk2-platforms][PATCH V3 17/17] Platform/ARM/N1Sdp: Enable FaultTolerantWrite Dxe driver for N1Sdp
From: sahil This driver enables Fault Tolerant Write protocol, which provides fault tolerant write capability for block devices. Signed-off-by: sahil --- Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 5 + Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 1 + 2 files changed, 6 insertions(+) diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc index fd630fa08c35..743c2e647b76 100644 --- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc @@ -162,6 +162,10 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20 # NOR flash support + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x18F4 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x0002 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x18F2 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x0002 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x18F0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0002 @@ -228,6 +232,7 @@ NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf } + MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf # ACPI Support MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf index 07118725f168..7b7eda51c70c 100644 --- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf @@ -90,6 +90,7 @@ READ_LOCK_STATUS = TRUE INF MdeModulePkg/Universal/Metronome/Metronome.inf INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf -- 2.25.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119159): https://edk2.groups.io/g/devel/message/119159 Mute This Topic: https://groups.io/mt/106260158/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms][PATCH V3 16/17] Platform/ARM/N1Sdp: Persistent storage for N1Sdp
From: sahil
Enable persistent storage on QSPI flash device.
Signed-off-by: sahil
---
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 19 ++-
Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 2 ++
2 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index 46412bff7d78..fd630fa08c35 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -161,11 +161,9 @@
# ACPI Table Version
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
- # Runtime Variable storage
- gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0
- gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE
- gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
- gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800
+ # NOR flash support
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x18F0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0002
#
@@ -197,6 +195,16 @@
gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x800F
}
+ # NOR flash support
+ Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf {
+
+
NorFlashDeviceLib|Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
+
NorFlashPlatformLib|Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
+ NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf
+
+ gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress|0x1C0C
+ }
+
# Architectural Protocols
ArmPkg/Drivers/CpuDxe/CpuDxe.inf
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
@@ -217,6 +225,7 @@
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
+
NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
}
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
index 7aae8e6a753b..07118725f168 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
@@ -140,6 +140,8 @@ READ_LOCK_STATUS = TRUE
INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+ INF Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
+
INF Platform/ARM/Drivers/BootMonFs/BootMonFs.inf
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
--
2.25.1
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[edk2-devel] [edk2-platforms][PATCH V3 15/17] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe
From: sahil In N1Sdp platform, the SoC is connected to IOFPGA which has a Cadence Quad SPI (QSPI) controller. This QSPI controller manages the flash chip device via QSPI bus. This patch adds CadenceQspiNorFlashDeviceLib which is used to manage and access the above configuration. Signed-off-by: sahil --- Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf | 32 + Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h | 46 + Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c | 1034 3 files changed, 1112 insertions(+) diff --git a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf new file mode 100644 index ..506876b62285 --- /dev/null +++ b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf @@ -0,0 +1,32 @@ +#/** @file +# +# Component description file for CadenceQspiNorFlashDeviceLib Library +# +# Copyright (c) 2024, Arm Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION= 0x00010005 + BASE_NAME = CadenceQspiNorFlashDeviceLib + FILE_GUID = ed172366-066b-4998-9b5e-ca7f385a170b + MODULE_TYPE= DXE_RUNTIME_DRIVER + VERSION_STRING = 1.0 + LIBRARY_CLASS = NorFlashDeviceLib + +[Sources.common] + CadenceQspiNorFlashDeviceLib.c + CadenceQspiNorFlashDeviceLib.h + +[Packages] + MdePkg/MdePkg.dec + Platform/ARM/ARM.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + IoLib + TimerLib diff --git a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h new file mode 100644 index ..951a93481dd1 --- /dev/null +++ b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h @@ -0,0 +1,46 @@ +/** @file + + Copyright (c) 2024, ARM Limited. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ +#define CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ + +#define NOR_FLASH_ERASE_RETRY 10 + +// QSPI Controller defines +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OFFSET 0x90 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_EXECUTE0x01 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_ENABLE0x01 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BIT_POS 19 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS 16 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_STATUS_BIT 0x02 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OPCODE_BIT_POS 24 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_ENABLE0x01 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_BYTE_3B 0x02 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READEN_BIT_POS 23 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS 20 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_8C 0x8 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_BIT_POS 7 +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_DATA_BYTES(x) ((x - 1) << CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS) +#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_ADDR_BYTES(x) ((x - 1) << CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS) + +#define CDNS_QSPI_FLASH_CMD_READ_DATA_REG_OFFSET 0xA0 + +#define CDNS_QSPI_FLASH_CMD_ADDR_REG_OFFSET 0x94 + +#define CDNS_QSPI_FLASH_CMD_STATUS_POLL_TIMEOUT_MS 1000u // Command Status Register read timeout + +#define SPINOR_SR_WIP BIT0 // Write in progress + +#define SPINOR_OP_WREN 0x06 // Write enable +#define SPINOR_OP_BE_4K 0x20 // Erase 4KiB block +#define SPINOR_OP_RDID 0x9f // Read JEDEC ID +#define SPINOR_OP_RDSR 0x05 // Read status register + +#define SPINOR_SR_WIP_POLL_TIMEOUT_MS 1000u // Status Register read timeout + +#endif /* CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ */ diff --git a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c new file mode 100644 index ..f97c8d51fd48 --- /dev/null +++ b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c @@ -0,0 +1,1034 @@ +/** @file + + Copyright (c) 2024 ARM Limited. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include +#include + +#include "CadenceQspiNorFlashDeviceLib.h" + +/** + Converts milliseconds into number of ticks of the performance counter. + + @param[in] Milliseconds Milliseconds to convert into ticks. + + @retval Milliseconds expressed as number of
[edk2-devel] [edk2-platforms][PATCH V3 14/17] Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp
From: sahil
Add NOR flash library, this library provides APIs for getting the list
of NOR flash devices on the platform.
This flash is shared between AP core and System Control Processor. The
lower addresses are used to store SCP and AP boot images and higher
addresses will be used for variable storage.
Signed-off-by: sahil
---
Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf | 35 +
Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 1 +
Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c | 80
3 files changed, 116 insertions(+)
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
new file mode 100644
index ..a9495cf667d5
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
@@ -0,0 +1,35 @@
+## @file
+# NOR flash lib for ARM Neoverse N1 platform.
+#
+# Copyright (c) 2024, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION= 0x0001001B
+ BASE_NAME = NorFlashNeoverseN1SocLib
+ FILE_GUID = 7006fcf1-a585-4272-92e3-b286b1dff5bb
+ MODULE_TYPE= DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = NorFlashPlatformLib
+
+[Sources.common]
+ NorFlashLib.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Platform/ARM/ARM.dec
+ Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+
+[FixedPcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
index 2dae57a0f01a..2a592e5adc2f 100644
--- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
+++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
@@ -47,6 +47,7 @@
// SCP QSPI flash device
#define NEOVERSEN1SOC_SCP_QSPI_AHB_BASE 0x1800
#define NEOVERSEN1SOC_SCP_QSPI_AHB_SZ0x200
+#define NEOVERSEN1SOC_FIRMWARE_IAMGES_SZ 0x80
/*
* Platform information structure stored in Non-secure SRAM. Platform
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
new file mode 100644
index ..a354ffb5ac6d
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
@@ -0,0 +1,80 @@
+/** @file
+* NOR flash lib for ARM Neoverse N1 platform
+*
+* Copyright (c) 2024, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include
+#include
+#include
+#include
+
+#define FW_ENV_REGION_BASE FixedPcdGet32 (PcdFlashNvStorageVariableBase)
+#define FW_ENV_REGION_SIZE (FixedPcdGet32 (PcdFlashNvStorageVariableSize) + \
+FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + \
+FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize))
+
+STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] = {
+ {
+/// Environment variable region
+NEOVERSEN1SOC_SCP_QSPI_AHB_BASE,///< device base
+FW_ENV_REGION_BASE, ///< region base
+FW_ENV_REGION_SIZE, ///< region size
+SIZE_4KB, ///< block size
+ },
+};
+
+/**
+ Dummy implementation of NorFlashPlatformInitialization to
+ comply with NorFlashPlatformLib structure.
+
+ @retvalEFI_SUCCESSSuccess.
+**/
+EFI_STATUS
+NorFlashPlatformInitialization (
+ VOID
+ )
+{
+ return EFI_SUCCESS;
+}
+
+/**
+ Get NOR flash region info
+
+ @param[out]NorFlashDevicesNOR flash regions info.
+ @param[out]Count number of flash instance.
+
+ @retvalEFI_SUCCESSSuccess.
+ @retvalEFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retvalEFI_ACCESS_DENIED Invalid variable region address.
+**/
+EFI_STATUS
+NorFlashPlatformGetDevices (
+ OUT NOR_FLASH_DESCRIPTION **NorFlashDevices,
+ OUT UINT32 *Count
+ )
+{
+ if ((NorFlashDevices == NULL) || (Count == NULL)) {
+return EFI_INVALID_PARAMETER;
+ }
+
+ if ((NEOVERSEN1SOC_SCP_QSPI_AHB_BASE +
+ NEOVERSEN1SOC_FIRMWARE_IAMGES_SZ) >=
+ FW_ENV_REGION_BASE)
+ {
+DEBUG ((
+ DEBUG_ERROR,
+ "NorFlashPlatformInitialization: Variable region overlapping with "
+ "firmware region.\n"
+ ));
+
+return EFI_ACCESS_DENIED;
+ }
+
+ *NorFlashDevices = mNorFlashDevices;
+ *Count = ARRAY_SIZE (mNorFlashDevices);
+ return
[edk2-devel] [edk2-platforms][PATCH V3 13/17] Silicon/ARM/NeoverseN1Soc: Enable SCP QSPI flash region
From: sahil
Enable SCP QSPI flash region access by adding it in the PlatformLibMem.
This flash is shared between AP core and System Control Processor. The
lower addresses are used to store SCP and AP boot images and higher
addresses will be used for variable storage.
Signed-off-by: sahil
---
Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 7 +++
Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c | 8 +++-
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
index 5483e7bc5f68..2dae57a0f01a 100644
--- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
+++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
@@ -4,6 +4,9 @@
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
+* Arm Neoverse N1 System Development Platform Technical Reference Manual
+* https://developer.arm.com/documentation/101489//?lang=en
+*
**/
#ifndef NEOVERSEN1SOC_PLATFORM_H_
@@ -41,6 +44,10 @@
#define NEOVERSEN1SOC_EXP_PERIPH_BASE0 0x1C00
#define NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ0x130
+// SCP QSPI flash device
+#define NEOVERSEN1SOC_SCP_QSPI_AHB_BASE 0x1800
+#define NEOVERSEN1SOC_SCP_QSPI_AHB_SZ0x200
+
/*
* Platform information structure stored in Non-secure SRAM. Platform
* information are passed from the trusted firmware with the below structure
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
index 80daedb33416..282bfbc81736 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
@@ -14,7 +14,7 @@
#include
// The total number of descriptors, including the final "end-of-table"
descriptor.
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 19
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 20
/**
Returns the Virtual Memory Map of the platform.
@@ -203,6 +203,12 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[Index].Length =
NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ;
VirtualMemoryTable[Index].Attributes =
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+ // SCP QSPI flash device
+ VirtualMemoryTable[++Index].PhysicalBase = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;
+ VirtualMemoryTable[Index].VirtualBase = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;
+ VirtualMemoryTable[Index].Length = NEOVERSEN1SOC_SCP_QSPI_AHB_SZ;
+ VirtualMemoryTable[Index].Attributes =
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
if (PlatInfo->MultichipMode == 1) {
//Remote DDR (2GB)
VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdExtMemorySpace) +
--
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[edk2-devel] [edk2-platforms][PATCH V3 12/17] Platform/ARM: Add optional provision to fetch and print NOR Flash info
From: sahil This patch adds an optional functionality in NorFlashDxe to fetch and print NOR Flash information from NorFlashInfoLib using its JEDEC ID. NOR Flash libraries will implement a function "NorFlashReadID" which will fetch and return JEDEC ID. This JEDEC ID can be then printed along with the NOR Flash info by NorFlashInfoLib. If this functionality is not needed then the function can just return EFI_UNSUPPORTED. Signed-off-by: sahil --- Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 2 ++ Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc| 2 ++ Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc | 2 ++ Platform/ARM/JunoPkg/ArmJuno.dsc | 2 ++ Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc| 2 ++ Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf | 1 + Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf| 1 + Platform/ARM/Include/Library/NorFlashDeviceLib.h | 17 + Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c | 18 ++ Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 18 ++ Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.c | 18 ++ 11 files changed, 83 insertions(+) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc index 3dcf422eab4b..107a5311b666 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc @@ -36,6 +36,8 @@ LcdPlatformLib|Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgiLib.inf NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf + # NOR flash identification support + NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc index ab0e2a957a1b..19fd08dd7817 100644 --- a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc @@ -65,6 +65,8 @@ IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/StandaloneMmNorFlashLib.inf + # NOR flash identification support + NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNull/PlatformSecureLibNull.inf diff --git a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc index 70ff049d3248..f7f7b39bbf58 100644 --- a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc +++ b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc @@ -95,6 +95,8 @@ ArmPlatformSysConfigLib|Platform/ARM/VExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf + # NOR flash identification support + NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf # ARM PL031 RTC Driver diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc index 81d2cbe4359f..1ca43b9e7dba 100644 --- a/Platform/ARM/JunoPkg/ArmJuno.dsc +++ b/Platform/ARM/JunoPkg/ArmJuno.dsc @@ -42,6 +42,8 @@ NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/JunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf + # NOR flash identification support + NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf diff --git a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc index a5805da49c92..a0a9d9a21a1b 100644 --- a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc +++ b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc @@ -102,6 +102,8 @@ !if $(ENABLE_UEFI_SECURE_VARIABLE) == TRUE NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
[edk2-devel] [edk2-platforms][PATCH V3 11/17] Platform/ARM/NorFlashDxe: Fix memory leak in NorFlashCreateInstance()
From: sahil
This patch adds error_handler1 and error_handler2 labels in
NorFlashCreateInstance() function to handle the cleanup.
error_handler1: Frees just the Instance structure as the
ShadowBuffer is not allocated yet.
error_handler2: Frees both Instance and Instance->ShadowBuffer.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c | 18 +-
Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 19
++-
2 files changed, 27 insertions(+), 10 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
index e01b05d91978..fd47bd9e4c63 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -135,7 +135,8 @@ NorFlashCreateInstance (
Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);
if (Instance->ShadowBuffer == NULL) {
-return EFI_OUT_OF_RESOURCES;
+Status = EFI_OUT_OF_RESOURCES;
+goto error_handler1;
}
if (SupportFvb) {
@@ -152,8 +153,7 @@ NorFlashCreateInstance (
NULL
);
if (EFI_ERROR (Status)) {
- FreePool (Instance);
- return Status;
+ goto error_handler2;
}
} else {
Status = gBS->InstallMultipleProtocolInterfaces (
@@ -167,12 +167,20 @@ NorFlashCreateInstance (
NULL
);
if (EFI_ERROR (Status)) {
- FreePool (Instance);
- return Status;
+ goto error_handler2;
}
}
*NorFlashInstance = Instance;
+ return EFI_SUCCESS;
+
+error_handler1:
+ FreePool (Instance);
+ return Status;
+
+error_handler2:
+ FreePool (Instance->ShadowBuffer);
+ FreePool (Instance);
return Status;
}
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
index 16fe3762e125..17dfe26627dd 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c
@@ -129,7 +129,8 @@ NorFlashCreateInstance (
Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);
if (Instance->ShadowBuffer == NULL) {
-return EFI_OUT_OF_RESOURCES;
+Status = EFI_OUT_OF_RESOURCES;
+goto error_handler1;
}
if (SupportFvb) {
@@ -142,16 +143,24 @@ NorFlashCreateInstance (
>FvbProtocol
);
if (EFI_ERROR (Status)) {
- FreePool (Instance);
- return Status;
+ goto error_handler2;
}
} else {
DEBUG ((DEBUG_ERROR, "standalone MM NOR Flash driver only support
FVB.\n"));
-FreePool (Instance);
-return EFI_UNSUPPORTED;
+Status = EFI_UNSUPPORTED;
+goto error_handler2;
}
*NorFlashInstance = Instance;
+ return EFI_SUCCESS;
+
+error_handler1:
+ FreePool (Instance);
+ return Status;
+
+error_handler2:
+ FreePool (Instance->ShadowBuffer);
+ FreePool (Instance);
return Status;
}
--
2.25.1
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[edk2-devel] [edk2-platforms][PATCH V3 10/17] Platform/ARM: Add HostControllerBaseAddress variable
From: sahil
This variable holds the QSPI controller's base address.
It is defined in ARM.dec as well with the default value of 0x0.
In case a platform is not using it, they can just ignore this
variable and the default value of 0x0 will be propogated and
the variable will not be used.
Signed-off-by: sahil
---
Platform/ARM/ARM.dec | 3 ++
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf | 3 ++
Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf | 2 ++
Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h | 1 +
Platform/ARM/Include/Library/NorFlashDeviceLib.h | 11 ---
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c| 34
+---
Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 12 ---
7 files changed, 54 insertions(+), 12 deletions(-)
diff --git a/Platform/ARM/ARM.dec b/Platform/ARM/ARM.dec
index 86d1fcb4878e..a5e28c372903 100644
--- a/Platform/ARM/ARM.dec
+++ b/Platform/ARM/ARM.dec
@@ -26,3 +26,6 @@
[PcdsFeatureFlag.common]
gPlatformArmTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x001
+
+[PcdsFixedAtBuild.common]
+ gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress|0x0|UINT32|0x0002
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
index de160025b632..6522968d6c5a 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
@@ -65,5 +65,8 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+[FixedPcd]
+ gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress
+
[Depex]
gEfiCpuArchProtocolGuid
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
index d9e7de07165c..eb86d423f106 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
@@ -59,5 +59,7 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+ gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress
+
[Depex]
TRUE
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
index 7fcb949843e8..98464e4868b1 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
@@ -34,6 +34,7 @@
//
EFI_STATUS
NorFlashCreateInstance (
+ IN UINTNHostRegisterBase,
IN UINTNNorFlashDeviceBase,
IN UINTNNorFlashRegionBase,
IN UINTNNorFlashSize,
diff --git a/Platform/ARM/Include/Library/NorFlashDeviceLib.h
b/Platform/ARM/Include/Library/NorFlashDeviceLib.h
index 6833c1ddc456..348136630e78 100644
--- a/Platform/ARM/Include/Library/NorFlashDeviceLib.h
+++ b/Platform/ARM/Include/Library/NorFlashDeviceLib.h
@@ -36,10 +36,13 @@ struct _NOR_FLASH_INSTANCE {
UINT32 Signature; ///< NOR Flash instance
signature.
EFI_HANDLE Handle;///< NOR Flash instance
handle.
- UINTN DeviceBaseAddress; ///< NOR Flash
device base address.
- UINTN RegionBaseAddress; ///< NOR Flash
region base address.
- UINTN Size; ///< NOR Flash
region size.
- EFI_LBAStartLba; ///< Region start
LBA.
+ UINTN HostControllerBaseAddress; ///< NOR
Flash host controller base address.
+///< This
field is optional if no host
+///<
controller is present.
+ UINTN DeviceBaseAddress; ///< NOR
Flash device base address.
+ UINTN RegionBaseAddress; ///< NOR
Flash region base address.
+ UINTN Size; ///< NOR
Flash region size.
+ EFI_LBAStartLba; ///<
Region start LBA.
EFI_BLOCK_IO_PROTOCOL BlockIoProtocol; ///< Instance's
Block IO protocol handle.
EFI_BLOCK_IO_MEDIA Media; ///< Instance's
Media information.
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
index 1c12572ab663..e01b05d91978 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -1,6 +1,6 @@
/** @file NorFlashDxe.c
- Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.
+ Copyright (c) 2011 - 2024, Arm Limited. All
[edk2-devel] [edk2-platforms][PATCH V3 09/17] Platform/ARM/NorFlashDxe: Switch from NorFlash.c to NorFlashDeviceLib
From: sahil NorFlashDeviceLib can be used to provide implementations of different NOR Flash to NorFlashDxe, i.e. NorFlashDxe links with NorFlashDeviceLib and the platforms can specify their respective NorFlashDeviceLib instances. This patch adds the following major changes: 1. Adds changes in NorFlashDxe to look for NorFlashDeviceLib instead of NorFlash.c for flash specific implementation 2. Remove NorFlash.c and NorFlash.h as they are no longer required. 3. Add changes to platform description files to provide P30NorFlashDeviceLib as NorFlashDeviceLib Signed-off-by: sahil --- Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 1 + Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc | 1 + Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc | 1 + Platform/ARM/JunoPkg/ArmJuno.dsc | 1 + Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc | 1 + Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf | 5 +- Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf | 6 +- Platform/ARM/Drivers/NorFlashDxe/NorFlash.h | 108 --- Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 956 Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c | 1 - Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c| 1 - Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c| 1 - Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 1 - 13 files changed, 7 insertions(+), 1077 deletions(-) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc index 1bf489ffeb39..3dcf422eab4b 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc @@ -34,6 +34,7 @@ BasePathLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf LcdHwLib|ArmPlatformPkg/Library/HdLcd/HdLcd.inf LcdPlatformLib|Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgiLib.inf + NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc index 0dd9ebbfc16c..ab0e2a957a1b 100644 --- a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc @@ -63,6 +63,7 @@ AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf BaseCryptLib|CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf + NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/StandaloneMmNorFlashLib.inf OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf diff --git a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc index 9f51e05af561..70ff049d3248 100644 --- a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc +++ b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc @@ -93,6 +93,7 @@ # Versatile Express Specific Libraries PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf ArmPlatformSysConfigLib|Platform/ARM/VExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf + NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc index 7fe796a53433..81d2cbe4359f 100644 --- a/Platform/ARM/JunoPkg/ArmJuno.dsc +++ b/Platform/ARM/JunoPkg/ArmJuno.dsc @@ -40,6 +40,7 @@ ArmPlatformLib|Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf + NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/JunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf diff --git a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc index 0e77b76cae69..a5805da49c92 100644 --- a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc +++ b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc @@ -100,6 +100,7 @@ # STMM for Variable runtime service. !if $(ENABLE_UEFI_SECURE_VARIABLE) == TRUE + NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf NorFlashPlatformLib|Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashStMmLib.inf
[edk2-devel] [edk2-platforms][PATCH V3 08/17] Platform/ARM: Add P30NorFlashDeviceLib Library
From: sahil This patch implements functions to interact with P30 NOR Flash. The code is taken from Platform/ARM/Drivers/NorFlashDxe/NorFlash.c file. Signed-off-by: sahil --- Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf | 35 + Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h | 98 ++ Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.c | 953 3 files changed, 1086 insertions(+) diff --git a/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf new file mode 100644 index ..0707edb54442 --- /dev/null +++ b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf @@ -0,0 +1,35 @@ +#/** @file +# +# Component description file for P30NorFlashDeviceLib library +# +# Copyright (c) 2011 - 2024, Arm Limited. All rights reserved. +# Copyright (c) 2020, Linaro, Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION= 0x00010005 + BASE_NAME = P30NorFlashDeviceLib + FILE_GUID = ed172366-066b-4998-9b5e-ca7f385a1709 + MODULE_TYPE= DXE_DRIVER + VERSION_STRING = 1.0 + LIBRARY_CLASS = NorFlashDeviceLib + +[Sources.common] + P30NorFlashDeviceLib.c + P30NorFlashDeviceLib.h + +[Packages] + MdePkg/MdePkg.dec + Platform/ARM/ARM.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + IoLib + +[Pcd.common] + gPlatformArmTokenSpaceGuid.PcdNorFlashCheckBlockLocked diff --git a/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h new file mode 100644 index ..c310b2310d62 --- /dev/null +++ b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h @@ -0,0 +1,98 @@ +/** @file P30NorFlashDeviceLib.h + + Copyright (c) 2011 - 2024, Arm Limited. All rights reserved. + Copyright (c) 2020, Linaro, Ltd. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef P30_NOR_FLASH_DEVICE_LIB_H_ +#define P30_NOR_FLASH_DEVICE_LIB_H_ + +#define NOR_FLASH_ERASE_RETRY 10 + +// Device access macros +// These are necessary because we use 2 x 16bit parts to make up 32bit data + +#define HIGH_16_BITS 0x +#define LOW_16_BITS 0x +#define LOW_8_BITS0x00FF + +#define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) ) + +#define GET_LOW_BYTE(value) ( value & LOW_8_BITS ) +#define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) ) + +// Each command must be sent simultaneously to both chips, +// i.e. at the lower 16 bits AND at the higher 16 bits +#define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2)) +#define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) ) +#define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd)) + +#define BOTH_ALIGNED(a, b, align) UINTN)(a) | (UINTN)(b)) & ((align) - 1)) == 0) + +// Status Register Bits +#define P30_SR_BIT_WRITE(BIT7 << 16 | BIT7) +#define P30_SR_BIT_ERASE_SUSPEND(BIT6 << 16 | BIT6) +#define P30_SR_BIT_ERASE(BIT5 << 16 | BIT5) +#define P30_SR_BIT_PROGRAM (BIT4 << 16 | BIT4) +#define P30_SR_BIT_VPP (BIT3 << 16 | BIT3) +#define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 | BIT2) +#define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1) +#define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0) + +// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family + +// On chip buffer size for buffered programming operations +// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes. +// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes +#define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128) +#define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4)) +#define MAX_BUFFERED_PROG_ITERATIONS 1000 +#define BOUNDARY_OF_32_WORDS 0x7F + +// CFI Addresses +#define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10 +#define P30_CFI_ADDR_VENDOR_ID 0x13 + +// CFI Data +#define CFI_QRY 0x00595251 + +// READ Commands +#define P30_CMD_READ_DEVICE_ID 0x0090 +#define P30_CMD_READ_STATUS_REGISTER 0x0070 +#define P30_CMD_CLEAR_STATUS_REGISTER 0x0050 +#define P30_CMD_READ_ARRAY 0x00FF +#define P30_CMD_READ_CFI_QUERY 0x0098 + +// WRITE Commands +#define P30_CMD_WORD_PROGRAM_SETUP0x0040 +#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010 +#define P30_CMD_BUFFERED_PROGRAM_SETUP0x00E8 +#define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0 +#define P30_CMD_BEFP_SETUP0x0080 +#define P30_CMD_BEFP_CONFIRM 0x00D0 + +// ERASE Commands +#define P30_CMD_BLOCK_ERASE_SETUP
[edk2-devel] [edk2-platforms][PATCH V3 07/17] Platform/ARM: Create NorFlashDeviceLib library interface for flash specific functions
From: sahil
NorFlashDeviceLib can be used to provide implementations of different
NOR Flash to NorFlashDxe, i.e. NorFlashDxe links with NorFlashDeviceLib
and the platforms can specify their respective NorFlashDeviceLib
instances.
This patch splits NorFlash.h and moves out the function prototypes and
macros that are expected by NorFlashDxe to be implemented by any
Nor Flash implementation to NorFlashDeviceLib.h file.
Signed-off-by: sahil
---
Platform/ARM/ARM.dec | 1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlash.h | 105 +
Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h | 1 +
Platform/ARM/Include/Library/NorFlashDeviceLib.h | 236
4 files changed, 239 insertions(+), 104 deletions(-)
diff --git a/Platform/ARM/ARM.dec b/Platform/ARM/ARM.dec
index be7e6dc83fde..86d1fcb4878e 100644
--- a/Platform/ARM/ARM.dec
+++ b/Platform/ARM/ARM.dec
@@ -17,6 +17,7 @@
[LibraryClasses]
BdsLib|Include/Library/BdsLib.h
+ NorFlashDeviceLib|Include/Library/NorFlashDeviceLib.h
NorFlashPlatformLib|Include/Library/NorFlashPlatformLib.h
[Guids]
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index f30d499042ed..6cb1f64b9875 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -20,6 +20,7 @@
#include
#include
+#include
#define NOR_FLASH_ERASE_RETRY 10
@@ -40,7 +41,6 @@
#define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr) ((BaseAddr) +
((OffsetAddr) << 2))
#define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd
& LOW_16_BITS) )
#define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd)MmioWrite32
(CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))
-#define GET_NOR_BLOCK_ADDRESS(BaseAddr, Lba, LbaSize) ( BaseAddr +
(UINTN)((Lba) * LbaSize) )
// Status Register Bits
#define P30_SR_BIT_WRITE(BIT7 << 16 | BIT7)
@@ -105,107 +105,4 @@
#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060
#define P30_CMD_READ_CONFIGURATION_REGISTER0x0003
-typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;
-
-#pragma pack (1)
-typedef struct {
- VENDOR_DEVICE_PATH Vendor;
- UINT8 Index;
- EFI_DEVICE_PATH_PROTOCOLEnd;
-} NOR_FLASH_DEVICE_PATH;
-#pragma pack ()
-
-struct _NOR_FLASH_INSTANCE {
- UINT32 Signature;
- EFI_HANDLE Handle;
-
- UINTN DeviceBaseAddress;
- UINTN RegionBaseAddress;
- UINTN Size;
- EFI_LBAStartLba;
-
- EFI_BLOCK_IO_PROTOCOL BlockIoProtocol;
- EFI_BLOCK_IO_MEDIA Media;
- EFI_DISK_IO_PROTOCOL DiskIoProtocol;
-
- EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOLFvbProtocol;
- VOID *ShadowBuffer;
-
- NOR_FLASH_DEVICE_PATH DevicePath;
-};
-
-//
-// NorFlash.c
-//
-EFI_STATUS
-NorFlashWriteSingleBlock (
- INNOR_FLASH_INSTANCE *Instance,
- INEFI_LBA Lba,
- INUINTN Offset,
- IN OUTUINTN *NumBytes,
- INUINT8 *Buffer
- );
-
-EFI_STATUS
-NorFlashWriteBlocks (
- IN NOR_FLASH_INSTANCE *Instance,
- IN EFI_LBA Lba,
- IN UINTN BufferSizeInBytes,
- IN VOID*Buffer
- );
-
-EFI_STATUS
-NorFlashReadBlocks (
- IN NOR_FLASH_INSTANCE *Instance,
- IN EFI_LBA Lba,
- IN UINTN BufferSizeInBytes,
- OUT VOID *Buffer
- );
-
-EFI_STATUS
-NorFlashRead (
- IN NOR_FLASH_INSTANCE *Instance,
- IN EFI_LBA Lba,
- IN UINTN Offset,
- IN UINTN BufferSizeInBytes,
- OUT VOID *Buffer
- );
-
-EFI_STATUS
-NorFlashReset (
- IN NOR_FLASH_INSTANCE *Instance
- );
-
-EFI_STATUS
-NorFlashEraseSingleBlock (
- IN NOR_FLASH_INSTANCE *Instance,
- IN UINTN BlockAddress
- );
-
-EFI_STATUS
-NorFlashWriteFullBlock (
- IN NOR_FLASH_INSTANCE *Instance,
- IN EFI_LBA Lba,
- IN UINT32 *DataBuffer,
- IN UINT32 BlockSizeInWords
- );
-
-EFI_STATUS
-NorFlashUnlockAndEraseSingleBlock (
- IN NOR_FLASH_INSTANCE *Instance,
- IN UINTN BlockAddress
- );
-
-VOID
-EFIAPI
-NorFlashLock (
- IN EFI_TPL *OriginalTPL
- );
-
-VOID
-EFIAPI
-NorFlashUnlock (
- IN EFI_TPL OriginalTPL
- );
-
#endif /* __NOR_FLASH_H__ */
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
index c0a3b5861532..7fcb949843e8 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
@@ -19,6 +19,7 @@
#include
#include
+#include
#include
#include
#include
diff
[edk2-devel] [edk2-platforms][PATCH V3 06/17] Platform/ARM/NorFlashDxe: Make local functions STATIC
From: sahil
This patch makes local functions not being used outside
NorFlash.c STATIC.
Also, NorFlashWriteBuffer() is specific to a particular
flash implementation and need not be implemented by
other NOR flash device IPs.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlash.h | 21
Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 3 +++
2 files changed, 3 insertions(+), 21 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index 3102c5e13bad..f30d499042ed 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -134,14 +134,6 @@ struct _NOR_FLASH_INSTANCE {
NOR_FLASH_DEVICE_PATH DevicePath;
};
-EFI_STATUS
-NorFlashWriteBuffer (
- IN NOR_FLASH_INSTANCE *Instance,
- IN UINTN TargetAddress,
- IN UINTN BufferSizeInBytes,
- IN UINT32 *Buffer
- );
-
//
// NorFlash.c
//
@@ -190,19 +182,6 @@ NorFlashEraseSingleBlock (
IN UINTN BlockAddress
);
-EFI_STATUS
-NorFlashUnlockSingleBlockIfNecessary (
- IN NOR_FLASH_INSTANCE *Instance,
- IN UINTN BlockAddress
- );
-
-EFI_STATUS
-NorFlashWriteSingleWord (
- IN NOR_FLASH_INSTANCE *Instance,
- IN UINTN WordAddress,
- IN UINT32 WriteData
- );
-
EFI_STATUS
NorFlashWriteFullBlock (
IN NOR_FLASH_INSTANCE *Instance,
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 15000a692b02..254b8937e210 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -103,6 +103,7 @@ NorFlashUnlockSingleBlock (
return EFI_SUCCESS;
}
+STATIC
EFI_STATUS
NorFlashUnlockSingleBlockIfNecessary (
IN NOR_FLASH_INSTANCE *Instance,
@@ -175,6 +176,7 @@ NorFlashEraseSingleBlock (
return Status;
}
+STATIC
EFI_STATUS
NorFlashWriteSingleWord (
IN NOR_FLASH_INSTANCE *Instance,
@@ -245,6 +247,7 @@ NorFlashWriteSingleWord (
* Therefore, it is a requirement to align buffer writes to 32-bit word
boundaries.
* i.e. the last 4 bits of the target start address must be zero: 0x..00
*/
+STATIC
EFI_STATUS
NorFlashWriteBuffer (
IN NOR_FLASH_INSTANCE *Instance,
--
2.25.1
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[edk2-devel] [edk2-platforms][PATCH V3 05/17] Platform/ARM/NorFlashDxe: Remove unimplemented functions from NorFlash.h
From: sahil
This patch removes NorFlashReadCfiData() and NorFlashWrite()
prototypes from NorFlash.h as these are not implemented or
used anywhere in NorFlashDxe driver.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlash.h | 17 -
1 file changed, 17 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index bd5c6a949cf0..3102c5e13bad 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -134,14 +134,6 @@ struct _NOR_FLASH_INSTANCE {
NOR_FLASH_DEVICE_PATH DevicePath;
};
-EFI_STATUS
-NorFlashReadCfiData (
- IN UINTN DeviceBaseAddress,
- IN UINTN CFI_Offset,
- IN UINT32 NumberOfBytes,
- OUT UINT32 *Data
- );
-
EFI_STATUS
NorFlashWriteBuffer (
IN NOR_FLASH_INSTANCE *Instance,
@@ -187,15 +179,6 @@ NorFlashRead (
OUT VOID *Buffer
);
-EFI_STATUS
-NorFlashWrite (
- INNOR_FLASH_INSTANCE *Instance,
- INEFI_LBA Lba,
- INUINTN Offset,
- IN OUTUINTN *NumBytes,
- INUINT8 *Buffer
- );
-
EFI_STATUS
NorFlashReset (
IN NOR_FLASH_INSTANCE *Instance
--
2.25.1
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[edk2-devel] [edk2-platforms][PATCH V3 04/17] Platform/ARM/NorFlashDxe: Move flash specific functions to NorFlash.c
From: sahil
Refactoring done in this patch has two major parts:
1. Moving out NorFlashUnlockAndEraseSingleBlock and
NorFlashWriteFullBlock functions from NorFlashDxe.c and
NorFlashStandaloneMm.c to NorFlash.c files.
2. At the same time, we are adding NorFlashLock and NorFlashUnlock
functions which will take care of TPL related operations needed by
functions mentioned in point 1. These functions are implemented
in NorFlashDxe.c but are just dummy placeholder functions in
NorFlashStandaloneMm.c file.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlash.h | 26 +++
Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h | 14 --
Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 136 +-
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c | 193
Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 151 +++
5 files changed, 225 insertions(+), 295 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index e0ebb1e2fd35..bd5c6a949cf0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -220,4 +220,30 @@ NorFlashWriteSingleWord (
IN UINT32 WriteData
);
+EFI_STATUS
+NorFlashWriteFullBlock (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN EFI_LBA Lba,
+ IN UINT32 *DataBuffer,
+ IN UINT32 BlockSizeInWords
+ );
+
+EFI_STATUS
+NorFlashUnlockAndEraseSingleBlock (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN UINTN BlockAddress
+ );
+
+VOID
+EFIAPI
+NorFlashLock (
+ IN EFI_TPL *OriginalTPL
+ );
+
+VOID
+EFIAPI
+NorFlashUnlock (
+ IN EFI_TPL OriginalTPL
+ );
+
#endif /* __NOR_FLASH_H__ */
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
index e329e0727617..c0a3b5861532 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
@@ -31,20 +31,6 @@
//
// NorFlashDxe.c
//
-EFI_STATUS
-NorFlashWriteFullBlock (
- IN NOR_FLASH_INSTANCE *Instance,
- IN EFI_LBA Lba,
- IN UINT32 *DataBuffer,
- IN UINT32 BlockSizeInWords
- );
-
-EFI_STATUS
-NorFlashUnlockAndEraseSingleBlock (
- IN NOR_FLASH_INSTANCE *Instance,
- IN UINTN BlockAddress
- );
-
EFI_STATUS
NorFlashCreateInstance (
IN UINTNNorFlashDeviceBase,
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 4e5a97c83c7b..15000a692b02 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -10,7 +10,6 @@
#include
#include "NorFlash.h"
-#include "NorFlashCommon.h"
//
// Global variable declarations
@@ -817,3 +816,138 @@ NorFlashReset (
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
return EFI_SUCCESS;
}
+
+/**
+ * This function unlock and erase an entire NOR Flash block.
+**/
+EFI_STATUS
+NorFlashUnlockAndEraseSingleBlock (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN UINTN BlockAddress
+ )
+{
+ EFI_STATUS Status;
+ UINTN Index;
+ EFI_TPL OriginalTPL;
+
+ NorFlashLock ();
+
+ Index = 0;
+ // The block erase might fail a first time (SW bug ?). Retry it ...
+ do {
+// Unlock the block if we have to
+Status = NorFlashUnlockSingleBlockIfNecessary (Instance, BlockAddress);
+if (EFI_ERROR (Status)) {
+ break;
+}
+
+Status = NorFlashEraseSingleBlock (Instance, BlockAddress);
+Index++;
+ } while ((Index < NOR_FLASH_ERASE_RETRY) && (Status == EFI_WRITE_PROTECTED));
+
+ if (Index == NOR_FLASH_ERASE_RETRY) {
+DEBUG ((DEBUG_ERROR, "EraseSingleBlock(BlockAddress=0x%08x: Block Locked
Error (try to erase %d times)\n", BlockAddress, Index));
+ }
+
+ NorFlashUnlock (OriginalTPL);
+
+ return Status;
+}
+
+EFI_STATUS
+NorFlashWriteFullBlock (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN EFI_LBA Lba,
+ IN UINT32 *DataBuffer,
+ IN UINT32 BlockSizeInWords
+ )
+{
+ EFI_STATUS Status;
+ UINTN WordAddress;
+ UINT32 WordIndex;
+ UINTN BufferIndex;
+ UINTN BlockAddress;
+ UINTN BuffersInBlock;
+ UINTN RemainingWords;
+ EFI_TPL OriginalTPL;
+ UINTN Cnt;
+
+ Status = EFI_SUCCESS;
+
+ // Get the physical address of the block
+ BlockAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress, Lba,
BlockSizeInWords * 4);
+
+ // Start writing from the first address at the start of the block
+ WordAddress = BlockAddress;
+
+ NorFlashLock ();
+
+ Status = NorFlashUnlockAndEraseSingleBlock (Instance, BlockAddress);
+ if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "WriteSingleBlock: ERROR - Failed to Unlock and Erase
the single block at 0x%X\n", BlockAddress));
+goto EXIT;
+ }
+
+ // To speed up
[edk2-devel] [edk2-platforms][PATCH V3 03/17] Platform/ARM/NorFlashDxe: Add NorFlashCommon.h header file
From: sahil
This patch splits NorFlash.h and adds NorFlashCommon.h which
will have all the flash independent functions and macros.
Whereas all the flash specific functions will be in NorFlash.h
header file.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf | 1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf | 1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlash.h | 199
--
Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h | 221
Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c | 1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c| 1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c| 1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 1 +
9 files changed, 228 insertions(+), 199 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
index cdf1f5c27f35..18e99bac 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
@@ -21,6 +21,7 @@
NorFlash.h
NorFlashBlockIoDxe.c
NorFlashDxe.c
+ NorFlashCommon.h
NorFlashFvb.c
[Packages]
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
index 001f281220f2..69c40ccf9c27 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
@@ -22,6 +22,7 @@
NorFlash.c
NorFlash.h
NorFlashFvb.c
+ NorFlashCommon.h
NorFlashStandaloneMm.c
[Packages]
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index d4d97bd22cc5..e0ebb1e2fd35 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -20,9 +20,6 @@
#include
#include
-#include
-#include
-#include
#define NOR_FLASH_ERASE_RETRY 10
@@ -108,11 +105,6 @@
#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060
#define P30_CMD_READ_CONFIGURATION_REGISTER0x0003
-#define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')
-#define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol,
NOR_FLASH_SIGNATURE)
-#define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE,
BlockIoProtocol, NOR_FLASH_SIGNATURE)
-#define INSTANCE_FROM_DISKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE,
DiskIoProtocol, NOR_FLASH_SIGNATURE)
-
typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;
#pragma pack (1)
@@ -158,197 +150,6 @@ NorFlashWriteBuffer (
IN UINT32 *Buffer
);
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoReset (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN BOOLEANExtendedVerification
- );
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoReadBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBALba,
- IN UINTN BufferSizeInBytes,
- OUT VOID *Buffer
- );
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoWriteBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINT32 MediaId,
- IN EFI_LBALba,
- IN UINTN BufferSizeInBytes,
- IN VOID *Buffer
- );
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoFlushBlocks (
- IN EFI_BLOCK_IO_PROTOCOL *This
- );
-
-//
-// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.ReadDisk
-//
-EFI_STATUS
-EFIAPI
-NorFlashDiskIoReadDisk (
- IN EFI_DISK_IO_PROTOCOL *This,
- IN UINT32MediaId,
- IN UINT64Offset,
- IN UINTN BufferSize,
- OUT VOID *Buffer
- );
-
-//
-// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.WriteDisk
-//
-EFI_STATUS
-EFIAPI
-NorFlashDiskIoWriteDisk (
- IN EFI_DISK_IO_PROTOCOL *This,
- IN UINT32MediaId,
- IN UINT64Offset,
- IN UINTN BufferSize,
- IN VOID *Buffer
- );
-
-//
-// NorFlashFvbDxe.c
-//
-
-EFI_STATUS
-EFIAPI
-FvbGetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
- OUT EFI_FVB_ATTRIBUTES_2 *Attributes
- );
-
-EFI_STATUS
-EFIAPI
-FvbSetAttributes (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
- IN OUTEFI_FVB_ATTRIBUTES_2 *Attributes
- );
-
-EFI_STATUS
-EFIAPI
-FvbGetPhysicalAddress (
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
- OUT EFI_PHYSICAL_ADDRESS *Address
- );
-
-EFI_STATUS
-EFIAPI
-FvbGetBlockSize (
- IN CONST
[edk2-devel] [edk2-platforms][PATCH V3 02/17] Platform/ARM/NorFlashDxe: Move NorFlashVirtualNotifyEvent
From: sahil
Moving this function from NorFlash.c to NorFlashDxe.c as it is not
dependent on any particular flash implementation.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlash.h| 14 +++
Platform/ARM/Drivers/NorFlashDxe/NorFlash.c| 44
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c | 44
3 files changed, 51 insertions(+), 51 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index c83032e87d9c..d4d97bd22cc5 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -342,6 +342,13 @@ NorFlashFvbInitialize (
IN NOR_FLASH_INSTANCE *Instance
);
+VOID
+EFIAPI
+NorFlashVirtualNotifyEvent (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ );
+
//
// NorFlash.c
//
@@ -412,11 +419,4 @@ NorFlashWriteSingleWord (
IN UINT32 WriteData
);
-VOID
-EFIAPI
-NorFlashVirtualNotifyEvent (
- IN EFI_EVENT Event,
- IN VOID *Context
- );
-
#endif /* __NOR_FLASH_H__ */
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 60854ef2a7d0..55f6abd0eef3 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -816,47 +816,3 @@ NorFlashReset (
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
return EFI_SUCCESS;
}
-
-/**
- Fixup internal data so that EFI can be call in virtual mode.
- Call the passed in Child Notify event and convert any pointers in
- lib to virtual mode.
-
- @param[in]Event The Event that is being processed
- @param[in]Context Event Context
-**/
-VOID
-EFIAPI
-NorFlashVirtualNotifyEvent (
- IN EFI_EVENT Event,
- IN VOID *Context
- )
-{
- UINTN Index;
-
- for (Index = 0; Index < mNorFlashDeviceCount; Index++) {
-EfiConvertPointer (0x0, (VOID
**)[Index]->DeviceBaseAddress);
-EfiConvertPointer (0x0, (VOID
**)[Index]->RegionBaseAddress);
-
-// Convert BlockIo protocol
-EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.FlushBlocks);
-EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.ReadBlocks);
-EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.Reset);
-EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.WriteBlocks);
-
-// Convert Fvb
-EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.EraseBlocks);
-EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.GetAttributes);
-EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.GetBlockSize);
-EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.GetPhysicalAddress);
-EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.Read);
-EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.SetAttributes);
-EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.Write);
-
-if (mNorFlashInstances[Index]->ShadowBuffer != NULL) {
- EfiConvertPointer (0x0, (VOID
**)[Index]->ShadowBuffer);
-}
- }
-
- return;
-}
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
index f7b92de21a57..963af7dcf435 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -504,3 +504,47 @@ NorFlashFvbInitialize (
return Status;
}
+
+/**
+ Fixup internal data so that EFI can be call in virtual mode.
+ Call the passed in Child Notify event and convert any pointers in
+ lib to virtual mode.
+
+ @param[in]Event The Event that is being processed
+ @param[in]Context Event Context
+**/
+VOID
+EFIAPI
+NorFlashVirtualNotifyEvent (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ UINTN Index;
+
+ for (Index = 0; Index < mNorFlashDeviceCount; Index++) {
+EfiConvertPointer (0x0, (VOID
**)[Index]->DeviceBaseAddress);
+EfiConvertPointer (0x0, (VOID
**)[Index]->RegionBaseAddress);
+
+// Convert BlockIo protocol
+EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.FlushBlocks);
+EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.ReadBlocks);
+EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.Reset);
+EfiConvertPointer (0x0, (VOID
**)[Index]->BlockIoProtocol.WriteBlocks);
+
+// Convert Fvb
+EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.EraseBlocks);
+EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.GetAttributes);
+EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.GetBlockSize);
+EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.GetPhysicalAddress);
+EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.Read);
+EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.SetAttributes);
+EfiConvertPointer (0x0, (VOID
**)[Index]->FvbProtocol.Write);
+
+if (mNorFlashInstances[Index]->ShadowBuffer != NULL) {
+ EfiConvertPointer (0x0, (VOID
[edk2-devel] [edk2-platforms][PATCH V3 01/17] Platform/ARM/NorFlashDxe: Move DiskIo related functions out of NorFlash.c
From: sahil
Moving these functions from NorFlash.c to NorFlashBlockIoDxe.c as
they are not dependent on any particular flash implementation.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 129
Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c | 129
2 files changed, 129 insertions(+), 129 deletions(-)
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 1b431073ee93..60854ef2a7d0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -807,135 +807,6 @@ NorFlashWriteSingleBlock (
return EFI_SUCCESS;
}
-/*
- Although DiskIoDxe will automatically install the DiskIO protocol whenever
- we install the BlockIO protocol, its implementation is sub-optimal as it
reads
- and writes entire blocks using the BlockIO protocol. In fact we can access
- NOR flash with a finer granularity than that, so we can improve performance
- by directly producing the DiskIO protocol.
-*/
-
-/**
- Read BufferSize bytes from Offset into Buffer.
-
- @param This Protocol instance pointer.
- @param MediaId Id of the media, changes every time the media
is replaced.
- @param OffsetThe starting byte offset to read from
- @param BufferSizeSize of Buffer
- @param BufferBuffer containing read data
-
- @retval EFI_SUCCESS The data was read correctly from the device.
- @retval EFI_DEVICE_ERROR The device reported an error while performing
the read.
- @retval EFI_NO_MEDIA There is no media in the device.
- @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.
- @retval EFI_INVALID_PARAMETER The read request contains device addresses
that are not
-valid for the device.
-
-**/
-EFI_STATUS
-EFIAPI
-NorFlashDiskIoReadDisk (
- IN EFI_DISK_IO_PROTOCOL *This,
- IN UINT32MediaId,
- IN UINT64DiskOffset,
- IN UINTN BufferSize,
- OUT VOID *Buffer
- )
-{
- NOR_FLASH_INSTANCE *Instance;
- UINT32 BlockSize;
- UINT32 BlockOffset;
- EFI_LBA Lba;
-
- Instance = INSTANCE_FROM_DISKIO_THIS (This);
-
- if (MediaId != Instance->Media.MediaId) {
-return EFI_MEDIA_CHANGED;
- }
-
- BlockSize = Instance->Media.BlockSize;
- Lba = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize,
);
-
- return NorFlashRead (Instance, Lba, BlockOffset, BufferSize, Buffer);
-}
-
-/**
- Writes a specified number of bytes to a device.
-
- @param This Indicates a pointer to the calling context.
- @param MediaIdID of the medium to be written.
- @param Offset The starting byte offset on the logical block I/O device
to write.
- @param BufferSize The size in bytes of Buffer. The number of bytes to write
to the device.
- @param Buffer A pointer to the buffer containing the data to be written.
-
- @retval EFI_SUCCESS The data was written correctly to the device.
- @retval EFI_WRITE_PROTECTED The device can not be written to.
- @retval EFI_DEVICE_ERROR The device reported an error while performing
the write.
- @retval EFI_NO_MEDIA There is no media in the device.
- @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.
- @retval EFI_INVALID_PARAMETER The write request contains device addresses
that are not
- valid for the device.
-
-**/
-EFI_STATUS
-EFIAPI
-NorFlashDiskIoWriteDisk (
- IN EFI_DISK_IO_PROTOCOL *This,
- IN UINT32MediaId,
- IN UINT64DiskOffset,
- IN UINTN BufferSize,
- IN VOID *Buffer
- )
-{
- NOR_FLASH_INSTANCE *Instance;
- UINT32 BlockSize;
- UINT32 BlockOffset;
- EFI_LBA Lba;
- UINTN RemainingBytes;
- UINTN WriteSize;
- EFI_STATUS Status;
-
- Instance = INSTANCE_FROM_DISKIO_THIS (This);
-
- if (MediaId != Instance->Media.MediaId) {
-return EFI_MEDIA_CHANGED;
- }
-
- BlockSize = Instance->Media.BlockSize;
- Lba = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize,
);
-
- RemainingBytes = BufferSize;
-
- // Write either all the remaining bytes, or the number of bytes that bring
- // us up to a block boundary, whichever is less.
- // (DiskOffset | (BlockSize - 1)) + 1) rounds DiskOffset up to the next
- // block boundary (even if it is already on one).
- WriteSize = MIN (RemainingBytes, ((DiskOffset | (BlockSize - 1)) + 1) -
DiskOffset);
-
- do {
-if (WriteSize == BlockSize) {
- // Write a full block
- Status = NorFlashWriteFullBlock (Instance, Lba, Buffer, BlockSize /
sizeof (UINT32));
-} else {
- // Write a partial block
- Status = NorFlashWriteSingleBlock
[edk2-devel] [edk2-platforms][PATCH V3 00/17] Split NorFlashDxe driver and add CadenceQspiNorFlashDeviceLib library
From: sahil This patch series adds the following changes: 1. Splits the NorFlashDxe driver to introduce a NorFlashDeviceLib that implements the specifics for the respective flash. This will allow us to plug different libraries implementing functionality of various NOR Flash. The flash specific code in NorFlashDxe has been moved to P30NorFlashDeviceLib library. 2. Adds support for CadenceQspiNorFlashDeviceLib which is used by N1Sdp platform along with NorFlashDxe driver. N1Sdp uses an emulated variable storage on DDR memory for the variable storage. But this emulated variable storage is a volatile memory and so the values of variables can't persist on next reboot or in power cycle. In N1Sdp platform, the SoC is connected to IOFPGA which has a Cadence Quad SPI (QSPI) controller. This QSPI controller manages the flash chip device via QSPI bus. With these changes we use this NOR flash device for persistent variable storage. 3. Fixes memory leak in NorFlashCreateInstance() function. v3: - Fixed code review comments - Added 3 new patches for the following: - Fix memory leak in NorFlashCreateInstance() - Make local functions STATIC in NorFlashDxe - Remove unimplemented functions from NorFlash.h v2: - Fixed code review comments - Split the NorFlashDxe driver and moved flash specific code to P30NorFlashDeviceLib - Added NOR flash Dxe Driver for N1Sdp as a library instead of a driver Link to branch with the patches in this series - https://github.com/sah01Kaushal/edk2-platforms/tree/n1sdp_persistent_storage_v3 Links to v2: https://edk2.groups.io/g/devel/topic/105690949 https://edk2.groups.io/g/devel/topic/105690948 https://edk2.groups.io/g/devel/topic/105690947 https://edk2.groups.io/g/devel/topic/105690946 https://edk2.groups.io/g/devel/topic/105690945 https://edk2.groups.io/g/devel/topic/105690944 https://edk2.groups.io/g/devel/topic/105690943 https://edk2.groups.io/g/devel/topic/105690942 https://edk2.groups.io/g/devel/topic/105690941 https://edk2.groups.io/g/devel/topic/105690940 https://edk2.groups.io/g/devel/topic/105690939 https://edk2.groups.io/g/devel/topic/105690938 https://edk2.groups.io/g/devel/topic/105690937 https://edk2.groups.io/g/devel/topic/105690936 https://edk2.groups.io/g/devel/topic/105690935 https://github.com/sah01Kaushal/edk2-platforms/tree/n1sdp_persistent_storage_v2 Links to v1: https://edk2.groups.io/g/devel/topic/102625035 https://edk2.groups.io/g/devel/topic/102625033 https://edk2.groups.io/g/devel/topic/102625034 https://edk2.groups.io/g/devel/topic/102625036 https://edk2.groups.io/g/devel/topic/102625037 https://edk2.groups.io/g/devel/topic/102625038 sahil (17): Platform/ARM/NorFlashDxe: Move DiskIo related functions out of NorFlash.c Platform/ARM/NorFlashDxe: Move NorFlashVirtualNotifyEvent Platform/ARM/NorFlashDxe: Add NorFlashCommon.h header file Platform/ARM/NorFlashDxe: Move flash specific functions to NorFlash.c Platform/ARM/NorFlashDxe: Remove unimplemented functions from NorFlash.h Platform/ARM/NorFlashDxe: Make local functions STATIC Platform/ARM: Create NorFlashDeviceLib library interface for flash specific functions Platform/ARM: Add P30NorFlashDeviceLib Library Platform/ARM/NorFlashDxe: Switch from NorFlash.c to NorFlashDeviceLib Platform/ARM: Add HostControllerBaseAddress variable Platform/ARM/NorFlashDxe: Fix memory leak in NorFlashCreateInstance() Platform/ARM: Add optional provision to fetch and print NOR Flash info Silicon/ARM/NeoverseN1Soc: Enable SCP QSPI flash region Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe Platform/ARM/N1Sdp: Persistent storage for N1Sdp Platform/ARM/N1Sdp: Enable FaultTolerantWrite Dxe driver for N1Sdp Platform/ARM/ARM.dec |4 + Platform/ARM/SgiPkg/SgiPlatform.dsc.inc |3 + Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc |3 + Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc |3 + Platform/ARM/JunoPkg/ArmJuno.dsc |3 + Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 24 +- Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc |3 + Platform/ARM/N1Sdp/N1SdpPlatform.fdf |3 + Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf |8 +- Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf |8 +-
Re: [edk2-devel] [edk2-platforms][PATCH 2/3] Platform/AMD: Update Readme.md
[AMD Official Use Only - AMD Internal Distribution Only] Thanks Abner for the up-stream. Looks good to me. -Original Message- From: Chang, Abner Sent: Thursday, May 23, 2024 12:12 PM To: devel@edk2.groups.io Cc: Grimes, Paul ; Attar, AbdulLateef (Abdul Lateef) ; Fu, Igniculus ; Yao, Ken ; Xing, Eric ; Zhai, MingXin (Duke) Subject: [edk2-platforms][PATCH 2/3] Platform/AMD: Update Readme.md From: Abner Chang Cc: Paul Grimes Cc: Abdul Lateef Attar Cc: Igniculus Fu Cc: Ken Yao Cc: Eric Xing Cc: Duke Zhai Signed-off-by: Abner Chang --- Platform/AMD/Readme.md | 64 -- 1 file changed, 49 insertions(+), 15 deletions(-) diff --git a/Platform/AMD/Readme.md b/Platform/AMD/Readme.md index 99d2b990c7..3297c6ba59 100644 --- a/Platform/AMD/Readme.md +++ b/Platform/AMD/Readme.md @@ -7,18 +7,25 @@ booting certain AMD platforms. The definition of sub-folders is described in bel ## Term and Definitions +* **AGESA** + + AMD Generic Encapsulated Software Architecture that are executed as + part of a host platform BIOS. + * **AMD Platform** (platform in short) - AMD platform refers to a platform that supports the particular AMD SoC (processor), such as AMD EPYC Milan and Genoa processors. + AMD platform refers to a platform that supports the particular AMD + SoC (processor), such as AMD EPYC Milan and Genoa processors. * **AMD Board** (board in short) AMD board is a generic terminology refers to a board that is designed based on a specific AMD SoC architecture (also referred as AMD platform). More than one boards - are possibly designed to support an AMD platform with different configuration, such as 1-processor socket or 2-processor sockets board. + are possibly designed to support an AMD platform with different + configuration, such as 1-processor socket or 2-processor sockets board. * **AMD edk2 Platform Package** (platform package in short) - + The folder has the AMD edk2 platform common modules. * **AMD edk2 Board Package** (board package in short) @@ -28,29 +35,52 @@ booting certain AMD platforms. The definition of sub-folders is described in bel ## Package Definition +* **AgesaModulePkg** + + This package contains all of the private interfaces and build + configuration files for the AGESA support. + +* **AgesaPkg** + + This package contains all of the public interfaces and build + configuration files for the AGESA support. + +* **AmdCbsPkg** + + AMD Configurable BIOS Setting. Provides the edk2 formset following + the UEFI HII spec to configure BIOS settings. + +* **AmdCpmPkg** + + AMD Common Platform Module software is a BIOS procedure library + designed to aid AMD customers to quickly implement AMD platform technology into their products. + * **AmdPlatformPkg** - AMD platform edk2 package under this folder provides the common edk2 modules those - are leverage by platforms. Usually those modules have no dependencies with - particular platforms. The module under this scope can provides a common implementation - for all platforms, or it may just provide a framework but the differences of implementation could be configured through the PCDs declared in AmdPlatformPkg.dec, or - the board level library provided in the \Pkg. + AMD platform edk2 package under this folder provides the common edk2 + modules that are leveraged by platforms. Usually those modules have no + dependencies with particular platforms. Modules under this scope can + provide a common implementation for all platforms, or may just + provide a framework but the differences of implementation could be + configured through the PCDs declared in AmdPlatformPkg.dec, or the board level library provided in the \Pkg. * **AmdMinBoardPkg** - This package provides the common edk2 modules those can be leverage across AMD boards those use MinPlatformPkg framework. + This package provides the common edk2 modules that can be leveraged + across AMD boards using the MinPlatform framework. * **\Board** - This is the folder named by SoC and accommodate one or multiple board packages those - are designed base on the same SoC platform. Board folder may contain edk2 - package meta files directly or the sub-folders named by \Pkg for a - variety configurations of a platform. + This is the folder named by SoC and accommodates one or multiple + board packages that are designed based on the same SoC platform. Board folder may contain edk2 package meta files directly or the + sub-folders named by \Pkg for a variety configurations of a platform. * **Pkg** - This is the folder that contains edk2 package meta files for a board which is designed base on a platform. Besides the edk2 meta files, Pkg may also provides - edk2 modules which are specifically to a board. + This is the folder that contains edk2 package meta files for a board + which is designed base on a platform. Besides the edk2 meta files, + Pkg may also provides edk2
Re: [edk2-devel] [edk2-platforms][PATCH 2/3] Platform/AMD: Update Readme.md
[AMD Official Use Only - AMD Internal Distribution Only] Thanks Abner for the up-stream. Looks good to me. Reviewed-by: Eric Xing > -Original Message- > From: Chang, Abner > Sent: Thursday, May 23, 2024 12:12 PM > To: devel@edk2.groups.io > Cc: Grimes, Paul ; Attar, AbdulLateef (Abdul Lateef) > ; Fu, Igniculus ; Yao, > Ken ; Xing, Eric ; Zhai, MingXin > (Duke) > Subject: [edk2-platforms][PATCH 2/3] Platform/AMD: Update Readme.md > > From: Abner Chang > > Cc: Paul Grimes > Cc: Abdul Lateef Attar > Cc: Igniculus Fu > Cc: Ken Yao > Cc: Eric Xing > Cc: Duke Zhai > Signed-off-by: Abner Chang > --- > Platform/AMD/Readme.md | 64 > -- > 1 file changed, 49 insertions(+), 15 deletions(-) > > diff --git a/Platform/AMD/Readme.md b/Platform/AMD/Readme.md index > 99d2b990c7..3297c6ba59 100644 > --- a/Platform/AMD/Readme.md > +++ b/Platform/AMD/Readme.md > @@ -7,18 +7,25 @@ booting certain AMD platforms. The definition of sub- > folders is described in bel > > ## Term and Definitions > > +* **AGESA** > + > + AMD Generic Encapsulated Software Architecture that are executed as > + part of a host platform BIOS. > + > * **AMD Platform** (platform in short) > > - AMD platform refers to a platform that supports the particular AMD SoC > (processor), such as AMD EPYC Milan and Genoa processors. > + AMD platform refers to a platform that supports the particular AMD > + SoC (processor), such as AMD EPYC Milan and Genoa processors. > > * **AMD Board** (board in short) > >AMD board is a generic terminology refers to a board that is designed based > on a >specific AMD SoC architecture (also referred as AMD platform). More than > one boards > - are possibly designed to support an AMD platform with different > configuration, such as 1-processor socket or 2-processor sockets board. > + are possibly designed to support an AMD platform with different > + configuration, such as 1-processor socket or 2-processor sockets board. > > * **AMD edk2 Platform Package** (platform package in short) > - > + >The folder has the AMD edk2 platform common modules. > > * **AMD edk2 Board Package** (board package in short) @@ -28,29 +35,52 > @@ booting certain AMD platforms. The definition of sub-folders is described > in bel > > ## Package Definition > > +* **AgesaModulePkg** > + > + This package contains all of the private interfaces and build > + configuration files for the AGESA support. > + > +* **AgesaPkg** > + > + This package contains all of the public interfaces and build > + configuration files for the AGESA support. > + > +* **AmdCbsPkg** > + > + AMD Configurable BIOS Setting. Provides the edk2 formset following > + the UEFI HII spec to configure BIOS settings. > + > +* **AmdCpmPkg** > + > + AMD Common Platform Module software is a BIOS procedure library > + designed to aid AMD customers to quickly implement AMD platform > technology into their products. > + > * **AmdPlatformPkg** > > - AMD platform edk2 package under this folder provides the common edk2 > modules those > - are leverage by platforms. Usually those modules have no dependencies > with > - particular platforms. The module under this scope can provides a common > implementation > - for all platforms, or it may just provide a framework but the differences > of > implementation could be configured through the PCDs declared in > AmdPlatformPkg.dec, or > - the board level library provided in the \Pkg. > + AMD platform edk2 package under this folder provides the common edk2 > + modules that are leveraged by platforms. Usually those modules have no > + dependencies with particular platforms. Modules under this scope can > + provide a common implementation for all platforms, or may just > + provide a framework but the differences of implementation could be > + configured through the PCDs declared in AmdPlatformPkg.dec, or the board > level library provided in the \Pkg. > > * **AmdMinBoardPkg** > > - This package provides the common edk2 modules those can be leverage > across AMD boards those use MinPlatformPkg framework. > + This package provides the common edk2 modules that can be leveraged > + across AMD boards using the MinPlatform framework. > > * **\Board** > > - This is the folder named by SoC and accommodate one or multiple board > packages those > - are designed base on the same SoC platform. Board folder may > contain edk2 > - package meta files directly or the sub-folders named by \Pkg > for a > - variety configurations of a platform. > + This is the folder named by SoC and accommodates one or multiple > + board packages that are designed based on the same SoC platform. + name>Board folder may contain edk2 package meta files directly or the > + sub-folders named by \Pkg for a variety configurations of a > platform. > > * **Pkg** > > - This is the folder that contains edk2 package meta files for a board which > is > designed base on a platform. Besides
[edk2-devel] [edk2-platforms][PATCH 2/3] Platform/AMD: Update Readme.md
From: Abner Chang Cc: Paul Grimes Cc: Abdul Lateef Attar Cc: Igniculus Fu Cc: Ken Yao Cc: Eric Xing Cc: Duke Zhai Signed-off-by: Abner Chang --- Platform/AMD/Readme.md | 64 -- 1 file changed, 49 insertions(+), 15 deletions(-) diff --git a/Platform/AMD/Readme.md b/Platform/AMD/Readme.md index 99d2b990c7..3297c6ba59 100644 --- a/Platform/AMD/Readme.md +++ b/Platform/AMD/Readme.md @@ -7,18 +7,25 @@ booting certain AMD platforms. The definition of sub-folders is described in bel ## Term and Definitions +* **AGESA** + + AMD Generic Encapsulated Software Architecture that are executed as part of a + host platform BIOS. + * **AMD Platform** (platform in short) - AMD platform refers to a platform that supports the particular AMD SoC (processor), such as AMD EPYC Milan and Genoa processors. + AMD platform refers to a platform that supports the particular AMD SoC (processor), such as + AMD EPYC Milan and Genoa processors. * **AMD Board** (board in short) AMD board is a generic terminology refers to a board that is designed based on a specific AMD SoC architecture (also referred as AMD platform). More than one boards - are possibly designed to support an AMD platform with different configuration, such as 1-processor socket or 2-processor sockets board. + are possibly designed to support an AMD platform with different configuration, such as + 1-processor socket or 2-processor sockets board. * **AMD edk2 Platform Package** (platform package in short) - + The folder has the AMD edk2 platform common modules. * **AMD edk2 Board Package** (board package in short) @@ -28,29 +35,52 @@ booting certain AMD platforms. The definition of sub-folders is described in bel ## Package Definition +* **AgesaModulePkg** + + This package contains all of the private interfaces and build configuration files for the + AGESA support. + +* **AgesaPkg** + + This package contains all of the public interfaces and build configuration files + for the AGESA support. + +* **AmdCbsPkg** + + AMD Configurable BIOS Setting. Provides the edk2 formset following the UEFI HII + spec to configure BIOS settings. + +* **AmdCpmPkg** + + AMD Common Platform Module software is a BIOS procedure library designed to aid + AMD customers to quickly implement AMD platform technology into their products. + * **AmdPlatformPkg** - AMD platform edk2 package under this folder provides the common edk2 modules those - are leverage by platforms. Usually those modules have no dependencies with - particular platforms. The module under this scope can provides a common implementation - for all platforms, or it may just provide a framework but the differences of implementation could be configured through the PCDs declared in AmdPlatformPkg.dec, or - the board level library provided in the \Pkg. + AMD platform edk2 package under this folder provides the common edk2 + modules that are leveraged by platforms. Usually those modules have no dependencies with + particular platforms. Modules under this scope can provide a common implementation + for all platforms, or may just provide a framework but the differences of implementation + could be configured through the PCDs declared in AmdPlatformPkg.dec, or the board level + library provided in the \Pkg. * **AmdMinBoardPkg** - This package provides the common edk2 modules those can be leverage across AMD boards those use MinPlatformPkg framework. + This package provides the common edk2 modules that can be leveraged across AMD boards using + the MinPlatform framework. * **\Board** - This is the folder named by SoC and accommodate one or multiple board packages those - are designed base on the same SoC platform. Board folder may contain edk2 - package meta files directly or the sub-folders named by \Pkg for a - variety configurations of a platform. + This is the folder named by SoC and accommodates one or multiple board packages + that are designed based on the same SoC platform. Board folder may + contain edk2 package meta files directly or the sub-folders named by \Pkg for + a variety configurations of a platform. * **Pkg** - This is the folder that contains edk2 package meta files for a board which is designed base on a platform. Besides the edk2 meta files, Pkg may also provides - edk2 modules which are specifically to a board. + This is the folder that contains edk2 package meta files for a board which is designed base + on a platform. Besides the edk2 meta files, Pkg may also provides edk2 modules + which are specifically to a board. ``` e.g. OverdriveBoard @@ -63,6 +93,10 @@ booting certain AMD platforms. The definition of sub-folders is described in bel ``` Platform/AMD +|AgesaModulePkg +|AgesaPkg +|AmdCbsPkg +|AmdCpmPkg |AmdPlatformPkg
[edk2-devel] [edk2-platforms][PATCH 3/3] edk2-platform/Maintainer: Add entries for AMD packages
From: Abner Chang Signed-off-by: Abner Chang Cc: Leif Lindholm Cc: Michael D Kinney --- Maintainers.txt | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/Maintainers.txt b/Maintainers.txt index 877620a1b0..af688c3813 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -86,8 +86,20 @@ M: Leif Lindholm AMD F: Platform/AMD M: Abner Chang -M: Abdul Lateef Attar +M: Abdul Lateef Attar +M: Paul Grimes + +F: Platform/AMD/AgesaModulePkg +F: Platform/AMD/AgesaPkg +F: Platform/AMD/AmdCbsPkg +M: Paul Grimes +R: Abdul Lateef Attar +R: Abner Chang + +F: Platform/AMD/AmdCpmPkg +M: Abdul Lateef Attar R: Paul Grimes +R: Abner Chang AMD Seattle F: Platform/AMD/OverdriveBoard/ -- 2.37.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119129): https://edk2.groups.io/g/devel/message/119129 Mute This Topic: https://groups.io/mt/106257081/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms RESEND] AmdPlatformPkg: Adds SmbiosCommonDxe driver
Adds SMBIOS common driver which generates various
tables for AMD platforms.
Cc: Paul Grimes
Reviewed-by: Abner Chang
Signed-off-by: Abdul Lateef Attar
---
.../AMD/AmdPlatformPkg/AmdPlatformPkg.dec | 61 +
.../AMD/AmdPlatformPkg/AmdPlatformPkg.dsc | 3 +-
.../SmbiosCommonDxe/DefaultLomDevicePath.c| 130 ++
.../Universal/SmbiosCommonDxe/SmbiosCommon.h | 210
.../SmbiosCommonDxe/SmbiosCommonDxe.inf | 76 ++
.../SmbiosCommonDxe/SmbiosCommonEntryPoint.c | 148 +++
.../Type11OemStringsFunction.c| 91 +++
.../Type12SystemCfgOptionsFunction.c | 90 +++
.../Type13BiosLanguageInfoFunction.c | 146 +++
.../Type38IpmiDeviceInformation.c | 70 ++
.../Type41OnboardDevExtInfoFunction.c | 237 ++
.../Type8PortConnectorInfoFunction.c | 133 ++
.../Type9SystemSlotInfoFunction.c | 94 +++
13 files changed, 1488 insertions(+), 1 deletion(-)
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/DefaultLomDevicePath.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/SmbiosCommon.h
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/SmbiosCommonDxe.inf
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/SmbiosCommonEntryPoint.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type11OemStringsFunction.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type12SystemCfgOptionsFunction.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type13BiosLanguageInfoFunction.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type38IpmiDeviceInformation.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type41OnboardDevExtInfoFunction.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type8PortConnectorInfoFunction.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type9SystemSlotInfoFunction.c
diff --git a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
index 83f57f6d0a..106820dc85 100644
--- a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
+++ b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
@@ -42,3 +42,64 @@
# 3 - BT
# 4 - SSIF
gAmdPlatformPkgTokenSpaceGuid.PcdIpmiInterfaceType|0|UINT8|0x00020001
+
+ #
+ # This PCD is mapped to AMD SMBIOS type 8 record structure
+ #
+ gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType8Number|0|UINT8|0x00020002
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType8|{0x0}|SMBIOS_PORT_CONNECTOR_RECORD_ARRAY|0x00020003
{
+
+Pcd/SmbiosPcd.h
+
+AmdPlatformPkg/AmdPlatformPkg.dec
+MdePkg/MdePkg.dec
+MdeModulePkg/MdeModulePkg.dec
+ }
+
+ #
+ # This PCD is mapped to AMD SMBIOS type 41 record structure
+ #
+ gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType41Number|0|UINT8|0x00020004
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType41|{0x0}|SMBIOS_ONBOARD_DEV_EXT_INFO_ARRAY|0x00020005
{
+
+Pcd/SmbiosPcd.h
+
+AmdPlatformPkg/AmdPlatformPkg.dec
+MdePkg/MdePkg.dec
+MdeModulePkg/MdeModulePkg.dec
+ }
+
+ #
+ # These PCDs are mapped to AMD SMBIOS type 9 record structure
+ #
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1|{0x0}|MISC_SLOT_CHARACTERISTICS1|0x00020009
{
+
+IndustryStandard/SmBios.h
+ }
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.CharacteristicsUnknown|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.Provides50Volts|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.Provides33Volts|1
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.SharedSlot|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.PcCard16Supported|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.CardBusSupported|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.ZoomVideoSupported|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.ModemRingResumeSupported|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics2|{0x0}|MISC_SLOT_CHARACTERISTICS2|0x0002000A
{
+
+IndustryStandard/SmBios.h
+ }
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics2.PmeSignalSupported|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics2.HotPlugDevicesSupported|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics2.SmbusSignalSupported|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics2.BifurcationSupported|1
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics2.AsyncSurpriseRemoval|0
+
Re: [edk2-devel] [edk2-platforms RESEND v2 3/5] AmdMinBoardPkg: Implement BoardInitLib for PEI phase
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Abner Chang
> -Original Message-
> From: Abdul Lateef Attar
> Sent: Monday, May 20, 2024 9:50 PM
> To: devel@edk2.groups.io
> Cc: Attar, AbdulLateef (Abdul Lateef) ; Chang,
> Abner ; Grimes, Paul
> Subject: [edk2-platforms RESEND v2 3/5] AmdMinBoardPkg: Implement
> BoardInitLib for PEI phase
>
> PeiBoardInitPreMemLib library provides board-specific
> initialization functions for the PEI phase.
>
> Cc: Abner Chang
> Cc: Paul Grimes
> Signed-off-by: Abdul Lateef Attar
> ---
> .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec | 8 +
> .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc | 5 +
> .../PeiBoardInitPreMemLib/AmdMemoryInfoHob.h | 50
> .../PeiBoardInitPreMemLib.c | 229 ++
> .../PeiBoardInitPreMemLib.inf | 45
> .../PeiBoardInitPreMemLib/PeiMemoryInit.c | 198 +++
> .../PeiBoardInitPreMemLib/PeiMemoryInit.h | 50
> 7 files changed, 585 insertions(+)
> create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMem
> oryInfoHob.h
> create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardI
> nitPreMemLib.c
> create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardI
> nitPreMemLib.inf
> create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemor
> yInit.c
> create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemor
> yInit.h
>
> diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> index 03d1d77c34..98768af210 100644
> --- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> +++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> @@ -19,6 +19,10 @@
>
> [Guids]
>gAmdMinBoardPkgTokenSpaceGuid = {0xd4d23d79, 0x73bf, 0x460a, {0xa1,
> 0xc7, 0x85, 0xa3, 0xca, 0x71, 0xb9, 0x4c}}
> + gAmdMemoryInfoHobGuid = { 0x1bce3d14, 0xa5fe, 0x4a0b, { 0x9a,
> 0x8d, 0x69, 0xca, 0x5d, 0x98, 0x38, 0xd3}}
> +
> +[Ppis]
> + gAmdMemoryInfoHobPpiGuid = { 0xba16e587, 0x1d66, 0x41b7, { 0x9b,
> 0x52, 0xca, 0x4f, 0x2c, 0xad, 0x0d, 0xc8}}
>
> [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
>#
> @@ -41,3 +45,7 @@
>gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecuritySize
> |0x|UINT32|0x1008
>gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecurityOffset
> |0x|UINT32|0x1009
>
> + # SMRAM size
> + # Holds the SMRAM area size, which is reserved for SMRAM operation
> + # default value 128MB
> + gAmdMinBoardPkgTokenSpaceGuid.PcdAmdSmramAreaSize
> |0x0800|UINT64|0x2100
> diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> index be33089a45..7e356a2a67 100644
> --- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> +++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> @@ -22,6 +22,9 @@
>MinPlatformPkg/MinPlatformPkg.dec
>UefiCpuPkg/UefiCpuPkg.dec
>
> +[PcdsDynamicDefault]
> + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize|0x1000
> +
> [LibraryClasses]
>SpcrDeviceLib|AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
>ReportFvLib|AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
> @@ -38,6 +41,7 @@
>
> [LibraryClasses.common.PEIM]
>
> SetCacheMtrrLib|AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLi
> b.inf
> +
> BoardInitLib|AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInit
> PreMemLib.inf
>
> [Components]
>AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
> @@ -45,6 +49,7 @@
> [Components.IA32]
>AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
>AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
> +
> AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.in
> f
>
> [Components.X64]
>AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> diff --git
> a/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMe
> moryInfoHob.h
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMe
> moryInfoHob.h
> new file mode 100644
> index 00..b596b3bdf3
> --- /dev/null
> +++
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMe
> moryInfoHob.h
> @@ -0,0 +1,50 @@
> +/** @file
> + Defines AMD memory info hob.
> +
> + Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved.
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef AMD_MEMORY_INFO_HOB_H_
> +#define AMD_MEMORY_INFO_HOB_H_
> +
> +#pragma pack (push, 1)
> +
> +/// Memory descriptor structure for each memory range
> +typedef struct {
> + UINT64Base; ///< Base address of memory rang
> + UINT64Size; ///< Size of memory rang
> + UINT32Attribute; ///< Attribute of memory rang
> + UINT32Reserved;
[edk2-devel] [edk2-platforms RESEND v2 3/5] AmdMinBoardPkg: Implement BoardInitLib for PEI phase
PeiBoardInitPreMemLib library provides board-specific
initialization functions for the PEI phase.
Cc: Abner Chang
Cc: Paul Grimes
Signed-off-by: Abdul Lateef Attar
---
.../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec | 8 +
.../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc | 5 +
.../PeiBoardInitPreMemLib/AmdMemoryInfoHob.h | 50
.../PeiBoardInitPreMemLib.c | 229 ++
.../PeiBoardInitPreMemLib.inf | 45
.../PeiBoardInitPreMemLib/PeiMemoryInit.c | 198 +++
.../PeiBoardInitPreMemLib/PeiMemoryInit.h | 50
7 files changed, 585 insertions(+)
create mode 100644
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMemoryInfoHob.h
create mode 100644
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.c
create mode 100644
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.inf
create mode 100644
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemoryInit.c
create mode 100644
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemoryInit.h
diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
index 03d1d77c34..98768af210 100644
--- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
+++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
@@ -19,6 +19,10 @@
[Guids]
gAmdMinBoardPkgTokenSpaceGuid = {0xd4d23d79, 0x73bf, 0x460a, {0xa1, 0xc7,
0x85, 0xa3, 0xca, 0x71, 0xb9, 0x4c}}
+ gAmdMemoryInfoHobGuid = { 0x1bce3d14, 0xa5fe, 0x4a0b, { 0x9a, 0x8d,
0x69, 0xca, 0x5d, 0x98, 0x38, 0xd3}}
+
+[Ppis]
+ gAmdMemoryInfoHobPpiGuid = { 0xba16e587, 0x1d66, 0x41b7, { 0x9b, 0x52,
0xca, 0x4f, 0x2c, 0xad, 0x0d, 0xc8}}
[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
#
@@ -41,3 +45,7 @@
gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecuritySize
|0x|UINT32|0x1008
gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecurityOffset
|0x|UINT32|0x1009
+ # SMRAM size
+ # Holds the SMRAM area size, which is reserved for SMRAM operation
+ # default value 128MB
+ gAmdMinBoardPkgTokenSpaceGuid.PcdAmdSmramAreaSize
|0x0800|UINT64|0x2100
diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
index be33089a45..7e356a2a67 100644
--- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
+++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
@@ -22,6 +22,9 @@
MinPlatformPkg/MinPlatformPkg.dec
UefiCpuPkg/UefiCpuPkg.dec
+[PcdsDynamicDefault]
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize|0x1000
+
[LibraryClasses]
SpcrDeviceLib|AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
ReportFvLib|AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
@@ -38,6 +41,7 @@
[LibraryClasses.common.PEIM]
SetCacheMtrrLib|AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
+
BoardInitLib|AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.inf
[Components]
AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
@@ -45,6 +49,7 @@
[Components.IA32]
AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
+ AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.inf
[Components.X64]
AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
diff --git
a/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMemoryInfoHob.h
b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMemoryInfoHob.h
new file mode 100644
index 00..b596b3bdf3
--- /dev/null
+++
b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMemoryInfoHob.h
@@ -0,0 +1,50 @@
+/** @file
+ Defines AMD memory info hob.
+
+ Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef AMD_MEMORY_INFO_HOB_H_
+#define AMD_MEMORY_INFO_HOB_H_
+
+#pragma pack (push, 1)
+
+/// Memory descriptor structure for each memory range
+typedef struct {
+ UINT64Base; ///< Base address of memory rang
+ UINT64Size; ///< Size of memory rang
+ UINT32Attribute; ///< Attribute of memory rang
+ UINT32Reserved; ///< For alignment purpose
+} AMD_MEMORY_RANGE_DESCRIPTOR;
+
+/// Memory info HOB structure
+typedef struct {
+ UINT32 Version; ///< Version of HOB
structure
+ BOOLEANReserved1;
+ UINT16 Reserved2;
+ BOOLEANReserved3;
+ UINT8 Reserved4;
+ BOOLEANReserved5;
+ UINT32 Reserved6;
+ UINT32 Reserved7;
+ UINT32 NumberOfDescriptor;///< Number of
Re: [edk2-devel] [edk2-platforms] AmdPlatformPkg: Adds SmbiosCommonDxe driver
[AMD Official Use Only - AMD Internal Distribution Only]
Already reviewed internally.
Reviewed-by: Abner Chang
> -Original Message-
> From: Abdul Lateef Attar
> Sent: Monday, May 20, 2024 6:24 PM
> To: devel@edk2.groups.io
> Cc: Attar, AbdulLateef (Abdul Lateef) ; Chang,
> Abner ; Grimes, Paul
> Subject: [edk2-platforms] AmdPlatformPkg: Adds SmbiosCommonDxe driver
>
> Adds SMBIOS common driver which generates various
> tables for AMD platforms.
>
> Cc: Abner Chang
> Cc: Paul Grimes
> Signed-off-by: Abdul Lateef Attar
> ---
> .../AMD/AmdPlatformPkg/AmdPlatformPkg.dec | 63 -
> .../AMD/AmdPlatformPkg/AmdPlatformPkg.dsc | 3 +-
> .../SmbiosCommonDxe/DefaultLomDevicePath.c| 130 ++
> .../Universal/SmbiosCommonDxe/SmbiosCommon.h | 210
>
> .../SmbiosCommonDxe/SmbiosCommonDxe.inf | 76 ++
> .../SmbiosCommonDxe/SmbiosCommonEntryPoint.c | 148 +++
> .../Type11OemStringsFunction.c| 91 +++
> .../Type12SystemCfgOptionsFunction.c | 90 +++
> .../Type13BiosLanguageInfoFunction.c | 146 +++
> .../Type38IpmiDeviceInformation.c | 70 ++
> .../Type41OnboardDevExtInfoFunction.c | 237 ++
> .../Type8PortConnectorInfoFunction.c | 133 ++
> .../Type9SystemSlotInfoFunction.c | 94 +++
> 13 files changed, 1489 insertions(+), 2 deletions(-)
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/DefaultLom
> DevicePath.c
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/SmbiosCom
> mon.h
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/SmbiosCom
> monDxe.inf
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/SmbiosCom
> monEntryPoint.c
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type11Oem
> StringsFunction.c
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type12Syste
> mCfgOptionsFunction.c
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type13BiosL
> anguageInfoFunction.c
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type38Ipmi
> DeviceInformation.c
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type41Onb
> oardDevExtInfoFunction.c
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type8PortC
> onnectorInfoFunction.c
> create mode 100644
> Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type9Syste
> mSlotInfoFunction.c
>
> diff --git a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
> b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
> index 83f57f6d0a..787dac4cca 100644
> --- a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
> +++ b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
> @@ -8,7 +8,7 @@
> #
> ##
>
> -[Defines]
> +[Defines]
>DEC_SPECIFICATION = 1.27
>PACKAGE_NAME = AmdPlatformPkg
>PACKAGE_GUID = 2CB1238B-18E2-4837-B714-9DAB2B30A3C2
> @@ -42,3 +42,64 @@
># 3 - BT
># 4 - SSIF
>
> gAmdPlatformPkgTokenSpaceGuid.PcdIpmiInterfaceType|0|UINT8|0x00020
> 001
> +
> + #
> + # This PCD is mapped to AMD SMBIOS type 8 record structure
> + #
> +
> gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType8Number|0|UINT8|0
> x00020002
> +
> gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType8|{0x0}|SMBIOS_PO
> RT_CONNECTOR_RECORD_ARRAY|0x00020003 {
> +
> +Pcd/SmbiosPcd.h
> +
> +AmdPlatformPkg/AmdPlatformPkg.dec
> +MdePkg/MdePkg.dec
> +MdeModulePkg/MdeModulePkg.dec
> + }
> +
> + #
> + # This PCD is mapped to AMD SMBIOS type 41 record structure
> + #
> +
> gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType41Number|0|UINT8|
> 0x00020004
> +
> gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType41|{0x0}|SMBIOS_O
> NBOARD_DEV_EXT_INFO_ARRAY|0x00020005 {
> +
> +Pcd/SmbiosPcd.h
> +
> +AmdPlatformPkg/AmdPlatformPkg.dec
> +MdePkg/MdePkg.dec
> +MdeModulePkg/MdeModulePkg.dec
> + }
> +
> + #
> + # These PCDs are mapped to AMD SMBIOS type 9 record structure
> + #
> +
> gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1|
> {0x0}|MISC_SLOT_CHARACTERISTICS1|0x00020009 {
> +
> +IndustryStandard/SmBios.h
> + }
> +
> gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.
> CharacteristicsUnknown|0
> +
> gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.
> Provides50Volts|0
> +
> gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.
> Provides33Volts|1
> +
> gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.
> SharedSlot|0
> +
> gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.
> PcCard16Supported|0
> +
> gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.
> CardBusSupported|0
> +
> gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.
> ZoomVideoSupported|0
> +
>
[edk2-devel] [edk2-platforms] AmdPlatformPkg: Adds SmbiosCommonDxe driver
Adds SMBIOS common driver which generates various
tables for AMD platforms.
Cc: Abner Chang
Cc: Paul Grimes
Signed-off-by: Abdul Lateef Attar
---
.../AMD/AmdPlatformPkg/AmdPlatformPkg.dec | 63 -
.../AMD/AmdPlatformPkg/AmdPlatformPkg.dsc | 3 +-
.../SmbiosCommonDxe/DefaultLomDevicePath.c| 130 ++
.../Universal/SmbiosCommonDxe/SmbiosCommon.h | 210
.../SmbiosCommonDxe/SmbiosCommonDxe.inf | 76 ++
.../SmbiosCommonDxe/SmbiosCommonEntryPoint.c | 148 +++
.../Type11OemStringsFunction.c| 91 +++
.../Type12SystemCfgOptionsFunction.c | 90 +++
.../Type13BiosLanguageInfoFunction.c | 146 +++
.../Type38IpmiDeviceInformation.c | 70 ++
.../Type41OnboardDevExtInfoFunction.c | 237 ++
.../Type8PortConnectorInfoFunction.c | 133 ++
.../Type9SystemSlotInfoFunction.c | 94 +++
13 files changed, 1489 insertions(+), 2 deletions(-)
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/DefaultLomDevicePath.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/SmbiosCommon.h
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/SmbiosCommonDxe.inf
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/SmbiosCommonEntryPoint.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type11OemStringsFunction.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type12SystemCfgOptionsFunction.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type13BiosLanguageInfoFunction.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type38IpmiDeviceInformation.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type41OnboardDevExtInfoFunction.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type8PortConnectorInfoFunction.c
create mode 100644
Platform/AMD/AmdPlatformPkg/Universal/SmbiosCommonDxe/Type9SystemSlotInfoFunction.c
diff --git a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
index 83f57f6d0a..787dac4cca 100644
--- a/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
+++ b/Platform/AMD/AmdPlatformPkg/AmdPlatformPkg.dec
@@ -8,7 +8,7 @@
#
##
-[Defines]
+[Defines]
DEC_SPECIFICATION = 1.27
PACKAGE_NAME = AmdPlatformPkg
PACKAGE_GUID = 2CB1238B-18E2-4837-B714-9DAB2B30A3C2
@@ -42,3 +42,64 @@
# 3 - BT
# 4 - SSIF
gAmdPlatformPkgTokenSpaceGuid.PcdIpmiInterfaceType|0|UINT8|0x00020001
+
+ #
+ # This PCD is mapped to AMD SMBIOS type 8 record structure
+ #
+ gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType8Number|0|UINT8|0x00020002
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType8|{0x0}|SMBIOS_PORT_CONNECTOR_RECORD_ARRAY|0x00020003
{
+
+Pcd/SmbiosPcd.h
+
+AmdPlatformPkg/AmdPlatformPkg.dec
+MdePkg/MdePkg.dec
+MdeModulePkg/MdeModulePkg.dec
+ }
+
+ #
+ # This PCD is mapped to AMD SMBIOS type 41 record structure
+ #
+ gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType41Number|0|UINT8|0x00020004
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType41|{0x0}|SMBIOS_ONBOARD_DEV_EXT_INFO_ARRAY|0x00020005
{
+
+Pcd/SmbiosPcd.h
+
+AmdPlatformPkg/AmdPlatformPkg.dec
+MdePkg/MdePkg.dec
+MdeModulePkg/MdeModulePkg.dec
+ }
+
+ #
+ # These PCDs are mapped to AMD SMBIOS type 9 record structure
+ #
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1|{0x0}|MISC_SLOT_CHARACTERISTICS1|0x00020009
{
+
+IndustryStandard/SmBios.h
+ }
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.CharacteristicsUnknown|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.Provides50Volts|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.Provides33Volts|1
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.SharedSlot|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.PcCard16Supported|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.CardBusSupported|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.ZoomVideoSupported|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics1.ModemRingResumeSupported|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics2|{0x0}|MISC_SLOT_CHARACTERISTICS2|0x0002000A
{
+
+IndustryStandard/SmBios.h
+ }
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics2.PmeSignalSupported|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics2.HotPlugDevicesSupported|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics2.SmbusSignalSupported|0
+
gAmdPlatformPkgTokenSpaceGuid.PcdAmdSmbiosType9SlotCharacteristics2.BifurcationSupported|1
+
[edk2-devel] [edk2-platforms PATCH v2 3/5] AmdMinBoardPkg: Implement BoardInitLib for PEI phase
PeiBoardInitPreMemLib library provides board-specific
initialization functions for the PEI phase.
Cc: Abner Chang
Cc: Paul Grimes
Signed-off-by: Abdul Lateef Attar
---
.../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec | 8 +
.../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc | 5 +
.../PeiBoardInitPreMemLib/AmdMemoryInfoHob.h | 50
.../PeiBoardInitPreMemLib.c | 229 ++
.../PeiBoardInitPreMemLib.inf | 45
.../PeiBoardInitPreMemLib/PeiMemoryInit.c | 198 +++
.../PeiBoardInitPreMemLib/PeiMemoryInit.h | 50
7 files changed, 585 insertions(+)
create mode 100644
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMemoryInfoHob.h
create mode 100644
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.c
create mode 100644
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.inf
create mode 100644
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemoryInit.c
create mode 100644
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemoryInit.h
diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
index 03d1d77c34..98768af210 100644
--- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
+++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
@@ -19,6 +19,10 @@
[Guids]
gAmdMinBoardPkgTokenSpaceGuid = {0xd4d23d79, 0x73bf, 0x460a, {0xa1, 0xc7,
0x85, 0xa3, 0xca, 0x71, 0xb9, 0x4c}}
+ gAmdMemoryInfoHobGuid = { 0x1bce3d14, 0xa5fe, 0x4a0b, { 0x9a, 0x8d,
0x69, 0xca, 0x5d, 0x98, 0x38, 0xd3}}
+
+[Ppis]
+ gAmdMemoryInfoHobPpiGuid = { 0xba16e587, 0x1d66, 0x41b7, { 0x9b, 0x52,
0xca, 0x4f, 0x2c, 0xad, 0x0d, 0xc8}}
[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
#
@@ -41,3 +45,7 @@
gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecuritySize
|0x|UINT32|0x1008
gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecurityOffset
|0x|UINT32|0x1009
+ # SMRAM size
+ # Holds the SMRAM area size, which is reserved for SMRAM operation
+ # default value 128MB
+ gAmdMinBoardPkgTokenSpaceGuid.PcdAmdSmramAreaSize
|0x0800|UINT64|0x2100
diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
index be33089a45..7e356a2a67 100644
--- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
+++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
@@ -22,6 +22,9 @@
MinPlatformPkg/MinPlatformPkg.dec
UefiCpuPkg/UefiCpuPkg.dec
+[PcdsDynamicDefault]
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize|0x1000
+
[LibraryClasses]
SpcrDeviceLib|AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
ReportFvLib|AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
@@ -38,6 +41,7 @@
[LibraryClasses.common.PEIM]
SetCacheMtrrLib|AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
+
BoardInitLib|AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.inf
[Components]
AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
@@ -45,6 +49,7 @@
[Components.IA32]
AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
+ AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.inf
[Components.X64]
AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
diff --git
a/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMemoryInfoHob.h
b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMemoryInfoHob.h
new file mode 100644
index 00..b596b3bdf3
--- /dev/null
+++
b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMemoryInfoHob.h
@@ -0,0 +1,50 @@
+/** @file
+ Defines AMD memory info hob.
+
+ Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef AMD_MEMORY_INFO_HOB_H_
+#define AMD_MEMORY_INFO_HOB_H_
+
+#pragma pack (push, 1)
+
+/// Memory descriptor structure for each memory range
+typedef struct {
+ UINT64Base; ///< Base address of memory rang
+ UINT64Size; ///< Size of memory rang
+ UINT32Attribute; ///< Attribute of memory rang
+ UINT32Reserved; ///< For alignment purpose
+} AMD_MEMORY_RANGE_DESCRIPTOR;
+
+/// Memory info HOB structure
+typedef struct {
+ UINT32 Version; ///< Version of HOB
structure
+ BOOLEANReserved1;
+ UINT16 Reserved2;
+ BOOLEANReserved3;
+ UINT8 Reserved4;
+ BOOLEANReserved5;
+ UINT32 Reserved6;
+ UINT32 Reserved7;
+ UINT32 NumberOfDescriptor;///< Number of
[edk2-devel] [edk2-platforms PATCH v2 0/5] Adds AMD board independent drivers/modules
PR: https://github.com/tianocore/edk2-platforms/pull/144 V2 delta changes: Updated the "AmdMinBoardPkg: Implement BoardInitLib for PEI phase" PATCH with correct .dec and .dsc file. Cc: Paul Grimes Cc: Abner Chang Abdul Lateef Attar (5): AmdMinBoardPkg: Uncrustify PciHotPlug module AmdMinBoardPkg/Library: Uncrustify the Library module AmdMinBoardPkg: Implement BoardInitLib for PEI phase AmdMinBoardPkg: Implement BoardInitLib for DXE phase AmdMinBoardPkg: Implements BoardBdsHookLib library .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec | 18 + .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc | 13 +- .../Include/Library/AmdBoardBdsHookLib.h | 130 ++ .../Library/BoardBdsHookLib/BoardBdsHook.h| 242 +++ .../Library/BoardBdsHookLib/BoardBdsHookLib.c | 1712 + .../BoardBdsHookLib/BoardBdsHookLib.inf | 105 + .../Library/BoardBdsHookLib/BoardBootOption.c | 754 .../Library/BoardBdsHookLib/BoardMemoryTest.c | 83 + .../Library/DxeBoardInitLib/DxeBoardInitLib.c | 253 +++ .../DxeBoardInitLib/DxeBoardInitLib.inf | 51 + .../DxeBoardInitLib/DxeBoardInitLibInternal.c | 306 +++ .../DxeBoardInitLib/DxeBoardInitLibInternal.h | 159 ++ .../DxeBoardInitLib/MadtAcpiTablePatch.c | 243 +++ .../PeiBoardInitPreMemLib/AmdMemoryInfoHob.h | 50 + .../PeiBoardInitPreMemLib.c | 229 +++ .../PeiBoardInitPreMemLib.inf | 45 + .../PeiBoardInitPreMemLib/PeiMemoryInit.c | 198 ++ .../PeiBoardInitPreMemLib/PeiMemoryInit.h | 50 + .../Library/PeiReportFvLib/PeiReportFvLib.c | 12 +- .../Library/SetCacheMtrrLib/SetCacheMtrrLib.c |3 +- .../PciHotPlug/PciHotPlugInit.c |4 +- .../PciHotPlug/PciHotPlugInit.inf |5 +- 22 files changed, 4658 insertions(+), 7 deletions(-) create mode 100644 Platform/AMD/AmdMinBoardPkg/Include/Library/AmdBoardBdsHookLib.h create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBdsHook.h create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLib.c create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLib.inf create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBootOption.c create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardMemoryTest.c create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLib.c create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLib.inf create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLibInternal.c create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLibInternal.h create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/MadtAcpiTablePatch.c create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMemoryInfoHob.h create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.c create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.inf create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemoryInit.c create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemoryInit.h -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119078): https://edk2.groups.io/g/devel/message/119078 Mute This Topic: https://groups.io/mt/106200188/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-libc Patch 1/1] edk2-libc: Add cpuid_ex API to execute CPUID instructions on specific CPU
Changes looks good.
Reviewed-by: Jayaprakash N
Regards,
JP
-Original Message-
From: R, Vishal
Sent: Friday, May 17, 2024 12:08 PM
To: devel@edk2.groups.io
Cc: R, Vishal ; Rebecca Cran ; Kinney,
Michael D ; Jayaprakash, N
Subject: [edk2-libc Patch 1/1] edk2-libc: Add cpuid_ex API to execute CPUID
instructions on specific CPU
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4749
This commit adds cpuid_ex function to edk2module to provide capability to
execute cpuid instruction on specific cpu.
This feature was requested via BZ 4749
Cc: Rebecca Cran
Cc: Michael D Kinney
Cc: Jayaprakash N
Signed-off-by: Vishal R
---
.../PyMod-3.6.8/Modules/edk2module.c | 93 +++
1 file changed, 93 insertions(+)
diff --git
a/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/edk2module.c
b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/edk2module.c
index 163fc7f..d419428 100644
--- a/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/edk2module.c
+++ b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/edk2mo
+++ dule.c
@@ -45,6 +45,15 @@ typedef struct {
UINT64 data; // data, to be filled by the AP function }
AP_FUNCTION_MSR_ARGS;
+typedef struct {
+UINT32 eax; // eax value
+UINT32 ecx; // ecx value
+UINT32 rax_value; // retrun value for eax
+UINT32 rbx_value; // return value for ebx
+UINT32 rcx_value; // retrun value for ecx
+UINT32 rdx_value; // return value for edx
+} AP_FUNCTION_CPUID_ARGS;
+
#define AP_FUNCTION_EXECUTION_TIMEOUT 500 // setting the max time out
value to be 5 seconds
extern void _swsmi( unsigned int smi_code_data, unsigned int rax_value,
unsigned int rbx_value, unsigned int rcx_value, unsigned int rdx_value,
unsigned int rsi_value, unsigned int rdi_value ); @@ -223,6 +232,13 @@ VOID
EFIAPI MSRWriteToRunOnAP(IN VOID *context)
AsmWriteMsr64(msr, data);
}
+// CPUID execution function to run on specific cpu core using
+MPServices Protocol VOID EFIAPI CPUIDToRunOnAP(IN VOID *context) {
+AP_FUNCTION_CPUID_ARGS *args = (AP_FUNCTION_CPUID_ARGS *)context;
+AsmCpuidEx( args->eax, args->ecx, >rax_value,
+>rbx_value, >rcx_value, >rdx_value); }
+
#ifndef UEFI_C_SOURCE
/* Return a dictionary corresponding to the POSIX environment table */ extern
char **environ; @@ -4153,6 +4169,82 @@ edk2_cpuid(PyObject *self, PyObject
*args)
return Py_BuildValue("())", (unsigned long)rax_value, (unsigned
long)rbx_value, (unsigned long)rcx_value, (unsigned long)rdx_value); }
+PyDoc_STRVAR(efi_cpuid_ex__doc__,
+"cpuid_ex(cpu, eax, ecx) -> (eax:ebx:ecx:edx)\n\ Read the CPUID from a
+specific cpu.";);
+
+static PyObject *
+edk2_cpuid_ex(PyObject *self, PyObject *args) {
+UINT32 cpu, eax, ecx, rax_value, rbx_value, rcx_value, rdx_value;
+BOOLEAN is_function_finished = FALSE;
+EFI_STATUS status = 0;
+AP_FUNCTION_CPUID_ARGS cpuid_args = {0};
+
+if (!PyArg_ParseTuple(args, "III", , , ))
+return NULL;
+Py_BEGIN_ALLOW_THREADS
+
+cpuid_args.eax = eax;
+cpuid_args.ecx = ecx;
+
+if (cpu == gCurrentBSPProcessorNumber)
+{
+// cpu provided as input is same as the current BSP processor
+// then directly call the CPUIDToRunOnAP function to execute
+// cpuid instruction on current BSP processor itself.
+CPUIDToRunOnAP(_args);
+}
+else if (cpu < gNumberOfProcessors)
+{
+// if cpu provided as input is different from the current
+// BSP processor and is less than the number of processors
+// on this system, then make use of the MPService protocols
+// StartupThisAP function to run the CPUIDToRunOnAP function on
+// specific AP indicated by cpu parameter.
+// Start the AP with the arguments structure
+
+status = gpMpService->StartupThisAP(
+gpMpService,
+CPUIDToRunOnAP, // Function to run
+cpu,// AP number
+NULL, // WaitEvent (optional)
+AP_FUNCTION_EXECUTION_TIMEOUT, // Timeout in microseconds
+_args,// Buffer to pass to the function
+_function_finished // Finished (optional)
+);
+if (EFI_ERROR(status))
+{
+PyErr_SetString(PyExc_OSError, "Could not start the requested
cpu");
+Py_INCREF(Py_None);
+return Py_None;
+}
+
+if (!is_function_finished)
+{
+PyErr_SetString(PyExc_OSError,
+"Timeout while running the cpuid instruction on
given cpu");
+Py_INCREF(Py_None);
+return Py_None;
+}
+}
+else
+{
+// if cpu provided exeeds the number of processors
+// then set the ValueError exception and return Py_None
+PyErr_SetString(PyExc_ValueError,
+
Re: [edk2-devel] [edk2-platforms][PATCH v2] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol
Hi Abner,
It' hard to say actually. I don't spend full-time for open-source work.
But I will try to complete it within 2 weeks or sooner.
Most of Ampere Altra drivers including IPMI SSIF are living at
https://github.com/AmpereComputing/edk2-platforms. The effort now is to
port to be compatible with ManageabilityPkg.
Regards,
Nhi
On 5/17/2024 3:16 PM, Chang, Abner wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Nhi,
How much effort you think to have the SSIF ManageabilityPkg port?
Regards,
Abner
-Original Message-
From: Nhi Pham
Sent: Friday, May 17, 2024 3:49 PM
To: Nickle Wang ; devel@edk2.groups.io
Cc: Chang, Abner ; Attar, AbdulLateef (Abdul
Lateef) ; Tinh Nguyen
; Thang Nguyen OS
; Mike Maslenkin
Subject: Re: [edk2-platforms][PATCH v2] ManageabilityPkg: add support for
the phosphor ipmi blob transfer protocol
Caution: This message originated from an External Source. Use proper caution
when opening attachments, clicking links, or responding.
Hi Nickle,
Please see my comments inline...
P/s: I just realized that I can not test this protocol without IPMI SSIF
to be compatible with ManageabilityPkg framework.
On 5/15/2024 10:06 PM, Nickle Wang wrote:
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4773
This change implements the blob transfer protocol used in OpenBmc
documented here: https://github.com/openbmc/phosphor-ipmi-blobs
Signed-off-by: Nick Ramirez
Co-authored-by: Nickle Wang
Cc: Abner Chang
Cc: Abdul Lateef Attar
Cc: Tinh Nguyen
Cc: Nhi Pham
Cc: Thang Nguyen OS
Cc: Mike Maslenkin
---
.../ManageabilityPkg/ManageabilityPkg.dec |3 +
.../Include/Manageability.dsc |2 +
.../IpmiBlobTransferDxe.inf | 39 +
.../IpmiBlobTransferTestUnitTestsHost.inf | 40 +
.../Include/Protocol/IpmiBlobTransfer.h | 253
.../InternalIpmiBlobTransfer.h| 407 ++
.../IpmiBlobTransferDxe/IpmiBlobTransferDxe.c | 872 +
.../UnitTest/IpmiBlobTransferTestUnitTests.c | 1113 +
.../Universal/IpmiBlobTransferDxe/Readme.md | 24 +
9 files changed, 2753 insertions(+)
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/IpmiBlobTransfer
Dxe.inf
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/UnitTest/IpmiBlo
bTransferTestUnitTestsHost.inf
create mode 100644
Features/ManageabilityPkg/Include/Protocol/IpmiBlobTransfer.h
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/InternalIpmiBlob
Transfer.h
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/IpmiBlobTransfer
Dxe.c
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/UnitTest/IpmiBlo
bTransferTestUnitTests.c
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/Readme.md
diff --git a/Features/ManageabilityPkg/ManageabilityPkg.dec
b/Features/ManageabilityPkg/ManageabilityPkg.dec
index eb0ee67cba..dc1d00162c 100644
--- a/Features/ManageabilityPkg/ManageabilityPkg.dec
+++ b/Features/ManageabilityPkg/ManageabilityPkg.dec
@@ -4,6 +4,7 @@
# those are related to the platform management.
#
# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights
reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -58,6 +59,8 @@
gEdkiiPldmProtocolGuid= { 0x60997616, 0xDB70, 0x4B5F, {
0x86,
0xA4, 0x09, 0x58, 0xA3, 0x71, 0x47, 0xB4 } }
gEdkiiPldmSmbiosTransferProtocolGuid = { 0xFA431C3C, 0x816B, 0x4B32,
{ 0xA3, 0xE0, 0xAD, 0x9B, 0x7F, 0x64, 0x27, 0x2E } }
gEdkiiMctpProtocolGuid= { 0xE93465C1, 0x9A31, 0x4C96, {
0x92,
0x56, 0x22, 0x0A, 0xE1, 0x80, 0xB4, 0x1B } }
+ ## Include/Protocol/IpmiBlobTransfer.h
+ gEdkiiIpmiBlobTransferProtocolGuid= { 0x05837c75, 0x1d65, 0x468b,
{ 0xb1, 0xc2, 0x81, 0xaf, 0x9a, 0x31, 0x5b, 0x2c } }
[PcdsFixedAtBuild]
## This value is the MCTP Interface source and destination endpoint ID for
transmiting MCTP message.
diff --git a/Features/ManageabilityPkg/Include/Manageability.dsc
b/Features/ManageabilityPkg/Include/Manageability.dsc
index 2e410df9ba..aae343a733 100644
--- a/Features/ManageabilityPkg/Include/Manageability.dsc
+++ b/Features/ManageabilityPkg/Include/Manageability.dsc
@@ -2,6 +2,7 @@
# Common libraries for Manageabilty Package
#
# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights
reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -37,6 +38,7 @@
[Components.X64, Components.AARCH64]
!if gManageabilityPkgTokenSpaceGuid.PcdManageabilityDxeIpmiEnable ==
TRUE
ManageabilityPkg/Universal/IpmiProtocol/Dxe/IpmiProtocolDxe.inf
+
Re: [edk2-devel] [edk2-platforms][PATCH v2] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol
Hi Nickle,
Please see my comments inline...
P/s: I just realized that I can not test this protocol without IPMI SSIF
to be compatible with ManageabilityPkg framework.
On 5/15/2024 10:06 PM, Nickle Wang wrote:
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4773
This change implements the blob transfer protocol used in OpenBmc
documented here: https://github.com/openbmc/phosphor-ipmi-blobs
Signed-off-by: Nick Ramirez
Co-authored-by: Nickle Wang
Cc: Abner Chang
Cc: Abdul Lateef Attar
Cc: Tinh Nguyen
Cc: Nhi Pham
Cc: Thang Nguyen OS
Cc: Mike Maslenkin
---
.../ManageabilityPkg/ManageabilityPkg.dec |3 +
.../Include/Manageability.dsc |2 +
.../IpmiBlobTransferDxe.inf | 39 +
.../IpmiBlobTransferTestUnitTestsHost.inf | 40 +
.../Include/Protocol/IpmiBlobTransfer.h | 253
.../InternalIpmiBlobTransfer.h| 407 ++
.../IpmiBlobTransferDxe/IpmiBlobTransferDxe.c | 872 +
.../UnitTest/IpmiBlobTransferTestUnitTests.c | 1113 +
.../Universal/IpmiBlobTransferDxe/Readme.md | 24 +
9 files changed, 2753 insertions(+)
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/IpmiBlobTransferDxe.inf
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/UnitTest/IpmiBlobTransferTestUnitTestsHost.inf
create mode 100644
Features/ManageabilityPkg/Include/Protocol/IpmiBlobTransfer.h
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/InternalIpmiBlobTransfer.h
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/IpmiBlobTransferDxe.c
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/UnitTest/IpmiBlobTransferTestUnitTests.c
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/Readme.md
diff --git a/Features/ManageabilityPkg/ManageabilityPkg.dec
b/Features/ManageabilityPkg/ManageabilityPkg.dec
index eb0ee67cba..dc1d00162c 100644
--- a/Features/ManageabilityPkg/ManageabilityPkg.dec
+++ b/Features/ManageabilityPkg/ManageabilityPkg.dec
@@ -4,6 +4,7 @@
# those are related to the platform management.
#
# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -58,6 +59,8 @@
gEdkiiPldmProtocolGuid= { 0x60997616, 0xDB70, 0x4B5F, {
0x86, 0xA4, 0x09, 0x58, 0xA3, 0x71, 0x47, 0xB4 } }
gEdkiiPldmSmbiosTransferProtocolGuid = { 0xFA431C3C, 0x816B, 0x4B32, {
0xA3, 0xE0, 0xAD, 0x9B, 0x7F, 0x64, 0x27, 0x2E } }
gEdkiiMctpProtocolGuid= { 0xE93465C1, 0x9A31, 0x4C96, {
0x92, 0x56, 0x22, 0x0A, 0xE1, 0x80, 0xB4, 0x1B } }
+ ## Include/Protocol/IpmiBlobTransfer.h
+ gEdkiiIpmiBlobTransferProtocolGuid= { 0x05837c75, 0x1d65, 0x468b, {
0xb1, 0xc2, 0x81, 0xaf, 0x9a, 0x31, 0x5b, 0x2c } }
[PcdsFixedAtBuild]
## This value is the MCTP Interface source and destination endpoint ID for
transmiting MCTP message.
diff --git a/Features/ManageabilityPkg/Include/Manageability.dsc
b/Features/ManageabilityPkg/Include/Manageability.dsc
index 2e410df9ba..aae343a733 100644
--- a/Features/ManageabilityPkg/Include/Manageability.dsc
+++ b/Features/ManageabilityPkg/Include/Manageability.dsc
@@ -2,6 +2,7 @@
# Common libraries for Manageabilty Package
#
# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -37,6 +38,7 @@
[Components.X64, Components.AARCH64]
!if gManageabilityPkgTokenSpaceGuid.PcdManageabilityDxeIpmiEnable == TRUE
ManageabilityPkg/Universal/IpmiProtocol/Dxe/IpmiProtocolDxe.inf
+ ManageabilityPkg/Universal/IpmiBlobTransferDxe/IpmiBlobTransferDxe.inf
!endif
[Components.X64]
diff --git
a/Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/IpmiBlobTransferDxe.inf
b/Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/IpmiBlobTransferDxe.inf
new file mode 100644
index 00..108f4bb5f8
--- /dev/null
+++
b/Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/IpmiBlobTransferDxe.inf
@@ -0,0 +1,39 @@
+## @file
+# IPMI Blob Transfer Protocol DXE Driver.
+#
+# Copyright (c) 2022-2024, NVIDIA CORPORATION & AFFILIATES. All rights
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+[Defines]
+ INF_VERSION= 0x00010005
+ BASE_NAME = IpmiBlobTransferDxe
+ FILE_GUID = 6357c804-78bb-4b0c-abdf-c75df942f319
+ MODULE_TYPE= DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT= IpmiBlobTransferDxeDriverEntryPoint
+
+[Sources.common]
+ IpmiBlobTransferDxe.c
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ IpmiLib
+
Re: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: introduce RedfishBootstrapAccountDxe
Hi Igor, Thanks for your idea. This sounds feasible to me. Let me try to test it on my system. Regards, Nickle > -Original Message- > From: Igor Kulchytskyy > Sent: Thursday, May 16, 2024 7:34 PM > To: Nickle Wang ; Chang, Abner > ; devel@edk2.groups.io > Cc: Nick Ramirez > Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > External email: Use caution opening links or attachments > > > We can have some protocol where all Redfish clients register saying that they > are > using the bootstrap credentials. > And when they finish their job they notify RedfishBootstrapAccountDxe driver > and > when all of registered modules finish their job RedfishBootstrapAccountDxe > driver > delete the account. > Thank you, > Igor > > -Original Message- > From: Nickle Wang > Sent: Wednesday, May 15, 2024 11:10 PM > To: Chang, Abner ; Igor Kulchytskyy ; > devel@edk2.groups.io > Cc: Nick Ramirez > Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > > RedfishFeatureCore could be one of the Redfish clients, delete the > > credential from Redfish account service in RedfishFeatureCore > > lifecycle may impact other Redfish clients that still need the communication > with Redfish service, right? > > When all Redfish clients are managed by RedfishFeatureCore, I think we don't > have such case. And this may be a good reason to keep it in RedfishClientPkg. > This > driver offers a way for BIOS to delete bootstrapping account at BMC after > everything is done. Platform owner can decide to include this driver or not > depending on the Redfish design in system. > > Regards, > Nickle > > > -Original Message- > > From: Chang, Abner > > Sent: Thursday, May 16, 2024 10:41 AM > > To: Nickle Wang ; Igor Kulchytskyy > > ; devel@edk2.groups.io > > Cc: Nick Ramirez > > Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] > > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > > > External email: Use caution opening links or attachments > > > > > > [AMD Official Use Only - General] > > > > I think we probably overlook some use cases. Multiple edk2 Redfish > > applications running simultaneously is allowed from the design > > perspective. However, we centralized GetAuthInfo in > > RedfishPlatformCredentialLib for all of edk2 Redfish client entities > > to leverage the same credential stored in EFI variable. This way we > > can limit the process of acquiring credential to only one time Redfish IPMI > bootstrap command sent to BMC. > > RedfishFeatureCore could be one of the Redfish clients, delete the > > credential from Redfish account service in RedfishFeatureCore > > lifecycle may impact other Redfish clients that still need the communication > with Redfish service, right? > > > > Thanks > > Abner > > > > > -Original Message- > > > From: Nickle Wang > > > Sent: Thursday, May 16, 2024 9:38 AM > > > To: Chang, Abner ; Igor Kulchytskyy > > > ; devel@edk2.groups.io > > > Cc: Nick Ramirez > > > Subject: RE: [EXTERNAL] RE: [edk2-devel] > > > [edk2-redfish-client][PATCH] > > > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > > > > > [AMD Official Use Only - General] > > > > > > Caution: This message originated from an External Source. Use proper > > > caution when opening attachments, clicking links, or responding. > > > > > > > > > Hi Igor, Abner, > > > > > > > Maybe we should consider moving RedfishBootstrapAccountDxe driver > > > > to > > > RedfishPkg and have some register mechanism which will be used by > > > interested drivers to notify that they finished their job and after > > > that RedfishBootstrapAccountDxe driver would delete an account. > > > > > > You are saying the mechanism in runtime, right? In current design, > > > RedfishFeatureCore driver will send "after provisioning" signal to > > > notify this driver to delete bootstrapping account. This makes sure > > > that all feature drivers are done with their jobs, so this driver is > > > safe to delete bootstrapping account at BMC. > > > > > > If we move it to RedfishPkg, there is no such centralized Redfish > > > driver managing Redfish stuff. How does a particular driver know > > > that there is no other driver running
[edk2-devel] [edk2-libc Patch 1/1] edk2-libc: Add cpuid_ex API to execute CPUID instructions on specific CPU
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4749
This commit adds cpuid_ex function to edk2module to provide capability
to execute cpuid instruction on specific cpu.
This feature was requested via BZ 4749
Cc: Rebecca Cran
Cc: Michael D Kinney
Cc: Jayaprakash N
Signed-off-by: Vishal R
---
.../PyMod-3.6.8/Modules/edk2module.c | 93 +++
1 file changed, 93 insertions(+)
diff --git
a/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/edk2module.c
b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/edk2module.c
index 163fc7f..d419428 100644
--- a/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/edk2module.c
+++ b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/edk2module.c
@@ -45,6 +45,15 @@ typedef struct {
UINT64 data; // data, to be filled by the AP function
} AP_FUNCTION_MSR_ARGS;
+typedef struct {
+UINT32 eax; // eax value
+UINT32 ecx; // ecx value
+UINT32 rax_value; // retrun value for eax
+UINT32 rbx_value; // return value for ebx
+UINT32 rcx_value; // retrun value for ecx
+UINT32 rdx_value; // return value for edx
+} AP_FUNCTION_CPUID_ARGS;
+
#define AP_FUNCTION_EXECUTION_TIMEOUT 500 // setting the max time out
value to be 5 seconds
extern void _swsmi( unsigned int smi_code_data, unsigned int rax_value,
unsigned int rbx_value, unsigned int rcx_value, unsigned int rdx_value,
unsigned int rsi_value, unsigned int rdi_value );
@@ -223,6 +232,13 @@ VOID EFIAPI MSRWriteToRunOnAP(IN VOID *context)
AsmWriteMsr64(msr, data);
}
+// CPUID execution function to run on specific cpu core using MPServices
Protocol
+VOID EFIAPI CPUIDToRunOnAP(IN VOID *context)
+{
+AP_FUNCTION_CPUID_ARGS *args = (AP_FUNCTION_CPUID_ARGS *)context;
+AsmCpuidEx( args->eax, args->ecx, >rax_value, >rbx_value,
>rcx_value, >rdx_value);
+}
+
#ifndef UEFI_C_SOURCE
/* Return a dictionary corresponding to the POSIX environment table */
extern char **environ;
@@ -4153,6 +4169,82 @@ edk2_cpuid(PyObject *self, PyObject *args)
return Py_BuildValue("())", (unsigned long)rax_value, (unsigned
long)rbx_value, (unsigned long)rcx_value, (unsigned long)rdx_value);
}
+PyDoc_STRVAR(efi_cpuid_ex__doc__,
+"cpuid_ex(cpu, eax, ecx) -> (eax:ebx:ecx:edx)\n\
+Read the CPUID from a specific cpu.";);
+
+static PyObject *
+edk2_cpuid_ex(PyObject *self, PyObject *args)
+{
+UINT32 cpu, eax, ecx, rax_value, rbx_value, rcx_value, rdx_value;
+BOOLEAN is_function_finished = FALSE;
+EFI_STATUS status = 0;
+AP_FUNCTION_CPUID_ARGS cpuid_args = {0};
+
+if (!PyArg_ParseTuple(args, "III", , , ))
+return NULL;
+Py_BEGIN_ALLOW_THREADS
+
+cpuid_args.eax = eax;
+cpuid_args.ecx = ecx;
+
+if (cpu == gCurrentBSPProcessorNumber)
+{
+// cpu provided as input is same as the current BSP processor
+// then directly call the CPUIDToRunOnAP function to execute
+// cpuid instruction on current BSP processor itself.
+CPUIDToRunOnAP(_args);
+}
+else if (cpu < gNumberOfProcessors)
+{
+// if cpu provided as input is different from the current
+// BSP processor and is less than the number of processors
+// on this system, then make use of the MPService protocols
+// StartupThisAP function to run the CPUIDToRunOnAP function on
+// specific AP indicated by cpu parameter.
+// Start the AP with the arguments structure
+
+status = gpMpService->StartupThisAP(
+gpMpService,
+CPUIDToRunOnAP, // Function to run
+cpu,// AP number
+NULL, // WaitEvent (optional)
+AP_FUNCTION_EXECUTION_TIMEOUT, // Timeout in microseconds
+_args,// Buffer to pass to the function
+_function_finished // Finished (optional)
+);
+if (EFI_ERROR(status))
+{
+PyErr_SetString(PyExc_OSError, "Could not start the requested
cpu");
+Py_INCREF(Py_None);
+return Py_None;
+}
+
+if (!is_function_finished)
+{
+PyErr_SetString(PyExc_OSError,
+"Timeout while running the cpuid instruction on
given cpu");
+Py_INCREF(Py_None);
+return Py_None;
+}
+}
+else
+{
+// if cpu provided exeeds the number of processors
+// then set the ValueError exception and return Py_None
+PyErr_SetString(PyExc_ValueError,
+"Invalid cpu number provided");
+Py_INCREF(Py_None);
+return Py_None;
+}
+
+Py_END_ALLOW_THREADS
+return Py_BuildValue("())", (unsigned long)cpuid_args.rax_value,
+(unsigned long)cpuid_args.rbx_value,
+(unsigned
[edk2-devel] [edk2-libc Patch 0/1] Add cpuid_ex API to execute CPUID instructions on specific CPU
This commit adds cpuid_ex function to edk2module to provide capability to execute cpuid instruction on specific cpu. This feature was requested via BZ 4749 Vishal R (1): edk2-libc: Add cpuid_ex API to execute CPUID instructions on specific CPU .../PyMod-3.6.8/Modules/edk2module.c | 93 +++ 1 file changed, 93 insertions(+) -- 2.44.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118984): https://edk2.groups.io/g/devel/message/118984 Mute This Topic: https://groups.io/mt/106149327/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: introduce RedfishBootstrapAccountDxe
We can have some protocol where all Redfish clients register saying that they are using the bootstrap credentials. And when they finish their job they notify RedfishBootstrapAccountDxe driver and when all of registered modules finish their job RedfishBootstrapAccountDxe driver delete the account. Thank you, Igor -Original Message- From: Nickle Wang Sent: Wednesday, May 15, 2024 11:10 PM To: Chang, Abner ; Igor Kulchytskyy ; devel@edk2.groups.io Cc: Nick Ramirez Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: introduce RedfishBootstrapAccountDxe > RedfishFeatureCore could be one of the Redfish clients, delete the credential > from > Redfish account service in RedfishFeatureCore lifecycle may impact other > Redfish > clients that still need the communication with Redfish service, right? When all Redfish clients are managed by RedfishFeatureCore, I think we don't have such case. And this may be a good reason to keep it in RedfishClientPkg. This driver offers a way for BIOS to delete bootstrapping account at BMC after everything is done. Platform owner can decide to include this driver or not depending on the Redfish design in system. Regards, Nickle > -Original Message- > From: Chang, Abner > Sent: Thursday, May 16, 2024 10:41 AM > To: Nickle Wang ; Igor Kulchytskyy ; > devel@edk2.groups.io > Cc: Nick Ramirez > Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > External email: Use caution opening links or attachments > > > [AMD Official Use Only - General] > > I think we probably overlook some use cases. Multiple edk2 Redfish > applications > running simultaneously is allowed from the design perspective. However, we > centralized GetAuthInfo in RedfishPlatformCredentialLib for all of edk2 > Redfish > client entities to leverage the same credential stored in EFI variable. This > way we > can limit the process of acquiring credential to only one time Redfish IPMI > bootstrap command sent to BMC. > RedfishFeatureCore could be one of the Redfish clients, delete the credential > from > Redfish account service in RedfishFeatureCore lifecycle may impact other > Redfish > clients that still need the communication with Redfish service, right? > > Thanks > Abner > > > -Original Message- > > From: Nickle Wang > > Sent: Thursday, May 16, 2024 9:38 AM > > To: Chang, Abner ; Igor Kulchytskyy > > ; devel@edk2.groups.io > > Cc: Nick Ramirez > > Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] > > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > > > [AMD Official Use Only - General] > > > > Caution: This message originated from an External Source. Use proper > > caution when opening attachments, clicking links, or responding. > > > > > > Hi Igor, Abner, > > > > > Maybe we should consider moving RedfishBootstrapAccountDxe driver to > > RedfishPkg and have some register mechanism which will be used by > > interested drivers to notify that they finished their job and after > > that RedfishBootstrapAccountDxe driver would delete an account. > > > > You are saying the mechanism in runtime, right? In current design, > > RedfishFeatureCore driver will send "after provisioning" signal to > > notify this driver to delete bootstrapping account. This makes sure > > that all feature drivers are done with their jobs, so this driver is > > safe to delete bootstrapping account at BMC. > > > > If we move it to RedfishPkg, there is no such centralized Redfish > > driver managing Redfish stuff. How does a particular driver know that > > there is no other driver running Redfish stuff after it? The way I can > > think of now is to rely on EDK2 ready-to-boot event as the signal to > > do the notification, since there is not supposed to have Redfish driver > > running > jobs after this event... > > > > Regards, > > Nickle > > > > > -Original Message- > > > From: Chang, Abner > > > Sent: Thursday, May 16, 2024 9:06 AM > > > To: Igor Kulchytskyy ; Nickle Wang > > > ; devel@edk2.groups.io > > > Cc: Nick Ramirez > > > Subject: RE: [EXTERNAL] RE: [edk2-devel] > > > [edk2-redfish-client][PATCH] > > > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > > > > > External email: Use caution opening links or attachments > > > > > > > > > [AMD Official Use Only - General] > > > > > > HI Igor, > > > This sounds to me reasonable to me. As yo
Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol
[AMD Official Use Only - AMD Internal Distribution Only] That is awesome! Thank you! Abner > -Original Message- > From: Nhi Pham > Sent: Thursday, May 16, 2024 4:50 PM > To: Chang, Abner ; devel@edk2.groups.io; > nick...@nvidia.com; Rebecca Cran > Cc: Isaac Oram ; Attar, AbdulLateef (Abdul Lateef) > ; Tinh Nguyen > > Subject: Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add > support for the phosphor ipmi blob transfer protocol > > Caution: This message originated from an External Source. Use proper caution > when opening attachments, clicking links, or responding. > > > On 5/16/2024 3:44 PM, Chang, Abner wrote: > > [AMD Official Use Only - AMD Internal Distribution Only] > > > > Hi Nhi, > > Are you using SSIF as the transport interface based on the ManabeabilityPkg > framework? If yes, will you contribute that driver? > > > > yes, we are. I will need to update the SSIF driver to be compatible with > the ManabeabilityPkg and upstream it. > > Regards, > Nhi -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118953): https://edk2.groups.io/g/devel/message/118953 Mute This Topic: https://groups.io/mt/98212643/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol
On 5/16/2024 3:44 PM, Chang, Abner wrote: [AMD Official Use Only - AMD Internal Distribution Only] Hi Nhi, Are you using SSIF as the transport interface based on the ManabeabilityPkg framework? If yes, will you contribute that driver? yes, we are. I will need to update the SSIF driver to be compatible with the ManabeabilityPkg and upstream it. Regards, Nhi -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118952): https://edk2.groups.io/g/devel/message/118952 Mute This Topic: https://groups.io/mt/98212643/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol
[AMD Official Use Only - AMD Internal Distribution Only] Hi Nhi, Are you using SSIF as the transport interface based on the ManabeabilityPkg framework? If yes, will you contribute that driver? Thanks Abner > -Original Message- > From: Nhi Pham > Sent: Thursday, May 16, 2024 4:40 PM > To: devel@edk2.groups.io; nick...@nvidia.com; Chang, Abner > ; Rebecca Cran > Cc: Isaac Oram ; Attar, AbdulLateef (Abdul Lateef) > ; Tinh Nguyen > > Subject: Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add > support for the phosphor ipmi blob transfer protocol > > Caution: This message originated from an External Source. Use proper caution > when opening attachments, clicking links, or responding. > > > Thanks Nickle. I'm reviewing and testing it. Will get back to you soon. > > On 5/15/2024 10:14 PM, Nickle Wang via groups.io wrote: > > Hi Nhi, > > > > Version 2 patch files are sent for review here: > https://edk2.groups.io/g/devel/message/118914 and > https://edk2.groups.io/g/devel/message/118922 > > > > For your convenience, below are two pull requests if you would like to test > them. > > > > 1) https://github.com/tianocore/edk2/pull/5660 > > 2) https://github.com/tianocore/edk2-platforms/pull/76 > > > > I had tried to address review comments as much as I can. Please feel free to > let me know if you see any issue in this version of patch set. > > > > Thanks, > > Nickle > > > >> -Original Message- > >> From: Nhi Pham > >> Sent: Tuesday, May 14, 2024 10:26 AM > >> To: Nickle Wang ; devel@edk2.groups.io; > >> abner.ch...@amd.com; Rebecca Cran > >> Cc: Isaac Oram ; Attar, AbdulLateef (Abdul > Lateef) > >> ; Tinh Nguyen > >> > >> Subject: Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add > >> support for the phosphor ipmi blob transfer protocol > >> > >> External email: Use caution opening links or attachments > >> > >> > >> Thanks Nickle. I will help review and verify your patch. > >> > >> On 5/14/2024 8:56 AM, Nickle Wang wrote: > >>> Hi Nhi, > >>> > >>> This task is on my list but with lower priority. I will try to provide > >>> version 2 > patch > >> for review here by the end of this week. > >>> > >>> Thanks, > >>> Nickle > >>> > >>>> -Original Message- > >>>> From: Nhi Pham > >>>> Sent: Monday, May 13, 2024 5:02 PM > >>>> To: devel@edk2.groups.io; abner.ch...@amd.com; Nickle Wang > >>>> ; Rebecca Cran > >>>> Cc: Isaac Oram ; Attar, AbdulLateef (Abdul > >>>> Lateef) ; Tinh Nguyen > >>>> > >>>> Subject: Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: > >>>> add support for the phosphor ipmi blob transfer protocol > >>>> > >>>> External email: Use caution opening links or attachments > >>>> > >>>> > >>>> On 2/9/2024 11:37 PM, Chang, Abner via groups.io wrote: > >>>>> [AMD Official Use Only - General] > >>>>> > >>>>> Yeah, I forget this patch set and seems we don't have any follow up > >>>>> conversation > >>>> after below feedbacks from community. > >>>>> > >>>>> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fed > >>>>> > >> > k2%2F=05%7C02%7Cnicklew%40nvidia.com%7Cdc53be8f0cf24ccfd35 > 108d > >> c > >>>>> > >> > 73bd2d45%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C63851 > 25035 > >> 6068 > >>>>> > >> > 8708%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2l > uMzIi > >> LCJ > >>>>> > >> > BTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C=%2BCkaU%2Fcd > G1v > >> r6uPsA > >>>>> 7fqrvhvxg%2FX5FqcmJ6fizaa9fA%3D=0 > >>>>> .groups.io%2Fg%2Fdevel%2Fmessage%2F103116=05%7C02%7 > Cnickle > >> w > >>>> %40nvi > >>>>> > >>>> > >> > dia.com%7C8b9e1a8a8d044208f8d608dc732b678d%7C43083d15727340c > 1b7db > >>>> 39efd > >>>>> > >>>> > >> > 9ccc17a%7C0%7C0%7C638511877469561600%7CUnknown%7CTWFpbGZs > b3d8 > >>>> eyJWIjoiM > >>>>> > >>>> > >> > C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C
Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol
Thanks Nickle. I'm reviewing and testing it. Will get back to you soon. On 5/15/2024 10:14 PM, Nickle Wang via groups.io wrote: Hi Nhi, Version 2 patch files are sent for review here: https://edk2.groups.io/g/devel/message/118914 and https://edk2.groups.io/g/devel/message/118922 For your convenience, below are two pull requests if you would like to test them. 1) https://github.com/tianocore/edk2/pull/5660 2) https://github.com/tianocore/edk2-platforms/pull/76 I had tried to address review comments as much as I can. Please feel free to let me know if you see any issue in this version of patch set. Thanks, Nickle -Original Message- From: Nhi Pham Sent: Tuesday, May 14, 2024 10:26 AM To: Nickle Wang ; devel@edk2.groups.io; abner.ch...@amd.com; Rebecca Cran Cc: Isaac Oram ; Attar, AbdulLateef (Abdul Lateef) ; Tinh Nguyen Subject: Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol External email: Use caution opening links or attachments Thanks Nickle. I will help review and verify your patch. On 5/14/2024 8:56 AM, Nickle Wang wrote: Hi Nhi, This task is on my list but with lower priority. I will try to provide version 2 patch for review here by the end of this week. Thanks, Nickle -Original Message- From: Nhi Pham Sent: Monday, May 13, 2024 5:02 PM To: devel@edk2.groups.io; abner.ch...@amd.com; Nickle Wang ; Rebecca Cran Cc: Isaac Oram ; Attar, AbdulLateef (Abdul Lateef) ; Tinh Nguyen Subject: Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol External email: Use caution opening links or attachments On 2/9/2024 11:37 PM, Chang, Abner via groups.io wrote: [AMD Official Use Only - General] Yeah, I forget this patch set and seems we don't have any follow up conversation after below feedbacks from community. https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fed k2%2F=05%7C02%7Cnicklew%40nvidia.com%7Cdc53be8f0cf24ccfd35108d c 73bd2d45%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C6385125035 6068 8708%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIi LCJ BTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C=%2BCkaU%2FcdG1v r6uPsA 7fqrvhvxg%2FX5FqcmJ6fizaa9fA%3D=0 .groups.io%2Fg%2Fdevel%2Fmessage%2F103116=05%7C02%7Cnickle w %40nvi dia.com%7C8b9e1a8a8d044208f8d608dc732b678d%7C43083d15727340c1b7db 39efd 9ccc17a%7C0%7C0%7C638511877469561600%7CUnknown%7CTWFpbGZsb3d8 eyJWIjoiM C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7 C%7C =N4eDH668lBSFxq9r81QrhMgpULvht8isrrEI9lipVKc%3D=0 https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fed k2%2F=05%7C02%7Cnicklew%40nvidia.com%7Cdc53be8f0cf24ccfd35108d c 73bd2d45%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C6385125035 6070 0897%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIi LCJ BTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C=KFd86NhmrQeGqEB 8%2FJy 0qnbMkb%2Furpo8YCsVbVsOxNk%3D=0 .groups.io%2Fg%2Fdevel%2Fmessage%2F103087=05%7C02%7Cnickle w %40nvi dia.com%7C8b9e1a8a8d044208f8d608dc732b678d%7C43083d15727340c1b7db 39efd 9ccc17a%7C0%7C0%7C638511877469569817%7CUnknown%7CTWFpbGZsb3d8 eyJWIjoiM C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7 C%7C =7p0BHb8RFRapFyygr35u0hQBK2bQwKPSypBaUi6cMIQ%3D=0 So Nickle, does NV still has the plan to upstream IPMI blob edk2 implementation? We should keep driving upstream the implementation as industry needs it to incorporate with OpenBMC. Hi Rebessa, As we are on Chinese New Year holidays now, please expect the delay response. Thanks Abner Hi Nickle and Abner, May I know the status of upstreaming the IPMI Blob Transfer Protocol? I'm planning to upstream the SMBIOS transfer to OpenBMC by leveraging this protocol. Thanks, Nhi -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118950): https://edk2.groups.io/g/devel/message/118950 Mute This Topic: https://groups.io/mt/98212643/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: introduce RedfishBootstrapAccountDxe
> RedfishFeatureCore could be one of the Redfish clients, delete the credential > from > Redfish account service in RedfishFeatureCore lifecycle may impact other > Redfish > clients that still need the communication with Redfish service, right? When all Redfish clients are managed by RedfishFeatureCore, I think we don't have such case. And this may be a good reason to keep it in RedfishClientPkg. This driver offers a way for BIOS to delete bootstrapping account at BMC after everything is done. Platform owner can decide to include this driver or not depending on the Redfish design in system. Regards, Nickle > -Original Message- > From: Chang, Abner > Sent: Thursday, May 16, 2024 10:41 AM > To: Nickle Wang ; Igor Kulchytskyy ; > devel@edk2.groups.io > Cc: Nick Ramirez > Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > External email: Use caution opening links or attachments > > > [AMD Official Use Only - General] > > I think we probably overlook some use cases. Multiple edk2 Redfish > applications > running simultaneously is allowed from the design perspective. However, we > centralized GetAuthInfo in RedfishPlatformCredentialLib for all of edk2 > Redfish > client entities to leverage the same credential stored in EFI variable. This > way we > can limit the process of acquiring credential to only one time Redfish IPMI > bootstrap command sent to BMC. > RedfishFeatureCore could be one of the Redfish clients, delete the credential > from > Redfish account service in RedfishFeatureCore lifecycle may impact other > Redfish > clients that still need the communication with Redfish service, right? > > Thanks > Abner > > > -Original Message- > > From: Nickle Wang > > Sent: Thursday, May 16, 2024 9:38 AM > > To: Chang, Abner ; Igor Kulchytskyy > > ; devel@edk2.groups.io > > Cc: Nick Ramirez > > Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] > > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > > > [AMD Official Use Only - General] > > > > Caution: This message originated from an External Source. Use proper > > caution when opening attachments, clicking links, or responding. > > > > > > Hi Igor, Abner, > > > > > Maybe we should consider moving RedfishBootstrapAccountDxe driver to > > RedfishPkg and have some register mechanism which will be used by > > interested drivers to notify that they finished their job and after > > that RedfishBootstrapAccountDxe driver would delete an account. > > > > You are saying the mechanism in runtime, right? In current design, > > RedfishFeatureCore driver will send "after provisioning" signal to > > notify this driver to delete bootstrapping account. This makes sure > > that all feature drivers are done with their jobs, so this driver is > > safe to delete bootstrapping account at BMC. > > > > If we move it to RedfishPkg, there is no such centralized Redfish > > driver managing Redfish stuff. How does a particular driver know that > > there is no other driver running Redfish stuff after it? The way I can > > think of now is to rely on EDK2 ready-to-boot event as the signal to > > do the notification, since there is not supposed to have Redfish driver > > running > jobs after this event... > > > > Regards, > > Nickle > > > > > -Original Message- > > > From: Chang, Abner > > > Sent: Thursday, May 16, 2024 9:06 AM > > > To: Igor Kulchytskyy ; Nickle Wang > > > ; devel@edk2.groups.io > > > Cc: Nick Ramirez > > > Subject: RE: [EXTERNAL] RE: [edk2-devel] > > > [edk2-redfish-client][PATCH] > > > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > > > > > External email: Use caution opening links or attachments > > > > > > > > > [AMD Official Use Only - General] > > > > > > HI Igor, > > > This sounds to me reasonable to me. As you mentioned, RedfishPkg was > > designed > > > to support multiple Redfish applications and RedfishClientPkg is > > > just one of > > them. I > > > think we can review the implementation of acquiring/deleting credential. > > > > > > Thanks > > > Abner > > > > > > > > > > -Original Message- > > > > From: Igor Kulchytskyy > > > > Sent: Wednesday, May 15, 2024 11:02 PM > > > > To: Nickle Wang ; devel@edk2.groups.io; Chang, > > > > Abner > >
Re: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: introduce RedfishBootstrapAccountDxe
[AMD Official Use Only - General] I think we probably overlook some use cases. Multiple edk2 Redfish applications running simultaneously is allowed from the design perspective. However, we centralized GetAuthInfo in RedfishPlatformCredentialLib for all of edk2 Redfish client entities to leverage the same credential stored in EFI variable. This way we can limit the process of acquiring credential to only one time Redfish IPMI bootstrap command sent to BMC. RedfishFeatureCore could be one of the Redfish clients, delete the credential from Redfish account service in RedfishFeatureCore lifecycle may impact other Redfish clients that still need the communication with Redfish service, right? Thanks Abner > -Original Message- > From: Nickle Wang > Sent: Thursday, May 16, 2024 9:38 AM > To: Chang, Abner ; Igor Kulchytskyy > ; devel@edk2.groups.io > Cc: Nick Ramirez > Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > [AMD Official Use Only - General] > > Caution: This message originated from an External Source. Use proper caution > when opening attachments, clicking links, or responding. > > > Hi Igor, Abner, > > > Maybe we should consider moving RedfishBootstrapAccountDxe driver to > RedfishPkg and have some register mechanism which will be used by > interested drivers to notify that they finished their job and after that > RedfishBootstrapAccountDxe driver would delete an account. > > You are saying the mechanism in runtime, right? In current design, > RedfishFeatureCore driver will send "after provisioning" signal to notify this > driver to delete bootstrapping account. This makes sure that all feature > drivers > are done with their jobs, so this driver is safe to delete bootstrapping > account > at BMC. > > If we move it to RedfishPkg, there is no such centralized Redfish driver > managing Redfish stuff. How does a particular driver know that there is no > other driver running Redfish stuff after it? The way I can think of now is to > rely > on EDK2 ready-to-boot event as the signal to do the notification, since there > is > not supposed to have Redfish driver running jobs after this event... > > Regards, > Nickle > > > -Original Message- > > From: Chang, Abner > > Sent: Thursday, May 16, 2024 9:06 AM > > To: Igor Kulchytskyy ; Nickle Wang ; > > devel@edk2.groups.io > > Cc: Nick Ramirez > > Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] > > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > > > External email: Use caution opening links or attachments > > > > > > [AMD Official Use Only - General] > > > > HI Igor, > > This sounds to me reasonable to me. As you mentioned, RedfishPkg was > designed > > to support multiple Redfish applications and RedfishClientPkg is just one of > them. I > > think we can review the implementation of acquiring/deleting credential. > > > > Thanks > > Abner > > > > > > > -Original Message- > > > From: Igor Kulchytskyy > > > Sent: Wednesday, May 15, 2024 11:02 PM > > > To: Nickle Wang ; devel@edk2.groups.io; Chang, > > > Abner > > > Cc: Nick Ramirez > > > Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] > > > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > > > > > [AMD Official Use Only - General] > > > > > > Caution: This message originated from an External Source. Use proper > > > caution when opening attachments, clicking links, or responding. > > > > > > > > > Hi Nickle, > > > I have one more question to discuss regarding this driver. > > > We have a bootstrap account and creation of this account controlled by > > > RedfishCredentialDxe driver in RedfishPkg. > > > But deletion of that bootstrap account is moved to RedfishClientPkg. > > > What if we have another Redfish Client or some customer service which > > > uses RedfishPkg for the communication. > > > Architecturally it is allowed. > > > But then RedfishBootstrapAccountDxe module would delete account just > > > based on the RedfishClientPkg needs. > > > Maybe we should consider moving RedfishBootstrapAccountDxe driver to > > > RedfishPkg and have some register mechanism which will be used by > > > interested drivers to notify that they finished their job and after > > > that RedfishBootstrapAccountDxe driver would delete an account. > > > What do you think? > > > Thank you, > > > Ig
Re: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: introduce RedfishBootstrapAccountDxe
Hi Igor, Abner, > Maybe we should consider moving RedfishBootstrapAccountDxe driver to > RedfishPkg and have some register mechanism which will be used by interested > drivers to notify that they finished their job and after that > RedfishBootstrapAccountDxe driver would delete an account. You are saying the mechanism in runtime, right? In current design, RedfishFeatureCore driver will send "after provisioning" signal to notify this driver to delete bootstrapping account. This makes sure that all feature drivers are done with their jobs, so this driver is safe to delete bootstrapping account at BMC. If we move it to RedfishPkg, there is no such centralized Redfish driver managing Redfish stuff. How does a particular driver know that there is no other driver running Redfish stuff after it? The way I can think of now is to rely on EDK2 ready-to-boot event as the signal to do the notification, since there is not supposed to have Redfish driver running jobs after this event... Regards, Nickle > -Original Message- > From: Chang, Abner > Sent: Thursday, May 16, 2024 9:06 AM > To: Igor Kulchytskyy ; Nickle Wang ; > devel@edk2.groups.io > Cc: Nick Ramirez > Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > External email: Use caution opening links or attachments > > > [AMD Official Use Only - General] > > HI Igor, > This sounds to me reasonable to me. As you mentioned, RedfishPkg was designed > to support multiple Redfish applications and RedfishClientPkg is just one of > them. I > think we can review the implementation of acquiring/deleting credential. > > Thanks > Abner > > > > -Original Message- > > From: Igor Kulchytskyy > > Sent: Wednesday, May 15, 2024 11:02 PM > > To: Nickle Wang ; devel@edk2.groups.io; Chang, > > Abner > > Cc: Nick Ramirez > > Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] > > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > > > [AMD Official Use Only - General] > > > > Caution: This message originated from an External Source. Use proper > > caution when opening attachments, clicking links, or responding. > > > > > > Hi Nickle, > > I have one more question to discuss regarding this driver. > > We have a bootstrap account and creation of this account controlled by > > RedfishCredentialDxe driver in RedfishPkg. > > But deletion of that bootstrap account is moved to RedfishClientPkg. > > What if we have another Redfish Client or some customer service which > > uses RedfishPkg for the communication. > > Architecturally it is allowed. > > But then RedfishBootstrapAccountDxe module would delete account just > > based on the RedfishClientPkg needs. > > Maybe we should consider moving RedfishBootstrapAccountDxe driver to > > RedfishPkg and have some register mechanism which will be used by > > interested drivers to notify that they finished their job and after > > that RedfishBootstrapAccountDxe driver would delete an account. > > What do you think? > > Thank you, > > Igor > > > > -Original Message- > > From: Nickle Wang > > Sent: Tuesday, May 14, 2024 8:40 AM > > To: devel@edk2.groups.io; abner.ch...@amd.com; Igor Kulchytskyy > > > > Cc: Nick Ramirez > > Subject: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] > > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > > > > > **CAUTION: The e-mail below is from an external source. Please > > exercise caution before opening attachments, clicking links, or > > following guidance.** > > > > Hi Abner, > > > > > Ok, then I don't have the problem with invoking GetAuthInfo again. > > However, I > > > will suggest to add more description in GetAuthInfo function header, > > mention that > > > we will keep the auth info in EFI variable until exist boot service. > > > Also, give some more descriptions on the code you invoke to GetAuthInfo. > > > > Thanks for your comment. I add descriptions to explain above before > > calling GetAuthInfo(). Version 2 path is here: > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fedk2 > > .groups.io%2Fg%2Fdevel%2Fmessage%2F118889=05%7C02%7Cnicklew > %40nvi > > > dia.com%7C10ec4812a68a434b806008dc75445994%7C43083d15727340c1b7db > 39efd > > > 9ccc17a%7C0%7C0%7C638514183674607956%7CUnknown%7CTWFpbGZsb3d8 > eyJWIjoiM > > > C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7 > C%7C > > > =GNlisCnBmVQRhCLT
Re: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: introduce RedfishBootstrapAccountDxe
[AMD Official Use Only - General] HI Igor, This sounds to me reasonable to me. As you mentioned, RedfishPkg was designed to support multiple Redfish applications and RedfishClientPkg is just one of them. I think we can review the implementation of acquiring/deleting credential. Thanks Abner > -Original Message- > From: Igor Kulchytskyy > Sent: Wednesday, May 15, 2024 11:02 PM > To: Nickle Wang ; devel@edk2.groups.io; Chang, Abner > > Cc: Nick Ramirez > Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > [AMD Official Use Only - General] > > Caution: This message originated from an External Source. Use proper caution > when opening attachments, clicking links, or responding. > > > Hi Nickle, > I have one more question to discuss regarding this driver. > We have a bootstrap account and creation of this account controlled by > RedfishCredentialDxe driver in RedfishPkg. > But deletion of that bootstrap account is moved to RedfishClientPkg. > What if we have another Redfish Client or some customer service which uses > RedfishPkg for the communication. > Architecturally it is allowed. > But then RedfishBootstrapAccountDxe module would delete account just > based on the RedfishClientPkg needs. > Maybe we should consider moving RedfishBootstrapAccountDxe driver to > RedfishPkg and have some register mechanism which will be used by > interested drivers to notify that they finished their job and after that > RedfishBootstrapAccountDxe driver would delete an account. > What do you think? > Thank you, > Igor > > -Original Message- > From: Nickle Wang > Sent: Tuesday, May 14, 2024 8:40 AM > To: devel@edk2.groups.io; abner.ch...@amd.com; Igor Kulchytskyy > > Cc: Nick Ramirez > Subject: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] > RedfishClientPkg: introduce RedfishBootstrapAccountDxe > > > **CAUTION: The e-mail below is from an external source. Please exercise > caution before opening attachments, clicking links, or following guidance.** > > Hi Abner, > > > Ok, then I don't have the problem with invoking GetAuthInfo again. > However, I > > will suggest to add more description in GetAuthInfo function header, > mention that > > we will keep the auth info in EFI variable until exist boot service. > > Also, give some more descriptions on the code you invoke to GetAuthInfo. > > Thanks for your comment. I add descriptions to explain above before calling > GetAuthInfo(). Version 2 path is here: > https://edk2.groups.io/g/devel/message/118889 > > Regards, > Nickle > > > -Original Message- > > From: devel@edk2.groups.io On Behalf Of Chang, > Abner > > via groups.io > > Sent: Tuesday, April 23, 2024 3:42 PM > > To: Nickle Wang ; Igor Kulchytskyy ; > > devel@edk2.groups.io > > Cc: Nick Ramirez > > Subject: Re: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: > > introduce RedfishBootstrapAccountDxe > > > > External email: Use caution opening links or attachments > > > > > > [AMD Official Use Only - General] > > > > > -Original Message- > > > From: Nickle Wang > > > Sent: Tuesday, April 23, 2024 3:09 PM > > > To: Igor Kulchytskyy ; Chang, Abner > > > ; devel@edk2.groups.io > > > Cc: Nick Ramirez > > > Subject: RE: [EXTERNAL] RE: [edk2-redfish-client][PATCH] > RedfishClientPkg: > > > introduce RedfishBootstrapAccountDxe > > > > > > [AMD Official Use Only - General] > > > > > > Caution: This message originated from an External Source. Use proper > > > caution when opening attachments, clicking links, or responding. > > > > > > > > > Hi Igor, Abner, > > > > > > Thanks for your review. Please allow me to answer your questions > together. > > > > > > > 1. We suppose acquire the credential before we start to communicate > > > > with > > > Redfish. Will Redfish credential driver create another bootstrap > > > account here after provisioning? > > > No, according to the RedfishPlatformCredentialIpmiLib implementation, > > > Redfish credential driver requests credential from BMC and will keep > > > it for later use. So only one credential is requested for BIOS Redfish > > > feature drivers during POST time. > > Ok, then I don't have the problem with invoking GetAuthInfo again. > However, I > > will suggest to add more description in GetAuthInfo function header, > mention that > > we will keep the auth info in EFI variable until exis
Re: [edk2-devel] [edk2-platforms] Platform/Loongson: Fix compile error
Reviewed-by: Chao Li Thanks, Chao On 2024/5/15 17:47, Xianglai Li wrote: QemuFwCfgLibMmio has been removed, using the latest FwCfgLib to fix compilation errors Cc: Bibo Mao Cc: Chao Li Cc: Gerd Hoffmann Signed-off-by: Xianglai Li --- Platform/Loongson/LoongArchQemuPkg/Loongson.dsc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc index 58aa16d3a9..7e891ad225 100644 --- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc @@ -180,7 +180,7 @@ # VirtioLib| OvmfPkg/Library/VirtioLib/VirtioLib.inf FrameBufferBltLib| MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf - QemuFwCfgLib | OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf + QemuFwCfgLib | OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf DebugLib | MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf PeiServicesLib | MdePkg/Library/PeiServicesLib/PeiServicesLib.inf VariableFlashInfoLib | MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf @@ -257,7 +257,7 @@ ReportStatusCodeLib | MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf UefiScsiLib | MdePkg/Library/UefiScsiLib/UefiScsiLib.inf ExtractGuidedSectionLib | MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf - QemuFwCfgLib | OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf + QemuFwCfgLib | OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf PciPcdProducerLib| OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf [LibraryClasses.common.DXE_DRIVER] @@ -269,7 +269,7 @@ CpuExceptionHandlerLib | UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf ExtractGuidedSectionLib | MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf QemuFwCfgS3Lib | OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf - QemuFwCfgLib | OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf + QemuFwCfgLib | OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf PciPcdProducerLib| OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf PciExpressLib| MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf AcpiPlatformLib | OvmfPkg/Library/AcpiPlatformLib/DxeAcpiPlatformLib.inf -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118933): https://edk2.groups.io/g/devel/message/118933 Mute This Topic: https://groups.io/mt/10631/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol
Hi Nhi, Version 2 patch files are sent for review here: https://edk2.groups.io/g/devel/message/118914 and https://edk2.groups.io/g/devel/message/118922 For your convenience, below are two pull requests if you would like to test them. 1) https://github.com/tianocore/edk2/pull/5660 2) https://github.com/tianocore/edk2-platforms/pull/76 I had tried to address review comments as much as I can. Please feel free to let me know if you see any issue in this version of patch set. Thanks, Nickle > -Original Message- > From: Nhi Pham > Sent: Tuesday, May 14, 2024 10:26 AM > To: Nickle Wang ; devel@edk2.groups.io; > abner.ch...@amd.com; Rebecca Cran > Cc: Isaac Oram ; Attar, AbdulLateef (Abdul Lateef) > ; Tinh Nguyen > > Subject: Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add > support for the phosphor ipmi blob transfer protocol > > External email: Use caution opening links or attachments > > > Thanks Nickle. I will help review and verify your patch. > > On 5/14/2024 8:56 AM, Nickle Wang wrote: > > Hi Nhi, > > > > This task is on my list but with lower priority. I will try to provide > > version 2 patch > for review here by the end of this week. > > > > Thanks, > > Nickle > > > >> -Original Message- > >> From: Nhi Pham > >> Sent: Monday, May 13, 2024 5:02 PM > >> To: devel@edk2.groups.io; abner.ch...@amd.com; Nickle Wang > >> ; Rebecca Cran > >> Cc: Isaac Oram ; Attar, AbdulLateef (Abdul > >> Lateef) ; Tinh Nguyen > >> > >> Subject: Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: > >> add support for the phosphor ipmi blob transfer protocol > >> > >> External email: Use caution opening links or attachments > >> > >> > >> On 2/9/2024 11:37 PM, Chang, Abner via groups.io wrote: > >>> [AMD Official Use Only - General] > >>> > >>> Yeah, I forget this patch set and seems we don't have any follow up > >>> conversation > >> after below feedbacks from community. > >>> > >>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fed > >>> > k2%2F=05%7C02%7Cnicklew%40nvidia.com%7Cdc53be8f0cf24ccfd35108d > c > >>> > 73bd2d45%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C6385125035 > 6068 > >>> > 8708%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIi > LCJ > >>> > BTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C=%2BCkaU%2FcdG1v > r6uPsA > >>> 7fqrvhvxg%2FX5FqcmJ6fizaa9fA%3D=0 > >>> .groups.io%2Fg%2Fdevel%2Fmessage%2F103116=05%7C02%7Cnickle > w > >> %40nvi > >>> > >> > dia.com%7C8b9e1a8a8d044208f8d608dc732b678d%7C43083d15727340c1b7db > >> 39efd > >>> > >> > 9ccc17a%7C0%7C0%7C638511877469561600%7CUnknown%7CTWFpbGZsb3d8 > >> eyJWIjoiM > >>> > >> > C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7 > >> C%7C > >>> =N4eDH668lBSFxq9r81QrhMgpULvht8isrrEI9lipVKc%3D=0 > >>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fed > >>> > k2%2F=05%7C02%7Cnicklew%40nvidia.com%7Cdc53be8f0cf24ccfd35108d > c > >>> > 73bd2d45%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C6385125035 > 6070 > >>> > 0897%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIi > LCJ > >>> > BTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C=KFd86NhmrQeGqEB > 8%2FJy > >>> 0qnbMkb%2Furpo8YCsVbVsOxNk%3D=0 > >>> .groups.io%2Fg%2Fdevel%2Fmessage%2F103087=05%7C02%7Cnickle > w > >> %40nvi > >>> > >> > dia.com%7C8b9e1a8a8d044208f8d608dc732b678d%7C43083d15727340c1b7db > >> 39efd > >>> > >> > 9ccc17a%7C0%7C0%7C638511877469569817%7CUnknown%7CTWFpbGZsb3d8 > >> eyJWIjoiM > >>> > >> > C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7 > >> C%7C > >>> > >> > =7p0BHb8RFRapFyygr35u0hQBK2bQwKPSypBaUi6cMIQ%3D=0 > >>> > >>> So Nickle, does NV still has the plan to upstream IPMI blob edk2 > >> implementation? We should keep driving upstream the implementation as > >> industry needs it to incorporate with OpenBMC. > >>> > >>> Hi Rebessa, > >>> As we are on Chinese New Year holidays now, please expect the delay > response. > >>> Thanks > >>> Abner > >>> > >> > >> Hi Nickle and Abner, > >> > >> May I know the status of upstreaming the IPMI Blob Transfer Protocol? > >> I'm planning to upstream the SMBIOS transfer to OpenBMC by leveraging > >> this protocol. > >> > >> Thanks, > >> Nhi -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118923): https://edk2.groups.io/g/devel/message/118923 Mute This Topic: https://groups.io/mt/98212643/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms][PATCH v2] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4773
This change implements the blob transfer protocol used in OpenBmc
documented here: https://github.com/openbmc/phosphor-ipmi-blobs
Signed-off-by: Nick Ramirez
Co-authored-by: Nickle Wang
Cc: Abner Chang
Cc: Abdul Lateef Attar
Cc: Tinh Nguyen
Cc: Nhi Pham
Cc: Thang Nguyen OS
Cc: Mike Maslenkin
---
.../ManageabilityPkg/ManageabilityPkg.dec |3 +
.../Include/Manageability.dsc |2 +
.../IpmiBlobTransferDxe.inf | 39 +
.../IpmiBlobTransferTestUnitTestsHost.inf | 40 +
.../Include/Protocol/IpmiBlobTransfer.h | 253
.../InternalIpmiBlobTransfer.h| 407 ++
.../IpmiBlobTransferDxe/IpmiBlobTransferDxe.c | 872 +
.../UnitTest/IpmiBlobTransferTestUnitTests.c | 1113 +
.../Universal/IpmiBlobTransferDxe/Readme.md | 24 +
9 files changed, 2753 insertions(+)
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/IpmiBlobTransferDxe.inf
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/UnitTest/IpmiBlobTransferTestUnitTestsHost.inf
create mode 100644
Features/ManageabilityPkg/Include/Protocol/IpmiBlobTransfer.h
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/InternalIpmiBlobTransfer.h
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/IpmiBlobTransferDxe.c
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/UnitTest/IpmiBlobTransferTestUnitTests.c
create mode 100644
Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/Readme.md
diff --git a/Features/ManageabilityPkg/ManageabilityPkg.dec
b/Features/ManageabilityPkg/ManageabilityPkg.dec
index eb0ee67cba..dc1d00162c 100644
--- a/Features/ManageabilityPkg/ManageabilityPkg.dec
+++ b/Features/ManageabilityPkg/ManageabilityPkg.dec
@@ -4,6 +4,7 @@
# those are related to the platform management.
#
# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -58,6 +59,8 @@
gEdkiiPldmProtocolGuid= { 0x60997616, 0xDB70, 0x4B5F, {
0x86, 0xA4, 0x09, 0x58, 0xA3, 0x71, 0x47, 0xB4 } }
gEdkiiPldmSmbiosTransferProtocolGuid = { 0xFA431C3C, 0x816B, 0x4B32, {
0xA3, 0xE0, 0xAD, 0x9B, 0x7F, 0x64, 0x27, 0x2E } }
gEdkiiMctpProtocolGuid= { 0xE93465C1, 0x9A31, 0x4C96, {
0x92, 0x56, 0x22, 0x0A, 0xE1, 0x80, 0xB4, 0x1B } }
+ ## Include/Protocol/IpmiBlobTransfer.h
+ gEdkiiIpmiBlobTransferProtocolGuid= { 0x05837c75, 0x1d65, 0x468b, {
0xb1, 0xc2, 0x81, 0xaf, 0x9a, 0x31, 0x5b, 0x2c } }
[PcdsFixedAtBuild]
## This value is the MCTP Interface source and destination endpoint ID for
transmiting MCTP message.
diff --git a/Features/ManageabilityPkg/Include/Manageability.dsc
b/Features/ManageabilityPkg/Include/Manageability.dsc
index 2e410df9ba..aae343a733 100644
--- a/Features/ManageabilityPkg/Include/Manageability.dsc
+++ b/Features/ManageabilityPkg/Include/Manageability.dsc
@@ -2,6 +2,7 @@
# Common libraries for Manageabilty Package
#
# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -37,6 +38,7 @@
[Components.X64, Components.AARCH64]
!if gManageabilityPkgTokenSpaceGuid.PcdManageabilityDxeIpmiEnable == TRUE
ManageabilityPkg/Universal/IpmiProtocol/Dxe/IpmiProtocolDxe.inf
+ ManageabilityPkg/Universal/IpmiBlobTransferDxe/IpmiBlobTransferDxe.inf
!endif
[Components.X64]
diff --git
a/Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/IpmiBlobTransferDxe.inf
b/Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/IpmiBlobTransferDxe.inf
new file mode 100644
index 00..108f4bb5f8
--- /dev/null
+++
b/Features/ManageabilityPkg/Universal/IpmiBlobTransferDxe/IpmiBlobTransferDxe.inf
@@ -0,0 +1,39 @@
+## @file
+# IPMI Blob Transfer Protocol DXE Driver.
+#
+# Copyright (c) 2022-2024, NVIDIA CORPORATION & AFFILIATES. All rights
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+[Defines]
+ INF_VERSION= 0x00010005
+ BASE_NAME = IpmiBlobTransferDxe
+ FILE_GUID = 6357c804-78bb-4b0c-abdf-c75df942f319
+ MODULE_TYPE= DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT= IpmiBlobTransferDxeDriverEntryPoint
+
+[Sources.common]
+ IpmiBlobTransferDxe.c
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ IpmiLib
+ MemoryAllocationLib
+ PcdLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ ManageabilityPkg/ManageabilityPkg.dec
+
+[Protocols]
+ gEdkiiIpmiBlobTransferProtocolGuid
+
+[Depex]
+ TRUE
diff --git
Re: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: introduce RedfishBootstrapAccountDxe
Hi Nickle, I have one more question to discuss regarding this driver. We have a bootstrap account and creation of this account controlled by RedfishCredentialDxe driver in RedfishPkg. But deletion of that bootstrap account is moved to RedfishClientPkg. What if we have another Redfish Client or some customer service which uses RedfishPkg for the communication. Architecturally it is allowed. But then RedfishBootstrapAccountDxe module would delete account just based on the RedfishClientPkg needs. Maybe we should consider moving RedfishBootstrapAccountDxe driver to RedfishPkg and have some register mechanism which will be used by interested drivers to notify that they finished their job and after that RedfishBootstrapAccountDxe driver would delete an account. What do you think? Thank you, Igor -Original Message- From: Nickle Wang Sent: Tuesday, May 14, 2024 8:40 AM To: devel@edk2.groups.io; abner.ch...@amd.com; Igor Kulchytskyy Cc: Nick Ramirez Subject: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: introduce RedfishBootstrapAccountDxe **CAUTION: The e-mail below is from an external source. Please exercise caution before opening attachments, clicking links, or following guidance.** Hi Abner, > Ok, then I don't have the problem with invoking GetAuthInfo again. However, I > will suggest to add more description in GetAuthInfo function header, mention > that > we will keep the auth info in EFI variable until exist boot service. > Also, give some more descriptions on the code you invoke to GetAuthInfo. Thanks for your comment. I add descriptions to explain above before calling GetAuthInfo(). Version 2 path is here: https://edk2.groups.io/g/devel/message/118889 Regards, Nickle > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chang, Abner > via groups.io > Sent: Tuesday, April 23, 2024 3:42 PM > To: Nickle Wang ; Igor Kulchytskyy ; > devel@edk2.groups.io > Cc: Nick Ramirez > Subject: Re: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: > introduce RedfishBootstrapAccountDxe > > External email: Use caution opening links or attachments > > > [AMD Official Use Only - General] > > > -Original Message- > > From: Nickle Wang > > Sent: Tuesday, April 23, 2024 3:09 PM > > To: Igor Kulchytskyy ; Chang, Abner > > ; devel@edk2.groups.io > > Cc: Nick Ramirez > > Subject: RE: [EXTERNAL] RE: [edk2-redfish-client][PATCH] RedfishClientPkg: > > introduce RedfishBootstrapAccountDxe > > > > [AMD Official Use Only - General] > > > > Caution: This message originated from an External Source. Use proper > > caution when opening attachments, clicking links, or responding. > > > > > > Hi Igor, Abner, > > > > Thanks for your review. Please allow me to answer your questions together. > > > > > 1. We suppose acquire the credential before we start to communicate > > > with > > Redfish. Will Redfish credential driver create another bootstrap > > account here after provisioning? > > No, according to the RedfishPlatformCredentialIpmiLib implementation, > > Redfish credential driver requests credential from BMC and will keep > > it for later use. So only one credential is requested for BIOS Redfish > > feature drivers during POST time. > Ok, then I don't have the problem with invoking GetAuthInfo again. However, I > will suggest to add more description in GetAuthInfo function header, mention > that > we will keep the auth info in EFI variable until exist boot service. > Also, give some more descriptions on the code you invoke to GetAuthInfo. > > > > > > 2. And why do we delete the credential after provisioning? How about > > > the > > later Redfish property updating process? > > In this driver, we listen to "AfterProvisioning" event. And this is > > the event triggered after Redfish feature driver finish all jobs. > > There is no feature driver which gets executed after this event. And > > since we finished all Redfish operations, we remove this account on BMC. > Then this makes sense to me now. > > > > > > Why do we need to delete those credentials? According to spec BMC > > > should > > delete the bootstrap credentials automatically on host or service reset. > > Yes, bootstrap credentials get deleted on host reset. In practice, > > server in datacenter usually takes long time running under OS before it gets > rebooted. > > The bootstrap credentials are exposed to end user at > > "/redfish/v1/AccountService/Accounts". I got report that there is > > concern for end user to see this unused account. > This sounds to me reasonable as we will give bootstrap c
[edk2-devel] [edk2-platforms] Platform/Loongson: Fix compile error
QemuFwCfgLibMmio has been removed, using the latest FwCfgLib to fix compilation errors Cc: Bibo Mao Cc: Chao Li Cc: Gerd Hoffmann Signed-off-by: Xianglai Li --- Platform/Loongson/LoongArchQemuPkg/Loongson.dsc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc index 58aa16d3a9..7e891ad225 100644 --- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc @@ -180,7 +180,7 @@ # VirtioLib| OvmfPkg/Library/VirtioLib/VirtioLib.inf FrameBufferBltLib| MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf - QemuFwCfgLib | OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf + QemuFwCfgLib | OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf DebugLib | MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf PeiServicesLib | MdePkg/Library/PeiServicesLib/PeiServicesLib.inf VariableFlashInfoLib | MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf @@ -257,7 +257,7 @@ ReportStatusCodeLib | MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf UefiScsiLib | MdePkg/Library/UefiScsiLib/UefiScsiLib.inf ExtractGuidedSectionLib | MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf - QemuFwCfgLib | OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf + QemuFwCfgLib | OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf PciPcdProducerLib| OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf [LibraryClasses.common.DXE_DRIVER] @@ -269,7 +269,7 @@ CpuExceptionHandlerLib | UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf ExtractGuidedSectionLib | MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf QemuFwCfgS3Lib | OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf - QemuFwCfgLib | OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf + QemuFwCfgLib | OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf PciPcdProducerLib| OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf PciExpressLib| MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf AcpiPlatformLib | OvmfPkg/Library/AcpiPlatformLib/DxeAcpiPlatformLib.inf -- 2.39.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118915): https://edk2.groups.io/g/devel/message/118915 Mute This Topic: https://groups.io/mt/10631/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
回复: [edk2-devel] 回复: [edk2-devel][edk2-stable202405] [PATCH v2 00/13] NetworkPkg: CVE-2023-45236 and CVE-2023-45237
Doug: Thanks for your clarification. For the changes in MdePkg and EmulatorPkg, I have no comments. Reviewed-by: Liming Gao Thanks Liming 发件人: Doug Flick via groups.io 发送时间: 2024年5月10日 2:26 收件人: gaoliming ; devel@edk2.groups.io 主题: Re: [edk2-devel] 回复: [edk2-devel][edk2-stable202405] [PATCH v2 00/13] NetworkPkg: CVE-2023-45236 and CVE-2023-45237 >From the two CVE patches there should be no functional differences to a >platform assuming the platform provides them with a RNG implementation and >HASH2 implementation. The "NetworkPkg:: SECURITY PATCH CVE-2023-45237" change simply get's it's random numbers from outside of the NetworkPkg and makes it a platform decision. The "NetworkPkg: TcpDxe: SECURITY PATCH CVE-2023-45236" changes how the TCP Isn number is generated and puts the platform in compliance with the relevant specification. There is a functional change with "SecurityPkg: RngDxe: Remove incorrect limitation on GetRng" as this will now allow a caller to call less than 32 bytes. The other changes are unit tests and platform integration changes. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118897): https://edk2.groups.io/g/devel/message/118897 Mute This Topic: https://groups.io/mt/106106240/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel][edk2-stable202405][PATCH] MdeModulePkg: Potential UINT32 overflow in S3 ResumeCount
I agree it should catch edk2-stable202405
Mike
> -Original Message-
> From: gaoliming
> Sent: Thursday, May 9, 2024 12:24 AM
> To: devel@edk2.groups.io; Pakkirisamy, ShanmugavelX
>
> Cc: Liu, Zhiguang ; Bi, Dandan ;
> 'Leif Lindholm' ; 'Andrew Fish' ;
> Kinney, Michael D
> Subject: 回复: [edk2-devel][edk2-stable202405][PATCH] MdeModulePkg: Potential
> UINT32 overflow in S3 ResumeCount
>
> Reviewed-by: Liming Gao
>
> This is a security fix. So, I think it should catch this stable tag 202405
>
> Thanks
> Liming
> > -邮件原件-
> > 发件人: devel@edk2.groups.io 代表 Pakkirisamy
> > ShanmugavelX
> > 发送时间: 2024年5月6日 17:53
> > 收件人: devel@edk2.groups.io
> > 抄送: Shanmugavel Pakkirisamy ;
> > Zhiguang Liu ; Dandan Bi ;
> > Liming Gao
> > 主题: [edk2-devel] [PATCH] MdeModulePkg: Potential UINT32 overflow in S3
> > ResumeCount
> >
> > From: Shanmugavel Pakkirisamy
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4677
> >
> > Attacker able to modify physical memory and ResumeCount.
> > System will crash/DoS when ResumeCount reaches its MAX_UINT32.
> >
> > Cc: Zhiguang Liu
> > Cc: Dandan Bi
> > Cc: Liming Gao
> >
> > Signed-off-by: Pakkirisamy ShanmugavelX
> >
> > ---
> >
> > MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePe
> > rformancePei.c | 14 +-
> > 1 file changed, 9 insertions(+), 5 deletions(-)
> >
> > diff --git
> > a/MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/Firmware
> > PerformancePei.c
> > b/MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/Firmware
> > PerformancePei.c
> > index 2f2b2a80b2..1035ed8640 100644
> > ---
> > a/MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/Firmware
> > PerformancePei.c
> > +++
> > b/MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/Firmware
> > PerformancePei.c
> > @@ -112,11 +112,15 @@ FpdtStatusCodeListenerPei (
> >//
> >S3ResumeTotal = MultU64x32 (AcpiS3ResumeRecord->AverageResume,
> > AcpiS3ResumeRecord->ResumeCount);
> >AcpiS3ResumeRecord->ResumeCount++;
> > - AcpiS3ResumeRecord->AverageResume = DivU64x32 (S3ResumeTotal +
> > AcpiS3ResumeRecord->FullResume, AcpiS3ResumeRecord->ResumeCount);
> > -
> > - DEBUG ((DEBUG_INFO, "FPDT: S3 Resume Performance - ResumeCount
> > = %d\n", AcpiS3ResumeRecord->ResumeCount));
> > - DEBUG ((DEBUG_INFO, "FPDT: S3 Resume Performance - FullResume
> > = %ld\n", AcpiS3ResumeRecord->FullResume));
> > - DEBUG ((DEBUG_INFO, "FPDT: S3 Resume Performance - AverageResume
> > = %ld\n", AcpiS3ResumeRecord->AverageResume));
> > + if (AcpiS3ResumeRecord->ResumeCount > 0) {
> > +AcpiS3ResumeRecord->AverageResume = DivU64x32 (S3ResumeTotal +
> > AcpiS3ResumeRecord->FullResume, AcpiS3ResumeRecord->ResumeCount);
> > +DEBUG ((DEBUG_INFO, "\nFPDT: S3 Resume Performance -
> > AverageResume = 0x%x\n", AcpiS3ResumeRecord->AverageResume));
> > + }
> > + else {
> > +DEBUG ((DEBUG_ERROR, "\nFPDT: S3 ResumeCount reaches the
> > MAX_UINT32 value. S3 ResumeCount record reset to Zero."));
> > + }
> > + DEBUG ((DEBUG_INFO, "FPDT: S3 Resume Performance - ResumeCount =
> > 0x%x\n", AcpiS3ResumeRecord->ResumeCount));
> > + DEBUG ((DEBUG_INFO, "FPDT: S3 Resume Performance - FullResume=
> > 0x%x\n", AcpiS3ResumeRecord->FullResume));
> >
> >//
> >// Update S3 Suspend Performance Record.
> > --
> > 2.45.0.windows.1
> >
> >
> >
> >
> >
>
>
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Re: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: introduce RedfishBootstrapAccountDxe
Hi Abner, > Ok, then I don't have the problem with invoking GetAuthInfo again. However, I > will suggest to add more description in GetAuthInfo function header, mention > that > we will keep the auth info in EFI variable until exist boot service. > Also, give some more descriptions on the code you invoke to GetAuthInfo. Thanks for your comment. I add descriptions to explain above before calling GetAuthInfo(). Version 2 path is here: https://edk2.groups.io/g/devel/message/118889 Regards, Nickle > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chang, Abner > via groups.io > Sent: Tuesday, April 23, 2024 3:42 PM > To: Nickle Wang ; Igor Kulchytskyy ; > devel@edk2.groups.io > Cc: Nick Ramirez > Subject: Re: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: > introduce RedfishBootstrapAccountDxe > > External email: Use caution opening links or attachments > > > [AMD Official Use Only - General] > > > -Original Message- > > From: Nickle Wang > > Sent: Tuesday, April 23, 2024 3:09 PM > > To: Igor Kulchytskyy ; Chang, Abner > > ; devel@edk2.groups.io > > Cc: Nick Ramirez > > Subject: RE: [EXTERNAL] RE: [edk2-redfish-client][PATCH] RedfishClientPkg: > > introduce RedfishBootstrapAccountDxe > > > > [AMD Official Use Only - General] > > > > Caution: This message originated from an External Source. Use proper > > caution when opening attachments, clicking links, or responding. > > > > > > Hi Igor, Abner, > > > > Thanks for your review. Please allow me to answer your questions together. > > > > > 1. We suppose acquire the credential before we start to communicate > > > with > > Redfish. Will Redfish credential driver create another bootstrap > > account here after provisioning? > > No, according to the RedfishPlatformCredentialIpmiLib implementation, > > Redfish credential driver requests credential from BMC and will keep > > it for later use. So only one credential is requested for BIOS Redfish > > feature drivers during POST time. > Ok, then I don't have the problem with invoking GetAuthInfo again. However, I > will suggest to add more description in GetAuthInfo function header, mention > that > we will keep the auth info in EFI variable until exist boot service. > Also, give some more descriptions on the code you invoke to GetAuthInfo. > > > > > > 2. And why do we delete the credential after provisioning? How about > > > the > > later Redfish property updating process? > > In this driver, we listen to "AfterProvisioning" event. And this is > > the event triggered after Redfish feature driver finish all jobs. > > There is no feature driver which gets executed after this event. And > > since we finished all Redfish operations, we remove this account on BMC. > Then this makes sense to me now. > > > > > > Why do we need to delete those credentials? According to spec BMC > > > should > > delete the bootstrap credentials automatically on host or service reset. > > Yes, bootstrap credentials get deleted on host reset. In practice, > > server in datacenter usually takes long time running under OS before it gets > rebooted. > > The bootstrap credentials are exposed to end user at > > "/redfish/v1/AccountService/Accounts". I got report that there is > > concern for end user to see this unused account. > This sounds to me reasonable as we will give bootstrap credential a high > privilege > to update Redfish resource. Leave this information in Account service seems > not a > good idea. > > Thanks > Abner > > > > > So, I create this driver to allows us to remove bootstrap account at > > BMC after we finish Redfish jobs. And this also release the BMC > > account resource since this account won't be used for a long period of time. > > > > Regards, > > Nickle > > > > > -Original Message- > > > From: Igor Kulchytskyy > > > Sent: Monday, April 22, 2024 11:03 PM > > > To: Chang, Abner ; Nickle Wang > > > ; devel@edk2.groups.io > > > Cc: Nick Ramirez > > > Subject: RE: [EXTERNAL] RE: [edk2-redfish-client][PATCH] RedfishClientPkg: > > > introduce RedfishBootstrapAccountDxe > > > > > > External email: Use caution opening links or attachments > > > > > > > > > Hi Nickle and Abner, > > > I also have the same question as Abner. > > > Why do we need to delete those credentials? > > > According to spec BMC should delete the bootstrap credentials > > > autom
[edk2-devel] [edk2-redfish-client][PATCH v2] RedfishClientPkg: introduce RedfishBootstrapAccountDxe
-Introduce RedfishBootstrapAccountDxe to delete bootstrap
account from /redfish/v1/AccountService/Accounts after BIOS
finished all Redfish jobs. The bootstrap account won't be
available to other application. So deleting bootstrap account
helps to release resource at BMC.
- After bootstrap account is deleted at BMC, the Redfish service
instance is no longer usable. Close Redfish service instance to
release the HTTP connection between BIOS and BMC.
Signed-off-by: Nickle Wang
Cc: Abner Chang
Cc: Igor Kulchytskyy
Cc: Nick Ramirez
---
.../RedfishClientComponents.dsc.inc | 1 +
.../RedfishBootstrapAccountDxe.inf| 53 +++
.../RedfishBootstrapAccountDxe.h | 58 +++
.../RedfishBootstrapAccountDxe.c | 337 ++
RedfishClientPkg/RedfishClient.fdf.inc| 1 +
5 files changed, 450 insertions(+)
create mode 100644
RedfishClientPkg/RedfishBootstrapAccountDxe/RedfishBootstrapAccountDxe.inf
create mode 100644
RedfishClientPkg/RedfishBootstrapAccountDxe/RedfishBootstrapAccountDxe.h
create mode 100644
RedfishClientPkg/RedfishBootstrapAccountDxe/RedfishBootstrapAccountDxe.c
diff --git a/RedfishClientPkg/RedfishClientComponents.dsc.inc
b/RedfishClientPkg/RedfishClientComponents.dsc.inc
index 42fc0c299..fe5248b62 100644
--- a/RedfishClientPkg/RedfishClientComponents.dsc.inc
+++ b/RedfishClientPkg/RedfishClientComponents.dsc.inc
@@ -20,6 +20,7 @@
RedfishClientPkg/HiiToRedfishMemoryDxe/HiiToRedfishMemoryDxe.inf
RedfishClientPkg/HiiToRedfishBootDxe/HiiToRedfishBootDxe.inf
RedfishClientPkg/HiiToRedfishBiosDxe/HiiToRedfishBiosDxe.inf
+ RedfishClientPkg/RedfishBootstrapAccountDxe/RedfishBootstrapAccountDxe.inf
!endif
#
# Below two modules should be pulled in by build tool.
diff --git
a/RedfishClientPkg/RedfishBootstrapAccountDxe/RedfishBootstrapAccountDxe.inf
b/RedfishClientPkg/RedfishBootstrapAccountDxe/RedfishBootstrapAccountDxe.inf
new file mode 100644
index 0..4073e95f4
--- /dev/null
+++ b/RedfishClientPkg/RedfishBootstrapAccountDxe/RedfishBootstrapAccountDxe.inf
@@ -0,0 +1,53 @@
+## @file
+# This driver deletes bootstrap account in BMC after BIOS Redfish finished
+# all jobs
+#
+# (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+# Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001000b
+ BASE_NAME = RedfishBootstrapAccountDxe
+ FILE_GUID = 87555253-2F7E-45FC-B469-FD35B2E51210
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING= 1.0
+ ENTRY_POINT = RedfishBootstrapAccountEntryPoint
+ UNLOAD_IMAGE = RedfishBootstrapAccountUnload
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ RedfishPkg/RedfishPkg.dec
+ RedfishClientPkg/RedfishClientPkg.dec
+
+[Sources]
+ RedfishBootstrapAccountDxe.h
+ RedfishBootstrapAccountDxe.c
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ MemoryAllocationLib
+ PrintLib
+ RedfishEventLib
+ RedfishFeatureUtilityLib
+ RedfishDebugLib
+ RedfishVersionLib
+ RedfishHttpLib
+ UefiLib
+ UefiBootServicesTableLib
+ UefiRuntimeServicesTableLib
+ UefiDriverEntryPoint
+
+[Protocols]
+ gEdkIIRedfishConfigHandlerProtocolGuid ## CONSUMES ##
+ gEdkIIRedfishCredentialProtocolGuid ## CONSUMES ##
+ gEfiRestExProtocolGuid ## CONSUMES ##
+
+[Depex]
+ gEdkIIRedfishCredentialProtocolGuid
diff --git
a/RedfishClientPkg/RedfishBootstrapAccountDxe/RedfishBootstrapAccountDxe.h
b/RedfishClientPkg/RedfishBootstrapAccountDxe/RedfishBootstrapAccountDxe.h
new file mode 100644
index 0..5262f1e6b
--- /dev/null
+++ b/RedfishClientPkg/RedfishBootstrapAccountDxe/RedfishBootstrapAccountDxe.h
@@ -0,0 +1,58 @@
+/** @file
+ Common header file for RedfishBootstrapAccountDxe driver.
+
+ (C) Copyright 2021-2022 Hewlett Packard Enterprise Development LP
+ Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef REDFISH_BOOTSTRAP_ACCOUNT_DXE_H_
+#define REDFISH_BOOTSTRAP_ACCOUNT_DXE_H_
+
+#include
+#include
+
+//
+// Libraries
+//
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#define REDFISH_BOOTSTRAP_ACCOUNT_DEBUG DEBUG_VERBOSE
+#define REDFISH_MANAGER_ACCOUNT_COLLECTION_URI L"AccountService/Accounts"
+#define REDFISH_URI_LENGTH 128
+
+//
+// Definitions of REDFISH_BOOTSTRAP_ACCOUNT_PRIVATE
+//
+typedef struct {
+ EFI_HANDLE ImageHandle;
+ EFI_HANDLE RestExHandle;
+ REDFISH_SERVICE RedfishService;
+ EFI_EVENTRedfishEvent;
+
Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol
Thanks Nickle. I will help review and verify your patch. On 5/14/2024 8:56 AM, Nickle Wang wrote: Hi Nhi, This task is on my list but with lower priority. I will try to provide version 2 patch for review here by the end of this week. Thanks, Nickle -Original Message- From: Nhi Pham Sent: Monday, May 13, 2024 5:02 PM To: devel@edk2.groups.io; abner.ch...@amd.com; Nickle Wang ; Rebecca Cran Cc: Isaac Oram ; Attar, AbdulLateef (Abdul Lateef) ; Tinh Nguyen Subject: Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol External email: Use caution opening links or attachments On 2/9/2024 11:37 PM, Chang, Abner via groups.io wrote: [AMD Official Use Only - General] Yeah, I forget this patch set and seems we don't have any follow up conversation after below feedbacks from community. https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fedk2 .groups.io%2Fg%2Fdevel%2Fmessage%2F103116=05%7C02%7Cnicklew %40nvi dia.com%7C8b9e1a8a8d044208f8d608dc732b678d%7C43083d15727340c1b7db 39efd 9ccc17a%7C0%7C0%7C638511877469561600%7CUnknown%7CTWFpbGZsb3d8 eyJWIjoiM C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7 C%7C =N4eDH668lBSFxq9r81QrhMgpULvht8isrrEI9lipVKc%3D=0 https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fedk2 .groups.io%2Fg%2Fdevel%2Fmessage%2F103087=05%7C02%7Cnicklew %40nvi dia.com%7C8b9e1a8a8d044208f8d608dc732b678d%7C43083d15727340c1b7db 39efd 9ccc17a%7C0%7C0%7C638511877469569817%7CUnknown%7CTWFpbGZsb3d8 eyJWIjoiM C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7 C%7C =7p0BHb8RFRapFyygr35u0hQBK2bQwKPSypBaUi6cMIQ%3D=0 So Nickle, does NV still has the plan to upstream IPMI blob edk2 implementation? We should keep driving upstream the implementation as industry needs it to incorporate with OpenBMC. Hi Rebessa, As we are on Chinese New Year holidays now, please expect the delay response. Thanks Abner Hi Nickle and Abner, May I know the status of upstreaming the IPMI Blob Transfer Protocol? I'm planning to upstream the SMBIOS transfer to OpenBMC by leveraging this protocol. Thanks, Nhi -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118879): https://edk2.groups.io/g/devel/message/118879 Mute This Topic: https://groups.io/mt/98212643/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
