Several Intel CPU models with TSX technology (HLE & RTM features) are
affected by the vulnerability TAA[1]. One of the mitigation methods
for TAA is to disable TSX support on the host system. For that purpose,
in 2021, Intel published a microcode update to disable TSX. Linux kernel
also disables TS
I just realized that I should not modify the x86_features.xml file
directly.
I have to fix this issue elsewhere, probably in
the sync_qemu_features_i386.py
script or in the libvirt code that reads the MSRs registers.
QEMU specifies vmx-apicv-xapic as 1st bit of the register 0x48B
(IA32_VMX_PROC
