Hello RIOT developers,
on the weekend I tried the STM32L073 support in conjunction with spi
support but I had no success.
I wanted to test this on a board equiped with a STM32L073CZ MCU (48pin
TQFP). Therefore I made a copy of the linker file (stm32l073rz.ld ->
stm32l073cz.ld) and I altered the boards Makefile.include file to
support this derivate (export CPU_MODEL = stm32l073cz).
I enabled spi support in the feature list inside of the Makefile
(FEATURES_PROVIDED += periph_spi) and altered the device descriptor in
the periph_conf.h file but I got no hardware response on the analyzer
when I tried to run the second spi interface (SPI2). The MCU does nothing.
/**
* @nameSPI configuration
*
* @noteThe spi_divtable is auto-generated from
* `cpu/stm32_common/dist/spi_divtable/spi_divtable.c`
* @{
*/
static const uint8_t spi_divtable[2][4] = {
{ /* for APB1 @ 800Hz */
5, /* -> 125000Hz */
3, /* -> 50Hz */
2, /* -> 100Hz */
0 /* -> 400Hz */
},
{ /* for APB2 @ 800Hz */
5, /* -> 125000Hz */
3, /* -> 50Hz */
2, /* -> 100Hz */
0 /* -> 400Hz */
}
};
static const spi_conf_t spi_config[] = {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af= GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
{
.dev = SPI2,
.mosi_pin = GPIO_PIN(PORT_B, 15),
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF0,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
}
};
#define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
/** @} */
The application I tried to run was the tests/periph_spi test application.
Do I have to enable some other features or dependencies to get the spi
interface running?
As far as I have seen the spi driver was rewritten since the last
release and I tried to configure it as described on the riot-os.org/api
web page.
Any thoughts what could be wrong with this configuration?
Thanks a lot!
Regards,
Neo
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