Hello,
I've got a couple of questions about the fbcon implementation in detail, in
order to cleanup my code and create a mergable patch for review.
For the graphic text output, I've implemented two functions _RPI_initvideo and
_RPI_outch, used to print chars to graphic. They are declared in
On June 2, 2015 5:45:07 PM EDT, Pavel Pisa ppisa4li...@pikron.com wrote:
Hello Yang Qiao,
On Tuesday 02 of June 2015 22:58:09 QIAO YANG wrote:
For the graphic text output, I've implemented two functions
_RPI_initvideo
and _RPI_outch, used to print chars to graphic. They are declared in
bsp.h
Hello Yang Qiao,
On Tuesday 02 of June 2015 22:58:09 QIAO YANG wrote:
For the graphic text output, I've implemented two functions _RPI_initvideo
and _RPI_outch, used to print chars to graphic. They are declared in bsp.h
and implemented in outch.c as we've done in i386 bsp.
1. The
Hi,
Alan, your suggestion has resulted in much improvement
arm_control=0x1000
This has simply worked! Looks like the other cores were taking up plenty of
time.
I was aware from references that the other cores run a WFI, but ya, did not
get its impact.
Time for each dhrystone has reduced to 7
From what I saw, they have to be enabled separately. Cache/mmu are disabled
upon reset.
On 2 Jun 2015 16:59, Hesham ALMatary heshamelmat...@gmail.com wrote:
Hi,
Aren't the MMU/Caches enabled by default for RPi [1]?
[1]
On June 2, 2015 7:29:52 AM EDT, Hesham ALMatary heshamelmat...@gmail.com
wrote:
Hi,
Aren't the MMU/Caches enabled by default for RPi [1]?
Yes but I recall that the setup is different on the Pi2 and Alan disabled the
code to to work at all.
[1]
HI,
I tried running the dhrystone benchmark with some changes for cache/mmu set
up.
However, the output shows a reduction in performance.
The time to run through the dhrystone has increased from 12 to 13 and
dhrystones run per second decreased.
According to this result, things were better with
On Tue, Jun 2, 2015 at 12:41 PM, Rohini Kulkarni krohini1...@gmail.com wrote:
From what I saw, they have to be enabled separately. Cache/mmu are disabled
upon reset.
For the existing Raspberry BSP [1] there's a code for MMU/Cache init,
however I don't know about Pi2 and where its code is.
[1]
On June 2, 2015 5:58:33 AM EDT, Rohini Kulkarni krohini1...@gmail.com wrote:
HI,
I tried running the dhrystone benchmark with some changes for cache/mmu
set up.
However, the output shows a reduction in performance.
The time to run through the dhrystone has increased from 12 to 13 and
Hello all,
Premysl Houdek has prepared new and hopefully near ready
complete header files for TMS570LS3137 microcontroller.
They are based on PDF documentation and license is
RTEMS compatible. The scripts used during process can be
found in
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