Plesae check all obsoletes through users ml.
On Thu, Aug 27, 2015 at 5:54 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
Hi
Another one on my chopping block. I don't see the official
not recommended for new designs language but I also don't
seen much hinting an update in five years
On Thu, Aug 27, 2015 at 6:38 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 8/27/2015 4:15 PM, Martin Galvan wrote:
On Thu, Aug 27, 2015 at 6:10 PM, Daniel Gutson
daniel.gut...@tallertechnologies.com wrote:
Maybe we can just provide the list until we provide the fixes? MartÃn?
On Fri, Aug 28, 2015 at 12:20 PM, Gedare Bloom ged...@gwu.edu wrote:
Could you please open a ticket on our trac to describe the problem
this fixes, and add closes #. to your patch commit message?
Additionally, please clarify which architecture this applies to. I
suspect this is for
On Fri, Aug 28, 2015 at 12:33 PM, sudarshan.rajagopalan
sudarshan.rajagopa...@vecna.com wrote:
On 2015-08-27 17:06, Joel Sherrill wrote:
On 8/27/2015 3:58 PM, Daniel Gutson wrote:
On Thu, Aug 27, 2015 at 3:53 PM, sudarshan.rajagopalan
sudarshan.rajagopa...@vecna.com wrote:
Hey guys,
I
Could you please open a ticket on our trac to describe the problem
this fixes, and add closes #. to your patch commit message?
Thanks,
Gedare
On Thu, Aug 27, 2015 at 4:33 PM, sudarshan.rajagopalan
sudarshan.rajagopa...@vecna.com wrote:
Patch attached here for ARMv7M Exception Handler. Looks
On 2015-08-27 17:06, Joel Sherrill wrote:
On 8/27/2015 3:58 PM, Daniel Gutson wrote:
On Thu, Aug 27, 2015 at 3:53 PM, sudarshan.rajagopalan
sudarshan.rajagopa...@vecna.com wrote:
Hey guys,
I was working on the exception handler for the CPU hard fault.
Managed to
register the fatal error user
On 2015-08-28 11:37, Daniel Gutson wrote:
On Fri, Aug 28, 2015 at 12:33 PM, sudarshan.rajagopalan
sudarshan.rajagopa...@vecna.com wrote:
On 2015-08-27 17:06, Joel Sherrill wrote:
On 8/27/2015 3:58 PM, Daniel Gutson wrote:
On Thu, Aug 27, 2015 at 3:53 PM, sudarshan.rajagopalan
On 2015-08-28 11:30, Daniel Gutson wrote:
On Fri, Aug 28, 2015 at 12:20 PM, Gedare Bloom ged...@gwu.edu wrote:
Could you please open a ticket on our trac to describe the problem
this fixes, and add closes #. to your patch commit message?
Hi Gedare, Sure will do!
Additionally, please
On 2015-08-28 12:18, sudarshan.rajagopalan wrote:
On 2015-08-28 11:30, Daniel Gutson wrote:
On Fri, Aug 28, 2015 at 12:20 PM, Gedare Bloom ged...@gwu.edu wrote:
Could you please open a ticket on our trac to describe the problem
this fixes, and add closes #. to your patch commit message?
On Fri, Aug 28, 2015 at 2:31 PM, sudarshan.rajagopalan
sudarshan.rajagopa...@vecna.com wrote:
On 2015-08-28 12:18, sudarshan.rajagopalan wrote:
On 2015-08-28 11:30, Daniel Gutson wrote:
On Fri, Aug 28, 2015 at 12:20 PM, Gedare Bloom ged...@gwu.edu wrote:
Could you please open a ticket on
On exception entry, _ARMV7M_Exception_default stores the previous Stack Pointer
in a CPU_Exception_frame. The SP can be MSP or PSP, depending on the mode
in which the exception was taken. To know this we must check the value of LR.
Right now the code checks whether it should store MSP or PSP by
On 2015-08-28 17:18, Martin Galvan wrote:
On Thu, Aug 27, 2015 at 3:53 PM, sudarshan.rajagopalan
sudarshan.rajagopalan at vecna.com wrote:
The instruction cmn r2, #3\n in line 31 basically compares the Link
Register(lr) to value 0xFFFD (negative #3, because CMN negates the
RHS
and compares
On Thu, Aug 27, 2015 at 3:53 PM, sudarshan.rajagopalan
sudarshan.rajagopalan at vecna.com wrote:
The instruction cmn r2, #3\n in line 31 basically compares the Link
Register(lr) to value 0xFFFD (negative #3, because CMN negates the RHS
and compares with LHS) and chooses MSP or PSP in the
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