Re: Which threads execute _Thread_Handler ?

Also, it's weird that neither of the code breaks on setting a breakpoint at _Thread_Load_environment for the threads that have 'Tasks' as their entry function. On Fri, Dec 11, 2020 at 1:07 PM Richi Dubey wrote: > Thanks for your replies. > > Great suggestion about setting up a breakpoint at

Re: Which threads execute _Thread_Handler ?

Thanks for your replies. Great suggestion about setting up a breakpoint at _Thread_Handler. After setting the breakpoint, the code run by Strong_APA does not break, whereas the default scheduler's code does break: Default Scheduler (That executes correctly without

Re: What are level in the thread?

Dear Dr. Sherrill, Thank you for your answer. Your explanation has been helpful. It would seem that we need a discussion of the types of critical sections, > when they are used, and the difference between uniprocessor and symmetric > processing configurations. It'd be really helpful if someone

Re: [rtems-docs commit] c-user: Generate Timer Manager documentation

On 11/12/2020 01:35, Chris Johns wrote: Suggestions? We could add a script which performs some post processing after creation the of the release branches. What about https://www.rtems.org/support/bugs.html If a redirect can be set up we could insulate these links from the location they

Re: [PATCH v1 0/1] bsps/arm: Fix MMU small pages support

On 10/12/2020 17:19, jan.som...@dlr.de wrote: If there are no objections, could someone please push the changes? Sorry for the delay, I checked them in. -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89

Re: [PATCH 1/2] tm27: Use generic cpu index accessor

On 10/12/2020 21:42, Kinsey Moore wrote: The arm_cp15 function for accessing the current CPU index is specific to ARMv7 while this header is used for ARMv8 as well. Instead, use a generic accessor that is part of the standard CPU API. I am fine with this fix, however, this is basically now the

Re: [PATCH 2/2] bsps/gicv3: Resolve build warnings on 64bit

On 10/12/2020 21:42, Kinsey Moore wrote: --- bsps/shared/dev/irq/arm-gicv3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bsps/shared/dev/irq/arm-gicv3.c b/bsps/shared/dev/irq/arm-gicv3.c index 520a728170..db0ad5b952 100644 --- a/bsps/shared/dev/irq/arm-gicv3.c

Re: [rtems-docs commit] c-user: Generate Timer Manager documentation

On 10/12/20 4:41 pm, Sebastian Huber wrote: > On 10/12/2020 03:24, Chris Johns wrote: > >> On 9/12/20 7:20 pm, Sebastian Huber wrote: >>> Module:    rtems-docs >>> Branch:    master >>> Commit:    d716c79070901195912526c6e49d43defad00bdd >>> Changeset: >>>

Re: CMake support

On Thu, Dec 10, 2020 at 5:58 PM Chris Johns wrote: > On 11/12/20 8:51 am, Robin Müller wrote: > > Hello, > > > > I created a repository on github for the first version of what a CMake > support > > for RTEMS might look like: > > > > https://github.com/rmspacefish/rtems-cmake > >

Re: CMake support

On 11/12/20 8:51 am, Robin Müller wrote: > Hello, > > I created a repository on github for the first version of what a CMake support > for RTEMS might look like: > > https://github.com/rmspacefish/rtems-cmake > > Awesome and thanks. :) > I tried to

Re: CMake support

Hello, I created a repository on github for the first version of what a CMake support for RTEMS might look like: https://github.com/rmspacefish/rtems-cmake I tried to extract generic components like determining library paths into functions (RTEMSGeneric.cmake) and there is a hardware specific

[PATCH 1/2] tm27: Use generic cpu index accessor

The arm_cp15 function for accessing the current CPU index is specific to ARMv7 while this header is used for ARMv8 as well. Instead, use a generic accessor that is part of the standard CPU API. --- bsps/include/dev/irq/arm-gic-tm27.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)

[PATCH 2/2] bsps/gicv3: Resolve build warnings on 64bit

--- bsps/shared/dev/irq/arm-gicv3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bsps/shared/dev/irq/arm-gicv3.c b/bsps/shared/dev/irq/arm-gicv3.c index 520a728170..db0ad5b952 100644 --- a/bsps/shared/dev/irq/arm-gicv3.c +++ b/bsps/shared/dev/irq/arm-gicv3.c @@ -134,13

RE: [PATCH v1 0/1] bsps/arm: Fix MMU small pages support

If there are no objections, could someone please push the changes? Cheers, Jan > -Original Message- > From: Sommer, Jan > Sent: Tuesday, November 24, 2020 9:41 AM > To: devel@rtems.org > Cc: Sommer, Jan > Subject: [PATCH v1 0/1] bsps/arm: Fix MMU small pages support > > Following

[PATCH] arm: Optimize arm_interrupt_disable()

Update #4202. --- cpukit/score/cpu/arm/include/rtems/score/cpu.h | 13 +++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpu.h b/cpukit/score/cpu/arm/include/rtems/score/cpu.h index 8a8e8cc617..e5b23e7100 100644 ---

[PATCH 1/2] bsps: Add GICv3 arm_gic_irq_processor_count()

Update #4202. --- bsps/include/dev/irq/arm-gic-irq.h | 7 +-- bsps/shared/dev/irq/arm-gicv2.c| 7 +++ bsps/shared/dev/irq/arm-gicv3.c| 27 +++ 3 files changed, 35 insertions(+), 6 deletions(-) diff --git a/bsps/include/dev/irq/arm-gic-irq.h

[PATCH 2/2] bsps: Remove gicvx_interrupt_dispatch()

Avoid one level of indirection. Update #4202. --- bsps/aarch64/shared/irq/irq-arm-gicvx-aarch64.c | 5 - bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c | 5 - bsps/include/dev/irq/arm-gic-irq.h | 6 -- bsps/shared/dev/irq/arm-gicv2.c | 2 +-

RE: [PATCH v2] bsps: Fix GICv3 arm_gic_trigger_sgi()

-Original Message- From: Sebastian Huber Sent: Thursday, December 10, 2020 07:31 To: Kinsey Moore ; devel@rtems.org Subject: Re: [PATCH v2] bsps: Fix GICv3 arm_gic_trigger_sgi() > I removed the filter feature here: > > https://lists.rtems.org/pipermail/devel/2020-December/063707.html >

Re: [PATCH v2] bsps: Fix GICv3 arm_gic_trigger_sgi()

On 10/12/2020 14:26, Kinsey Moore wrote: I think my processor filter todo just above this code will need to be addressed along with this change for correct behavior on non-core 0 runs of tm27. Yes, I thought about non-core 0 test runs too, however, I guess a lot more things will pop up if

RE: [PATCH v2] bsps: Fix GICv3 arm_gic_trigger_sgi()

-Original Message- From: Sebastian Huber Sent: Wednesday, December 9, 2020 23:46 To: Kinsey Moore ; devel@rtems.org Subject: Re: [PATCH v2] bsps: Fix GICv3 arm_gic_trigger_sgi() > On 10/12/2020 00:26, Kinsey Moore wrote: > >> -Original Message- >> From: devel On Behalf Of

[PATCH rtems] bsps/arm/imx*: Fix location of shared headers

When moving the headers from the imx BSP to the shared area, the wrong directory has been selected. This patch fixes that problem. Update #4180 --- .../include/arm/freescale/imx/imx_iomuxreg.h | 0 .../include/arm/freescale/imx/imx_iomuxvar.h | 0 bsps/arm/{shared =>