Ok
On 5/6/21 4:17 am, Ryan Long wrote:
> ---
> tester/covoar/Explanations.cc | 45
> ---
> 1 file changed, 17 insertions(+), 28 deletions(-)
>
> diff --git a/tester/covoar/Explanations.cc b/tester/covoar/Explanations.cc
> index d94cd2e..1449fb2 100644
>
On 5/6/21 2:47 am, Ryan Long wrote:
> We'll submit the C++ conversions as separate patches since they are larger.
> That patch will be submitted shortly.
Excellent and thanks.
Chris
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On 5/6/21 8:11 am, Gedare Bloom wrote:
> On Fri, Jun 4, 2021 at 1:17 PM Joel Sherrill wrote:
>>
>> On the surface, this looks OK to me. But I remember looking at this one
>> and wondering if there was any cleanup required because of the various
>> subroutine calls as you work down through this
On Fri, Jun 4, 2021 at 1:17 PM Joel Sherrill wrote:
>
> On the surface, this looks OK to me. But I remember looking at this one
> and wondering if there was any cleanup required because of the various
> subroutine calls as you work down through this method.
>
> Did you look into each of the
Okay. I will do that.
On Fri, 4 Jun 2021, 10:48 pm Gedare Bloom, wrote:
> On Fri, Jun 4, 2021 at 2:57 PM Ida Delphine wrote:
> >
> > Okay, I will take a look.
> >
> > Regarding me asking a question in the appropriate clang-format mailing
> list should it be just regarding the parentheses and
On Fri, Jun 4, 2021 at 2:57 PM Ida Delphine wrote:
>
> Okay, I will take a look.
>
> Regarding me asking a question in the appropriate clang-format mailing list
> should it be just regarding the parentheses and braces being aligned?
>
That would be the right question to ask, if you can't find a
Looks good to me.
> On Jun 4, 2021, at 03:47 , Christian Mauderer
> wrote:
>
> Don't initialze regions that have a negative size (for example due to a
> wrong calculation).
>
> Update #4450
> ---
> cpukit/score/cpu/arm/include/rtems/score/armv7m.h | 2 +-
> 1 file changed, 1 insertion(+), 1
Okay, I will take a look.
Regarding me asking a question in the appropriate clang-format mailing list
should it be just regarding the parentheses and braces being aligned?
On Fri, Jun 4, 2021 at 8:41 PM Joel Sherrill wrote:
>
>
> On Fri, Jun 4, 2021 at 12:39 PM Gedare Bloom wrote:
>
>> On
On Fri, Jun 4, 2021 at 12:39 PM Gedare Bloom wrote:
> On Fri, Jun 4, 2021 at 8:47 AM Joel Sherrill wrote:
> >
> >
> >
> > On Fri, Jun 4, 2021 at 12:24 AM Ida Delphine wrote:
> >>
> >> Hello everyone,
> >>
> >> I applied the configuration Sebastian used and ran clang-format on
>
On the surface, this looks OK to me. But I remember looking at this one
and wondering if there was any cleanup required because of the various
subroutine calls as you work down through this method.
Did you look into each of the subroutines called and make sure they
didn't do further allocations?
See also CID 1439298
Closes #3570
---
cpukit/libblock/src/flashdisk.c | 16
1 file changed, 16 insertions(+)
diff --git a/cpukit/libblock/src/flashdisk.c b/cpukit/libblock/src/flashdisk.c
index 91f99e0d52..4de6ecd807 100644
--- a/cpukit/libblock/src/flashdisk.c
+++
---
tester/covoar/Explanations.cc | 45 ---
1 file changed, 17 insertions(+), 28 deletions(-)
diff --git a/tester/covoar/Explanations.cc b/tester/covoar/Explanations.cc
index d94cd2e..1449fb2 100644
--- a/tester/covoar/Explanations.cc
+++
does this one need doco update for the option changes?
On Fri, Jun 4, 2021 at 1:48 AM Christian Mauderer
wrote:
>
> Calling the memory FLASH and EXTRAM instead of FLEXSPI and SDRAM makes
> it simpler to support other types of external RAM. This patch also
> removes some of the calculations and
On Fri, Jun 4, 2021 at 1:48 AM Christian Mauderer
wrote:
>
> Update #4180
> ---
> .../nxp/boards/evkbimxrt1050/clock_config.c | 5 +++
> bsps/arm/imxrt/start/clock-arm-pll-config.c | 33 +++
> spec/build/bsps/arm/imxrt/bspimxrt.yml| 1 +
> 3 files changed, 39
ok
On Fri, Jun 4, 2021 at 1:47 AM Christian Mauderer
wrote:
>
> The write to RBAR didn't have the valid flag set. Therefore the write to
> RASR had an influence on the previously set region. That means for
> example that if Region 0 had been enabled but 1 should be disabled due
> to a size of 0,
On Fri, Jun 4, 2021 at 8:47 AM Joel Sherrill wrote:
>
>
>
> On Fri, Jun 4, 2021 at 12:24 AM Ida Delphine wrote:
>>
>> Hello everyone,
>>
>> I applied the configuration Sebastian used and ran clang-format on
>> cpukit/score/src/threadqenque.c and so far these are the differences I could
>>
We'll submit the C++ conversions as separate patches since they are larger.
That patch will be submitted shortly.
-Original Message-
From: Chris Johns
Sent: Friday, May 28, 2021 8:05 PM
To: Ryan Long ; devel@rtems.org
Subject: Re: [PATCH v1 1/6] Explanations.cc: Fix resource leaks
On
On Fri, Jun 4, 2021 at 12:24 AM Ida Delphine wrote:
> Hello everyone,
>
> I applied the configuration Sebastian used and ran clang-format on
> cpukit/score/src/threadqenque.c and so far these are the differences I
> could notice...
> Below are some example areas in the code you can spot the
On Fri, Jun 4, 2021 at 7:59 AM Kinsey Moore
wrote:
> On 6/4/2021 02:32, Christian MAUDERER wrote:
> > Am 02.06.21 um 20:37 schrieb Kinsey Moore:
> >> Hello,
> >>
> >> From what I’ve seen of the various BSPs supported by LibBSD that
> >> have multiple ethernet peripherals,
> >>
> >> only one
On 6/4/2021 02:32, Christian MAUDERER wrote:
Am 02.06.21 um 20:37 schrieb Kinsey Moore:
Hello,
From what I’ve seen of the various BSPs supported by LibBSD that
have multiple ethernet peripherals,
only one tends to be chosen and supported. I’ve encountered a
situation where the majority of
Update #4180
---
.../nxp/boards/evkbimxrt1050/clock_config.c | 5 +++
bsps/arm/imxrt/start/clock-arm-pll-config.c | 33 +++
spec/build/bsps/arm/imxrt/bspimxrt.yml| 1 +
3 files changed, 39 insertions(+)
create mode 100644 bsps/arm/imxrt/start/clock-arm-pll-config.c
Calling the memory FLASH and EXTRAM instead of FLEXSPI and SDRAM makes
it simpler to support other types of external RAM. This patch also
removes some of the calculations and improves names and documentation to
avoid pitfalls. It removes a unnecessary memory definition.
Update #4180
---
The write to RBAR didn't have the valid flag set. Therefore the write to
RASR had an influence on the previously set region. That means for
example that if Region 0 had been enabled but 1 should be disabled due
to a size of 0, the previous code would have disabled region 0 instead.
This patch
Don't initialze regions that have a negative size (for example due to a
wrong calculation).
Update #4450
---
cpukit/score/cpu/arm/include/rtems/score/armv7m.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cpukit/score/cpu/arm/include/rtems/score/armv7m.h
Am 02.06.21 um 20:37 schrieb Kinsey Moore:
Hello,
From what I’ve seen of the various BSPs supported by LibBSD that have
multiple ethernet peripherals,
only one tends to be chosen and supported. I’ve encountered a situation
where the majority of platform
examples (Zynq Ultrascale+ MPSoC
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