New patch sent with new changes.
On Fri, 7 Oct 2022 at 10:30, Mohd Noor Aman wrote:
> This patch adds the relevant documentations required for booting the new
> BSP.
> JTAG support is added for debugging. I have built the HTML docs and
> verified
> them.
> ---
>
This patch adds the relevant documentations required for booting the new BSP.
JTAG support is added for debugging. I have built the HTML docs and verified
them.
---
user/bsps/aarch64/raspberrypi4.rst | 111 +
user/bsps/bsps-aarch64.rst | 1 +
2 files changed,
On 7/10/2022 3:33 pm, Sebastian Huber wrote:
> On 07.10.22 06:31, Chris Johns wrote:
>> On 7/10/2022 3:23 pm, Sebastian Huber wrote:
>>> On 07.10.22 05:44, Chris Johns wrote:
On 6/10/2022 7:23 pm, Sebastian Huber wrote:
> +#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 10
> + tls_data =
On 07.10.22 06:31, Chris Johns wrote:
On 7/10/2022 3:23 pm, Sebastian Huber wrote:
On 07.10.22 05:44, Chris Johns wrote:
On 6/10/2022 7:23 pm, Sebastian Huber wrote:
+#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 10
+ tls_data = (void *)
+ RTEMS_ALIGN_UP( (uintptr_t) tls_area + sizeof( *tcb
On 7/10/2022 3:23 pm, Sebastian Huber wrote:
> On 07.10.22 05:44, Chris Johns wrote:
>> On 6/10/2022 7:23 pm, Sebastian Huber wrote:
>>> +#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 10
>>> + tls_data = (void *)
>>> + RTEMS_ALIGN_UP( (uintptr_t) tls_area + sizeof( *tcb ), alignment );
>>> + tcb =
On 7/10/2022 3:25 pm, Sebastian Huber wrote:
> On 07.10.22 04:57, Chris Johns wrote:
>> On 6/10/2022 6:35 pm, Sebastian Huber wrote:
>>> On 06/10/2022 00:13, Chris Johns wrote:
Will the IDLE TLS size be based on the
CONFIGURE_MAXIMUM_THREAD_LOCAL_STORAGE_SIZE if it is not zero? This
On 07.10.22 04:57, Chris Johns wrote:
On 6/10/2022 6:35 pm, Sebastian Huber wrote:
On 06/10/2022 00:13, Chris Johns wrote:
Will the IDLE TLS size be based on the
CONFIGURE_MAXIMUM_THREAD_LOCAL_STORAGE_SIZE if it is not zero? This effects
libdl once it supports loading TLS based code.
From: Chris Johns
- Add support to get the parent address and size cells
- Propvide support to get a reg prop address map
- Change getting a set of properties to uintptr_t
- Improve the debug mode of the ls command to print all props
Closes #4729
---
cpukit/include/rtems/rtems-fdt.h
On 07.10.22 05:44, Chris Johns wrote:
On 6/10/2022 7:23 pm, Sebastian Huber wrote:
+#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 10
+ tls_data = (void *)
+RTEMS_ALIGN_UP( (uintptr_t) tls_area + sizeof( *tcb ), alignment );
+ tcb = (TLS_Thread_control_block *) ((char *) tls_data - sizeof( *tcb
On 6/10/2022 7:23 pm, Sebastian Huber wrote:
> +#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 10
> + tls_data = (void *)
> +RTEMS_ALIGN_UP( (uintptr_t) tls_area + sizeof( *tcb ), alignment );
> + tcb = (TLS_Thread_control_block *) ((char *) tls_data - sizeof( *tcb ));
> + return_value = tls_data;
OK
Thanks
Chris
On 6/10/2022 6:29 pm, Sebastian Huber wrote:
> Check for "BEGIN OF TEST" and "END OF TEST" to not use other information
> blocks
> such as "END OF GCOV" to determine the test status.
> ---
> tester/rt/report.py | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
>
On 6/10/2022 6:35 pm, Sebastian Huber wrote:
> On 06/10/2022 00:13, Chris Johns wrote:
>> Will the IDLE TLS size be based on the
>> CONFIGURE_MAXIMUM_THREAD_LOCAL_STORAGE_SIZE if it is not zero? This effects
>> libdl once it supports loading TLS based code.
>
> Currently, only the actual TLS size
On 10/6/2022 13:29, Karel Gardas wrote:
On 10/6/22 20:14, Kinsey Moore wrote:
+Raspberry Pi uses a different mechanism to boot. First the GPU
initializes,
A different mechanism as compared to what? Is this sentence important
to users?
Should GPU be CPU, instead?
Sorry for hijacking, but
On 10/6/22 20:14, Kinsey Moore wrote:
+Raspberry Pi uses a different mechanism to boot. First the GPU
initializes,
A different mechanism as compared to what? Is this sentence important to
users?
Should GPU be CPU, instead?
Sorry for hijacking, but no, this sentence is right. GPU core on
It seems like the typical contents for config.txt are scattered
throughout several sections. It's good to call out the importance of
those config options in those sections, but this isn't very useful for
users trying to configure a system. It might be good to provide a direct
description of
Hey Alan,
I've addressed the changes. TF-A is not required as of now. I thought
earlier that TF-A is required for enabling GIC but without it, it just work
fine. Now for SMP, TF-A might be crucial as SMP in the xilinx zync is
handled using TF-A, so it might be the same case for Raspberry pi 4?
This patch adds the relevant documentations required for booting the new BSP.
JTAG support is added for debugging. I have built the HTML docs and verified
them.
---
user/bsps/aarch64/raspberrypi4.rst | 104 +
user/bsps/bsps-aarch64.rst | 1 +
2 files changed,
Hi Alan,
Thank you for review.
I will update same in Patch v2.
Regards
Padmarao
From: Alan Cudmore
Sent: Wednesday, October 5, 2022 7:52 PM
To: Padmarao Begari - I30397
Cc: devel@rtems.org ; Cyril Jean - M31571
Subject: Re: [PATCH rtems-docs] user/bsps:
On 20/09/2022 10:57, Sebastian Huber wrote:
On 19/09/2022 18:39, OAR Tester wrote:
] test SHA512-224
] 4634270f707b6a54 daae7530460842e2 0e37ed265ceee9a4 2fa08086
] ../../../testsuites/libtests/sha/init.c: 356 memcmp([0],
_sha512_224_results[i][0], sizeof(r)) == 0
This is an interesting
Ensure that the IDLE storage allocator did allocate a suffiently large area.
Update #3835.
Update #4524.
---
cpukit/include/rtems/score/interr.h | 3 +-
cpukit/sapi/src/interrtext.c | 3 +-
cpukit/score/src/threadcreateidle.c | 4 +
Update #3835.
---
bsps/powerpc/shared/cpu.c | 2 +-
cpukit/include/rtems/score/tls.h | 204 --
cpukit/score/cpu/aarch64/cpu.c| 2 +-
.../cpu/aarch64/include/rtems/score/cpuimpl.h | 3 +
cpukit/score/cpu/arm/__aeabi_read_tp.c
Add the INTERNAL_ERROR_IDLE_THREAD_CREATE_FAILED fatal error in case the
creation of an idle thread fails. This may happen due to a failing create
extension provided by the application.
---
cpukit/include/rtems/score/interr.h | 1 +
cpukit/sapi/src/interrtext.c | 3
Allow the IDLE stack allocator to change the stack size. This can be
used by applications with a very dynamic thread-local storage size to
adjust the thread storage area of the IDLE tasks dynamically.
Update #4524.
---
cpukit/doxygen/appl-config.h | 2 +-
By default, allocate the IDLE task storage areas from the RTEMS Workspace.
This avoids having to estimate the thread-local storage size in the default
configuration.
Add the application configuration option CONFIGURE_IDLE_TASK_STORAGE_SIZE to
request a static allocation of the task storage area
---
cpukit/include/rtems/stackchk.h | 75 +++
cpukit/libmisc/stackchk/check.c | 158 +++-
2 files changed, 170 insertions(+), 63 deletions(-)
diff --git a/cpukit/include/rtems/stackchk.h b/cpukit/include/rtems/stackchk.h
index 7968211a51..c836263925
---
cpukit/include/rtems/stackchk.h | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/cpukit/include/rtems/stackchk.h b/cpukit/include/rtems/stackchk.h
index 22d48c9d2b..7968211a51 100644
--- a/cpukit/include/rtems/stackchk.h
+++ b/cpukit/include/rtems/stackchk.h
Ensure that the CPU_STACK_MINIMUM_SIZE is suffiently larger than the stack
usage in simple applications.
---
testsuites/libtests/stackchk01/init.c | 30 ++-
testsuites/libtests/stackchk01/stackchk01.doc | 12 ++--
2 files changed, 33 insertions(+), 9 deletions(-)
diff
This patch set started with an 8 byte overwrite of the interrupt stack while
porting an application from RTEMS 5 to 6.
The overwrite was due to a mismatch of the size returned by
_TLS_Get_allocation_size() and the actual usage of the area. To fix this issue
it was necessary to add a new CPU port
---
testsuites/sptests/sptls02/init.cc | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/testsuites/sptests/sptls02/init.cc
b/testsuites/sptests/sptls02/init.cc
index e4791cffd6..39fc2a2a24 100644
--- a/testsuites/sptests/sptls02/init.cc
+++
For most CPU ports this was already the case. This makes it possible to use
the size as an object alignment using RTEMS_ALIGNED().
---
cpukit/score/cpu/aarch64/include/rtems/score/cpu.h | 2 +-
cpukit/score/cpu/moxie/include/rtems/score/cpu.h | 2 +-
The thread-local storage area is located close to other stacks. Try to detect
overwrites.
---
testsuites/sptests/sptls01/init.c | 4
testsuites/sptests/sptls02/init.cc | 4
testsuites/sptests/sptls03/init.c | 4
3 files changed, 12 insertions(+)
diff --git
Update #4560.
---
testsuites/sptests/sptls01/init.c | 35 ++-
1 file changed, 34 insertions(+), 1 deletion(-)
diff --git a/testsuites/sptests/sptls01/init.c
b/testsuites/sptests/sptls01/init.c
index 64860ec9c9..a1c55940d9 100644
---
---
cpukit/include/rtems/score/tls.h | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/cpukit/include/rtems/score/tls.h b/cpukit/include/rtems/score/tls.h
index 9c90b6362b..abb0a748ad 100644
--- a/cpukit/include/rtems/score/tls.h
+++
On 06/10/2022 00:13, Chris Johns wrote:
In this patch you discuss applications with "very dynamic thread-local storage
size"? I have no idea what this means and under what conditions such an app is
created. Could you please explain this?
A scenario is a bigger organization in which one
Check for "BEGIN OF TEST" and "END OF TEST" to not use other information blocks
such as "END OF GCOV" to determine the test status.
---
tester/rt/report.py | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tester/rt/report.py b/tester/rt/report.py
index d3bf1cb..21580e2
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