RE: [PATCH] user: Add a link for the setup of frdme310arty BSP

>-Original Message- >From: Gedare Bloom >Sent: 02 January 2020 21:28 >To: Sebastian Huber >Cc: devel@rtems.org; Pragnesh Patel >Subject: Re: [PATCH] user: Add a link for the setup of frdme310arty BSP > >On Wed, Jan 1, 2020 at 11:21 PM Sebastian Huber > wrote

[PATCH] user: Add a link for the setup of frdme310arty BSP

Signed-off-by: Pragnesh Patel --- user/bsps/bsps-riscv.rst | 3 +++ 1 file changed, 3 insertions(+) diff --git a/user/bsps/bsps-riscv.rst b/user/bsps/bsps-riscv.rst index 0799ad6..40d7606 100644 --- a/user/bsps/bsps-riscv.rst +++ b/user/bsps/bsps-riscv.rst @@ -93,6 +93,9 @@ The following

[PATCH] user: Add frdme310arty BSP varient

Signed-off-by: Pragnesh Patel --- user/bsps/bsps-riscv.rst | 8 1 file changed, 8 insertions(+) diff --git a/user/bsps/bsps-riscv.rst b/user/bsps/bsps-riscv.rst index c3ca098..0799ad6 100644 --- a/user/bsps/bsps-riscv.rst +++ b/user/bsps/bsps-riscv.rst @@ -36,6 +36,8 @@ This BSP offers

RE: [PATCH v5] riscv: add freedom E310 Arty A7 bsp

-Original Message- From: Sebastian Huber Sent: 14 November 2019 16:21 To: Pragnesh Patel ; rtems-de...@rtems.org; Sachin Ghadi Subject: Re: [PATCH v5] riscv: add freedom E310 Arty A7 bsp Hello Pragnesh, I fixed the formatting a bit, fixed some warnings and simplified some

RE: [PATCH v5] riscv: add freedom E310 Arty A7 bsp

On Thu, Nov 14, 2019 at 7:21 AM Sebastian Huber wrote: On 14/11/2019 14:07, Joel Sherrill wrote: > > > On Wed, Oct 23, 2019, 1:16 AM Sebastian Huber > >

RE: [PATCH v5] riscv: add freedom E310 Arty A7 bsp

Hi, Thanks everyone for support and guidance. @Sebastian Huber I will do documentation soon. - Pragnesh -Original Message- From: Sebastian Huber Sent: 23 October 2019 11:46 To: Pragnesh Patel ; rtems-de...@rtems.org; Sachin Ghadi Subject: Re: [PATCH v5] riscv: add freedom E310 Arty

[PATCH v5] riscv: add freedom E310 Arty A7 bsp

Added support for Sifive Freedom FE310 soc on Arty A7 FPGA board. Update #3785. Signed-off-by: Pragnesh Patel --- Changes in v5: - Added BSD-2-Clause LICENSE for the new code Changes in v4: - Revert fdt32_t *val to const in riscv_clock_get_timebase_frequency() - make

RE: [PATCH v5] riscv: add freedom E310 Arty A7 bsp

Sorry, I forgot to add "Changes in v5", please ignore this v5. -Original Message----- From: Pragnesh Patel Sent: 22 October 2019 15:45 To: rtems-de...@rtems.org; Sachin Ghadi Cc: Pragnesh Patel Subject: [PATCH v5] riscv: add freedom E310 Arty A7 bsp Added support for Sifive Fre

[PATCH v5] riscv: add freedom E310 Arty A7 bsp

Added support for Sifive Freedom FE310 soc on Arty A7 FPGA board. Update #3785. Signed-off-by: Pragnesh Patel --- bsps/include/bsp/fatal.h | 3 +- bsps/riscv/riscv/clock/clockdrv.c | 16 ++- bsps/riscv/riscv/config/frdme310arty.cfg | 9 ++ bsps/riscv/riscv/console

RE: [PATCH v4] riscv: add freedom E310 Arty A7 bsp

Hi, Any update on this patch. - Pragnesh -Original Message- From: Sebastian Huber Sent: 11 October 2019 11:56 To: Pragnesh Patel ; Hesham Almatary Cc: rtems-de...@rtems.org Subject: Re: [PATCH v4] riscv: add freedom E310 Arty A7 bsp On 11/10/2019 08:18, Pragnesh Patel wrote

Re: [PATCH v4] riscv: add freedom E310 Arty A7 bsp

On Thu, Oct 10, 2019 at 8:50 PM Hesham Almatary wrote: > > On Wed, 9 Oct 2019 at 12:54, Pragnesh Patel wrote: > > > > Added support for Sifive Freedom FE310 soc on Arty A7 FPGA board. > > Update #3785. > > > > Signed-off-by: Pragnesh Patel > > --- >

[PATCH v4] riscv: add freedom E310 Arty A7 bsp

Added support for Sifive Freedom FE310 soc on Arty A7 FPGA board. Update #3785. Signed-off-by: Pragnesh Patel --- Changes in v4: - Revert fdt32_t *val to const in riscv_clock_get_timebase_frequency() - make RISCV_ENABLE_FRDME310ARTY_SUPPORT consistent all over the code - Revert

Re: [PATCH v3] riscv: add freedom E310 Arty A7 bsp

SC-V chapter doc here [1]? > > [1] https://docs.rtems.org/branches/master/user/bsps/bsps-riscv.html Ok, I will do that. > > On Fri, 27 Sep 2019 at 12:20, Pragnesh Patel > wrote: > > > > Added support for Sifive Freedom FE310 soc on Arty A7 FPGA board. >

[PATCH v3] riscv: add freedom E310 Arty A7 bsp

Added support for Sifive Freedom FE310 soc on Arty A7 FPGA board. Update #3785. Signed-off-by: Pragnesh Patel --- Changes in v3: - Remove bsps/riscv/frdme310arty/ directory and added support for Freedom FE310 soc in common bsps/riscv/riscv/ directory - Added #define

Re: [RTEMS][PATCH v2 0/2] riscv: add freedom E310 Arty A7

you suggest me a better way of doing this? - Pragnesh On Wed, Sep 11, 2019 at 2:18 PM Sebastian Huber wrote: > > On 11/09/2019 10:43, Pragnesh Patel wrote: > > Ok understood. > > If i will add Freedom E310 related code in bsp/riscv/riscv directory > > then there are s

Re: [RTEMS][PATCH v2 0/2] riscv: add freedom E310 Arty A7

is #define in configure.ac through RTEMS_BSPOPTS_SET([RISCV_ENABLE_FRDME310_SUPPORT],[*],[1]), By default it is disabled. what's your suggestion on this? -Pragnesh On Wed, Sep 11, 2019 at 1:03 PM Sebastian Huber wrote: > > On 11/09/2019 09:27, Pragnesh Patel wrote: > > Thanks for t

Re: [RTEMS][PATCH v2 0/2] riscv: add freedom E310 Arty A7

patches for). > > [1] https://github.com/bluespec/Piccolo > > Cheers, > Hesham > > On Tue, 10 Sep 2019 at 07:34, Pragnesh Patel > wrote: > > > > This series added a support for RISCV freedom E310 Arty A7 bsp > > and add bsps/riscv/shared code for reusability &g

[RTEMS][PATCH v2 0/2] riscv: add freedom E310 Arty A7

shared/start/bsp_fatal_halt.c - librtemsbsp_a_SOURCES -> bsps/riscv/shared/clock/clockdrv.c - librtemsbsp_a_SOURCES -> bsps/riscv/shared/irq/irq.c Pragnesh Patel (2): riscv: add freedom E310 Arty A7 bsp bsp/riscv: Remove duplicate files bsps/include/bsp/fatal.h | 6

[RTEMS][PATCH v2 2/2] bsp/riscv: Remove duplicate files

Delete clockdrv.c, irq.c and bsp_fatal_halt.c and Makefile.am now points to bsps/riscv/shared directory Update #3785. Signed-off-by: Pragnesh Patel --- bsps/riscv/riscv/clock/clockdrv.c| 212 - bsps/riscv/riscv/irq/irq.c | 379

[RTEMS][PATCH v2 1/2] riscv: add freedom E310 Arty A7 bsp

Update #3785. Signed-off-by: Pragnesh Patel --- bsps/include/bsp/fatal.h | 6 +- bsps/riscv/frdme310arty/btimer/btimer.c| 104 ++ bsps/riscv/frdme310arty/config/frdme310arty.cfg| 11 + bsps/riscv/frdme310arty/console/console-config.c | 146

[PATCH] riscv: add freedom E310 Arty A7 bsp

Update #3785. Signed-off-by: Pragnesh Patel --- bsps/include/bsp/fatal.h | 6 +- bsps/riscv/frdme310arty/btimer/btimer.c| 108 ++ bsps/riscv/frdme310arty/clock/clockdrv.c | 266 +++ bsps/riscv/frdme310arty/config/frdme310arty.cfg