The performance monitor counter is stopped when the core is waiting for interrupts.
Update #4982. --- bsps/arm/tms570/clock/clock.c | 71 ++++++++++++------ bsps/arm/tms570/cpucounter/cpucounterread.c | 83 --------------------- spec/build/bsps/arm/tms570/obj.yml | 1 - 3 files changed, 48 insertions(+), 107 deletions(-) delete mode 100644 bsps/arm/tms570/cpucounter/cpucounterread.c diff --git a/bsps/arm/tms570/clock/clock.c b/bsps/arm/tms570/clock/clock.c index 2fb884b3ce..4465e33843 100644 --- a/bsps/arm/tms570/clock/clock.c +++ b/bsps/arm/tms570/clock/clock.c @@ -44,27 +44,24 @@ #include <bsp/fatal.h> #include <bsp/irq.h> #include <bsp/tms570.h> +#include <rtems/counter.h> +#include <rtems/sysinit.h> #include <rtems/timecounter.h> static struct timecounter tms570_rti_tc; -static uint32_t tms570_rti_get_timecount(struct timecounter *tc) +uint32_t _CPU_Counter_frequency(void) { - return TMS570_RTI.CNT[0].FRCx; + return TMS570_RTICLK_HZ / 2; } -static void tms570_clock_driver_support_initialize_hardware( void ) +CPU_Counter_ticks _CPU_Counter_read(void) { + return TMS570_RTI.CNT[0].FRCx; +} - uint64_t usec_per_tick; - uint32_t tc_frequency; - uint32_t tc_increments_per_tick; - struct timecounter *tc; - - usec_per_tick = rtems_configuration_get_microseconds_per_tick(); - tc_frequency = TMS570_RTICLK_HZ / 2; - tc_increments_per_tick = (usec_per_tick * tc_frequency + 500000) / 1000000; - +static void tms570_rti_initialize( void ) +{ /* Initialize module */ TMS570_RTI.GCTRL = 0; TMS570_RTI.CAPCTRL = 0; @@ -72,14 +69,7 @@ static void tms570_clock_driver_support_initialize_hardware( void ) TMS570_RTI.TBCTRL = TMS570_RTI_TBCTRL_INC; TMS570_RTI.INTCLRENABLE = 0x05050505; - /* Initialize counter 0 */ - TMS570_RTI.CNT[0].CPUCx = 1; - TMS570_RTI.CNT[0].UCx = 0; - TMS570_RTI.CNT[0].FRCx = 0; - TMS570_RTI.CMP[0].COMPx = tc_increments_per_tick; - TMS570_RTI.CMP[0].UDCPx = tc_increments_per_tick; - - /* Clear interrupts */ + /* Disable interrupts */ TMS570_RTI.CLEARINTENA = TMS570_RTI_CLEARINTENA_CLEAROVL1INT | TMS570_RTI_CLEARINTENA_CLEAROVL0INT | TMS570_RTI_CLEARINTENA_CLEARTBINT | @@ -91,6 +81,44 @@ static void tms570_clock_driver_support_initialize_hardware( void ) TMS570_RTI_CLEARINTENA_CLEARINT2 | TMS570_RTI_CLEARINTENA_CLEARINT1 | TMS570_RTI_CLEARINTENA_CLEARINT0; + + /* Initialize counter 0 */ + TMS570_RTI.CNT[0].CPUCx = 1; + TMS570_RTI.CNT[0].UCx = 0; + TMS570_RTI.CNT[0].FRCx = 0; + + /* Enable counter 0 */ + TMS570_RTI.GCTRL = TMS570_RTI_GCTRL_CNT0EN; +} + +RTEMS_SYSINIT_ITEM( + tms570_rti_initialize, + RTEMS_SYSINIT_CPU_COUNTER, + RTEMS_SYSINIT_ORDER_MIDDLE +); + +static uint32_t tms570_rti_get_timecount(struct timecounter *tc) +{ + return TMS570_RTI.CNT[0].FRCx; +} + +static void tms570_clock_driver_support_initialize_hardware( void ) +{ + + uint64_t usec_per_tick; + uint32_t tc_frequency; + uint32_t tc_increments_per_tick; + struct timecounter *tc; + + usec_per_tick = rtems_configuration_get_microseconds_per_tick(); + tc_frequency = TMS570_RTICLK_HZ / 2; + tc_increments_per_tick = (usec_per_tick * tc_frequency + 500000) / 1000000; + + /* Initialize compare 0 */ + TMS570_RTI.CMP[0].UDCPx = tc_increments_per_tick; + TMS570_RTI.CMP[0].COMPx = TMS570_RTI.CNT[0].FRCx + tc_increments_per_tick; + + /* Clear interrupts */ TMS570_RTI.INTFLAG = TMS570_RTI_INTFLAG_OVL1INT | TMS570_RTI_INTFLAG_OVL0INT | TMS570_RTI_INTFLAG_TBINT | @@ -99,9 +127,6 @@ static void tms570_clock_driver_support_initialize_hardware( void ) TMS570_RTI_INTFLAG_INT1 | TMS570_RTI_INTFLAG_INT0; - /* Enable counter 0 */ - TMS570_RTI.GCTRL = TMS570_RTI_GCTRL_CNT0EN; - /* Enable interrupts for counter 0 */ TMS570_RTI.SETINTENA = TMS570_RTI_SETINTENA_SETINT0; diff --git a/bsps/arm/tms570/cpucounter/cpucounterread.c b/bsps/arm/tms570/cpucounter/cpucounterread.c deleted file mode 100644 index 8cda09f0c6..0000000000 --- a/bsps/arm/tms570/cpucounter/cpucounterread.c +++ /dev/null @@ -1,83 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/** - * @file - * - * @ingroup RTEMSBSPsARMTMS570 - * - * @brief This source file contains the CPU Counter implementation. - * - * The counters setup functions are these which has been suggested on - * StackOverflow. Code is probably for use on Cortex-A without modifications - * as well. - * - * http://stackoverflow.com/questions/3247373/how-to-measure-program-execution-time-in-arm-cortex-a8-processor - */ - -/* - * Copyright (C) 2014 Pavel Pisa <p...@cmp.felk.cvut.cz> - * - * Czech Technical University in Prague - * Zikova 1903/4 - * 166 36 Praha 6 - * Czech Republic - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include <rtems/counter.h> -#include <rtems/sysinit.h> - -#include <libcpu/arm-cp15.h> - -#include <bsp.h> - -static void tms570_cpu_counter_initialize(void) -{ - uint32_t cycle_counter; - uint32_t pmcr; - - cycle_counter = ARM_CP15_PMCLRSET_CYCLE_COUNTER; - arm_cp15_set_performance_monitors_interrupt_enable_clear(cycle_counter); - arm_cp15_set_performance_monitors_count_enable_set(cycle_counter); - - pmcr = arm_cp15_get_performance_monitors_control(); - pmcr &= ~ARM_CP15_PMCR_D; - pmcr |= ARM_CP15_PMCR_E; - arm_cp15_set_performance_monitors_control(pmcr); -} - -uint32_t _CPU_Counter_frequency(void) -{ - return TMS570_GCLK_HZ; -} - -CPU_Counter_ticks _CPU_Counter_read(void) -{ - return arm_cp15_get_performance_monitors_cycle_count(); -} - -RTEMS_SYSINIT_ITEM( - tms570_cpu_counter_initialize, - RTEMS_SYSINIT_CPU_COUNTER, - RTEMS_SYSINIT_ORDER_FIRST -); diff --git a/spec/build/bsps/arm/tms570/obj.yml b/spec/build/bsps/arm/tms570/obj.yml index d9f0043397..7082f3831b 100644 --- a/spec/build/bsps/arm/tms570/obj.yml +++ b/spec/build/bsps/arm/tms570/obj.yml @@ -78,7 +78,6 @@ source: - bsps/arm/tms570/clock/clock.c - bsps/arm/tms570/console/printk-support.c - bsps/arm/tms570/console/tms570-sci.c -- bsps/arm/tms570/cpucounter/cpucounterread.c - bsps/arm/tms570/irq/irq.c - bsps/arm/tms570/start/bspreset.c - bsps/arm/tms570/start/bsprestart.c -- 2.35.3 _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel