Re: Break points with latest SIS

2019-02-08 Thread Jiri Gaisler
Hello Sebastian, here is a patch for RSB that improves sis debugging in gdb and on SMP systems: * Correct break-point handling in gdb * Detect and break on NULL pointer derefence (call/jump) * Single stepping (stepi) in gdb/sis keeps focus on debugged cpu * 'sim cpu' command shows active cpu

Re: Break points with latest SIS

2019-02-07 Thread Jiri Gaisler
On 2/7/19 12:53 PM, Jiri Gaisler wrote: > On 2/7/19 12:45 PM, Sebastian Huber wrote: >> On 07/02/2019 12:43, Jiri Gaisler wrote: >>> Works OK here: >>> >>> $ sparc-rtems5-sis -leon3 -nouartrx -r -tlim 200 s -m 4  >>> ./sparc-rtems5/c/leon3/testsuites/smptests/smpswitchextension01.exe >>> >>>   

Re: Break points with latest SIS

2019-02-07 Thread Jiri Gaisler
On 2/7/19 12:45 PM, Sebastian Huber wrote: > > > On 07/02/2019 12:43, Jiri Gaisler wrote: >> Works OK here: >> >> $ sparc-rtems5-sis -leon3 -nouartrx -r -tlim 200 s -m 4  >> ./sparc-rtems5/c/leon3/testsuites/smptests/smpswitchextension01.exe >> >>   SIS - SPARC/RISCV instruction simulator 2.11, 

Re: Break points with latest SIS

2019-02-07 Thread Sebastian Huber
On 07/02/2019 12:43, Jiri Gaisler wrote: Works OK here: $ sparc-rtems5-sis -leon3 -nouartrx -r -tlim 200 s -m 4  ./sparc-rtems5/c/leon3/testsuites/smptests/smpswitchextension01.exe  SIS - SPARC/RISCV instruction simulator 2.11,  copyright Jiri Gaisler 1995  Bug-reports to j...@gaisler.se

Re: Break points with latest SIS

2019-02-07 Thread Jiri Gaisler
Works OK here: $ sparc-rtems5-sis -leon3 -nouartrx -r -tlim 200 s -m 4  ./sparc-rtems5/c/leon3/testsuites/smptests/smpswitchextension01.exe  SIS - SPARC/RISCV instruction simulator 2.11,  copyright Jiri Gaisler 1995  Bug-reports to j...@gaisler.se  LEON3 emulation enabled, 4 cpus online, delta