Re: [PATCH] user: Add xilinx-zynq BSP details

Looks good to me other than Gedare's comments. Glad to see it. I don't think it goes in the Zynq section but when using networking with qemu, you tend to need to forward ports. Is there a logical location for general BSP independent information on using Qemu with RTEMS? On Thu, Sep 10, 2020 at

Re: [PATCH] user: Add xilinx-zynq BSP details

Thanks for the doco. Just a few comments. On Mon, Sep 7, 2020 at 9:30 PM wrote: > > From: Chris Johns > > --- > user/bsps/arm/xilinx-zynq.rst | 114 +- > 1 file changed, 112 insertions(+), 2 deletions(-) > > diff --git a/user/bsps/arm/xilinx-zynq.rst

[PATCH] user: Add xilinx-zynq BSP details

From: Chris Johns --- user/bsps/arm/xilinx-zynq.rst | 114 +- 1 file changed, 112 insertions(+), 2 deletions(-) diff --git a/user/bsps/arm/xilinx-zynq.rst b/user/bsps/arm/xilinx-zynq.rst index 909b23e..365c336 100644 --- a/user/bsps/arm/xilinx-zynq.rst +++

Xilinx Zynq BSP and SD/eMMC

Hello, is someone using the Xilinx Zynq BSP (xilinx_zynq_zedboard to be exact) with a SD driver? I didn't find one in libbsd for that BSP. Best regards Christian -- embedded brains GmbH Herr Christian Mauderer Dornierstr. 4 D-82178 Puchheim Germany

Re: Cacheable OCM support for the Zynq BSP

On 11/6/20 12:22 pm, Jonathan Brandmeyer wrote: > On Wed, Jun 10, 2020 at 8:08 PM Chris Johns > wrote: > > Could you please create a ticket for this change and attach the patch? > Please > set the milestone to 6. The change might be OK for 5.2 so a new ticket >

Re: Cacheable OCM support for the Zynq BSP

On Wed, Jun 10, 2020 at 8:08 PM Chris Johns wrote: > > Could you please create a ticket for this change and attach the patch? > Please > set the milestone to 6. The change might be OK for 5.2 so a new ticket for > that > milestone can be created once we have the change merged onto master. > >

Re: Cacheable OCM support for the Zynq BSP

On 11/6/20 10:10 am, Jonathan Brandmeyer wrote: > On Wed, Jun 10, 2020 at 5:57 PM Chris Johns > wrote: > > On 11/6/20 9:30 am, Jonathan Brandmeyer wrote: > > We've patched the RTEMS kernel in order to support using the Zynq > on-chip > memory > > as

Re: Cacheable OCM support for the Zynq BSP

On Wed, Jun 10, 2020 at 5:57 PM Chris Johns wrote: > On 11/6/20 9:30 am, Jonathan Brandmeyer wrote: > > We've patched the RTEMS kernel in order to support using the Zynq > on-chip memory > > as inner-cacheable memory. The enclosed patch should apply cleanly to > master. > > > > Background:

Re: Cacheable OCM support for the Zynq BSP

On 11/6/20 9:30 am, Jonathan Brandmeyer wrote: > We've patched the RTEMS kernel in order to support using the Zynq on-chip > memory > as inner-cacheable memory.  The enclosed patch should apply cleanly to master. > > Background: During normal startup, the ROM bootloader performs vendor-specific

Cacheable OCM support for the Zynq BSP

We've patched the RTEMS kernel in order to support using the Zynq on-chip memory as inner-cacheable memory. The enclosed patch should apply cleanly to master. Background: During normal startup, the ROM bootloader performs vendor-specific initialization of core 1, and then sits in a

Re: Link RAP file error on zynq BSP

On 12/10/2018 15:45, jameszxj wrote: > HI, >     I run RTEMS on my xilinx z7k board and dynamic load application(RAP > format) > from shell. > In recent update, i encount a link error when link the RAP file. > Here is the command and output message: >                 rtems-ld -n -e PT_Init --base

Re: Link RAP file error on zynq BSP

On 15/10/18 9:39 pm, jameszxj wrote: >>It should be fixed with this commit: > >> https://git.rtems.org/rtems/commit/?id=186a0b1dc017b1e2e44620f8d6274dc1c6ba09d1 > > thanks, compile is ok. but rtems-ld still has a error > > outputter:application: wsp/build/nssys.out > image::close: removing

Re: Link RAP file error on zynq BSP

>It should be fixed with this commit: > https://git.rtems.org/rtems/commit/?id=186a0b1dc017b1e2e44620f8d6274dc1c6ba09d1 thanks, compile is ok. but rtems-ld still has a error outputter:application: wsp/build/nssys.out image::close: removing wsp/build/nssys.out error: rap::object: Section index

Re: Link RAP file error on zynq BSP

On 15/10/2018 10:16, jameszxj wrote: *From: * "Sebastian Huber"; *Date: * Mon, Oct 15, 2018 02:43 PM *To: * "devel"; *Cc: * "jameszxj"; *Subject: * Re: Link RAP file error on zynq BSP On 15/10/2018 08:16, jameszxj wrote: >> d:/msys64/opt/rtems

Re: Link RAP file error on zynq BSP

On 15/10/2018 08:16, jameszxj wrote: d:/msys64/opt/rtems/5.1/bin/../lib/gcc/arm-rtems5/7.3.0/../../../../arm-rtems5/bin/ld.exe: wsp/build/nssys.elf section `.unexpected_sections' will not fit in region `UNEXPECTED_SECTIONS' collect2.exe: error: ld returned 1 exit status Please have a look at

Re: Link RAP file error on zynq BSP

> >On 12/10/18 10:05 am, Joel Sherrill wrote: >>> >>> >>> On Thu, Oct 11, 2018 at 11:45 PM jameszxj >> > wrote: >>> >>> HI, >>> I run RTEMS on my xilinx z7k board and dynamic load application(RAP >>> format) from shell. >>> In recent update, i

Re: Link RAP file error on zynq BSP

On 12/10/18 10:05 am, Joel Sherrill wrote: >> >> >> On Thu, Oct 11, 2018 at 11:45 PM jameszxj > > wrote: >> >> HI, >> I run RTEMS on my xilinx z7k board and dynamic load application(RAP >> format) from shell. >> In recent update, i encount a link

Re: Link RAP file error on zynq BSP

On 12/10/18 10:05 am, Joel Sherrill wrote: > > > On Thu, Oct 11, 2018 at 11:45 PM jameszxj > wrote: > > HI, >     I run RTEMS on my xilinx z7k board and dynamic load application(RAP > format) from shell. > In recent update, i encount a link error

Re: Link RAP file error on zynq BSP

On Thu, Oct 11, 2018 at 11:45 PM jameszxj wrote: > HI, > I run RTEMS on my xilinx z7k board and dynamic load application(RAP > format) from shell. > In recent update, i encount a link error when link the RAP file. > Here is the command and output message: > rtems-ld -n -e

Link RAP file error on zynq BSP

HI,I run RTEMS on my xilinx z7k board and dynamic load application(RAP format) from shell. In recent update, i encount a link error when link the RAP file. Here is the command and output message: rtems-ld -n -e PT_Init --base rtems-nsa.elf wsp/build/nssys.elf -o

Re: [PATCH 4/4] Code refactor xilinx-zynq BSP MMU initialization

Hello Chris and Rohini, I have returned and catching the emails flow. But please, consider that for some architectures it is critical to have MMU table runtime alterable. I.e. on RPi the actual memory division to cacheable and peripheral area is know only at runtime. It depends on user provided

Re: [PATCH 4/4] Code refactor xilinx-zynq BSP MMU initialization

OK, thanks all for the views. That gave plenty insight into the details I had not thought of earlier. Clearly not the way to go. But then is such refactoring a good idea? These changes even if modified will apply only to cp15 ARM BSPs. On 24 Aug 2015 21:20, Pavel Pisa p...@cmp.felk.cvut.cz wrote:

Re: [PATCH 4/4] Code refactor xilinx-zynq BSP MMU initialization

We should consider how to continue making improvements in this area of RTEMS. On Mon, Aug 24, 2015 at 1:25 PM, Rohini Kulkarni krohini1...@gmail.com wrote: OK, thanks all for the views. That gave plenty insight into the details I had not thought of earlier. Clearly not the way to go. But then

Re: [PATCH 4/4] Code refactor xilinx-zynq BSP MMU initialization

On 15/08/2015 8:14 pm, Rohini Kulkarni wrote: On Fri, Aug 14, 2015 at 12:41 PM, Rohini Kulkarni krohini1...@gmail.com mailto:krohini1...@gmail.com wrote: On Fri, Aug 14, 2015 at 8:33 AM, Chris Johns chr...@rtems.org mailto:chr...@rtems.org wrote: On 14/08/2015 7:44

Re: [PATCH 4/4] Code refactor xilinx-zynq BSP MMU initialization

On Fri, Aug 14, 2015 at 12:41 PM, Rohini Kulkarni krohini1...@gmail.com wrote: On Fri, Aug 14, 2015 at 8:33 AM, Chris Johns chr...@rtems.org wrote: On 14/08/2015 7:44 am, Rohini Kulkarni wrote: --- -BSP_START_DATA_SECTION static const arm_cp15_start_section_config

Re: [PATCH 4/4] Code refactor xilinx-zynq BSP MMU initialization

On Fri, Aug 14, 2015 at 8:33 AM, Chris Johns chr...@rtems.org wrote: On 14/08/2015 7:44 am, Rohini Kulkarni wrote: --- -BSP_START_DATA_SECTION static const arm_cp15_start_section_config -zynq_mmu_config_table[] = { +BSP_START_DATA_SECTION const arm_cp15_start_section_config

[PATCH 4/4] Code refactor xilinx-zynq BSP MMU initialization

--- c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am |4 +++ .../libbsp/arm/xilinx-zynq/startup/bspstartmmu.c | 27 ++-- 2 files changed, 17 insertions(+), 14 deletions(-) diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am

Re: [PATCH 4/4] Code refactor xilinx-zynq BSP MMU initialization

On 14/08/2015 7:44 am, Rohini Kulkarni wrote: --- -BSP_START_DATA_SECTION static const arm_cp15_start_section_config -zynq_mmu_config_table[] = { +BSP_START_DATA_SECTION const arm_cp15_start_section_config +arm_cp15_start_mmu_config_table[] = { ARMV7_CP15_START_DEFAULT_SECTIONS, {

Re: Zynq BSP

On 2014-07-24 03:06, Chris Johns wrote: On 22/07/2014 1:00 am, emanuel stiebler wrote: On 2014-07-18 18:54, Chris Johns wrote: We still use the U-Boot to load it? I do not use uboot, rather we have a taken the Xilinx FSBL and reworked it. Could you at least share this part? And thanks

Re: Zynq BSP

On 22/07/2014 1:00 am, emanuel stiebler wrote: On 2014-07-18 18:54, Chris Johns wrote: We still use the U-Boot to load it? I do not use uboot, rather we have a taken the Xilinx FSBL and reworked it. Could you at least share this part? And thanks for this already, I thought that I had to use