Hi
I have got a great exprience from RTEMS community last year during
GSOC'16. I would like to help other guys for GSOC 2017. Has RTEMS
applied for GSOC 2017 ?
Happy to mentor future GSOC guys :)
Thanks
PV
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Remove dead code.
---
cpukit/libcsupport/src/termios.c | 15 ---
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/cpukit/libcsupport/src/termios.c b/cpukit/libcsupport/src/termios.c
index 5067f6c..f13e867 100644
--- a/cpukit/libcsupport/src/termios.c
+++
Optimize callout invocation check.
---
cpukit/libcsupport/include/rtems/termiostypes.h | 2 +-
cpukit/libcsupport/src/termios.c| 18 +-
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/cpukit/libcsupport/include/rtems/termiostypes.h
Call the receive callback in case a read will succeed without to block.
This enables the use of the receive callback for a poll() and select()
support. Increase raw input buffer size to allow buffering of one line.
---
cpukit/libcsupport/src/termios.c | 59
Currenlty only blocking read/write operations are implemented. A
blocking write must transfer at least one character. It should not wait
for the device for the second character and so on.
---
cpukit/libcsupport/src/termios.c | 89 +---
1 file changed, 56
Call rtems_termios_puts() only once. Adjust column in one place.
---
cpukit/libcsupport/src/termios.c | 57 ++--
1 file changed, 38 insertions(+), 19 deletions(-)
diff --git a/cpukit/libcsupport/src/termios.c b/cpukit/libcsupport/src/termios.c
index
Just a generic note that if you are reworking most of termios, you can
also take this opportunity to make it have a consistent "RTEMS" style.
On Thu, Feb 23, 2017 at 9:45 AM, Sebastian Huber
wrote:
> Optimize callout invocation check.
> ---
>
I've got a FRDM-K64F and would like to get RTEMS running on it for a personal
project. It has the standard ARM interrupt controller. One complication is that
the SRAM is divided into two banks of 128K as the banks are connected to
different buses in the MCU, and causes hard faults if an
I've got a FRDM-K64F and would like to get RTEMS running on it for a personal
project. It has the standard ARM interrupt controller. One complication is that
the SRAM is divided into two banks of 128K as the banks are connected to
different buses in the MCU, and causes hard faults if an
Hi,
Good to know that you are interested to contribute RTEMS. Welcome to
community. It is always nice to put devel@rtems.org in CC so that more
people can help along with me. :)
Have you gone through this ?
https://devel.rtems.org/wiki/Developer/Projects/Open/POSIXCompliance
Joel has nicely
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