Re: Question about Raspberry Pi bspstarthooks.c - potential patch

2021-06-28 Thread Sebastian Huber

Hello Alan,

On 29/06/2021 03:13, Alan Cudmore wrote:

The current RTEMS 6/master branch does not seem to work on the
Raspberry Pi single core models, while the 5 branch does.

I was able to track it down to a commit where it stopped working:
272534eb725f2486b7a32b39d998202a101bd36e

In that commit, the call:
  /* Clear Secure or Non-secure Vector Base Address Register */
   arm_cp15_set_vector_base_address(bsp_vector_table_begin);

Was moved from bsp_start_hook_0 to rpi_start_rtems_on_secondary_processor.

If I add it back to bsp_start_hook_0, the single core models work again.


I moved the VBAR setting to start.S. Maybe the problem is that TTBCR is 
no longer set to zero before the VBAR is set. The Raspberry Pi BSP is 
the only BSP which did this.


--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hu...@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax:   +49-89-18 94 741 - 08

Registergericht: Amtsgericht München
Registernummer: HRB 157899
Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
Unsere Datenschutzerklärung finden Sie hier:
https://embedded-brains.de/datenschutzerklaerung/
___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel

Re: [PATCH] bsps/zynqmp: Allow any or all CGEMs to be enabled

2021-06-28 Thread Chris Johns
Hi,

I am just catching up and missed this one until I saw the patch was pushed. I am
sorry but I am confused by this patch.

Could someone please explain this reason for this addition to the BSP and
approach being taken? Is there something in the BSP that requires this
information be provided here?

Chris

On 9/6/21 6:18 am, Kinsey Moore wrote:
> Provide the options necessary to enable any combination of CGEM ethernet
> interfaces in LibBSD. The default is still CGEM3, so this should
> continue to operate as expected on typical Zynq Ultrascale+ MPSoC
> development hardware.
> ---
>  spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml|  8 
>  .../bsps/aarch64/xilinx-zynqmp/optcgem0.yml  | 16 
>  .../bsps/aarch64/xilinx-zynqmp/optcgem1.yml  | 16 
>  .../bsps/aarch64/xilinx-zynqmp/optcgem2.yml  | 16 
>  .../bsps/aarch64/xilinx-zynqmp/optcgem3.yml  | 16 
>  5 files changed, 72 insertions(+)
>  create mode 100644 spec/build/bsps/aarch64/xilinx-zynqmp/optcgem0.yml
>  create mode 100644 spec/build/bsps/aarch64/xilinx-zynqmp/optcgem1.yml
>  create mode 100644 spec/build/bsps/aarch64/xilinx-zynqmp/optcgem2.yml
>  create mode 100644 spec/build/bsps/aarch64/xilinx-zynqmp/optcgem3.yml
> 
> diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml 
> b/spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml
> index 16e2b8a7e9..1b6b756912 100644
> --- a/spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml
> +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml
> @@ -27,6 +27,14 @@ links:
>uid: optramori
>  - role: build-dependency
>uid: optclkuart
> +- role: build-dependency
> +  uid: optcgem0
> +- role: build-dependency
> +  uid: optcgem1
> +- role: build-dependency
> +  uid: optcgem2
> +- role: build-dependency
> +  uid: optcgem3
>  - role: build-dependency
>uid: ../../optconminor
>  - role: build-dependency
> diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optcgem0.yml 
> b/spec/build/bsps/aarch64/xilinx-zynqmp/optcgem0.yml
> new file mode 100644
> index 00..fc878fda60
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optcgem0.yml
> @@ -0,0 +1,16 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +actions:
> +- get-boolean: null
> +- env-enable: null
> +- define-condition: null
> +build-type: option
> +copyrights:
> +- Copyright (C) 2021 On-Line Applications Research
> +default: false
> +default-by-variant: []
> +description: |
> +  Enable support for CGEM0
> +enabled-by: true
> +links: []
> +name: BSP_XILINX_ZYNQMP_USE_CGEM0
> +type: build
> diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optcgem1.yml 
> b/spec/build/bsps/aarch64/xilinx-zynqmp/optcgem1.yml
> new file mode 100644
> index 00..6d5096bbde
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optcgem1.yml
> @@ -0,0 +1,16 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +actions:
> +- get-boolean: null
> +- env-enable: null
> +- define-condition: null
> +build-type: option
> +copyrights:
> +- Copyright (C) 2021 On-Line Applications Research
> +default: false
> +default-by-variant: []
> +description: |
> +  Enable support for CGEM1
> +enabled-by: true
> +links: []
> +name: BSP_XILINX_ZYNQMP_USE_CGEM1
> +type: build
> diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optcgem2.yml 
> b/spec/build/bsps/aarch64/xilinx-zynqmp/optcgem2.yml
> new file mode 100644
> index 00..a8aca3ebbd
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optcgem2.yml
> @@ -0,0 +1,16 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +actions:
> +- get-boolean: null
> +- env-enable: null
> +- define-condition: null
> +build-type: option
> +copyrights:
> +- Copyright (C) 2021 On-Line Applications Research
> +default: false
> +default-by-variant: []
> +description: |
> +  Enable support for CGEM2
> +enabled-by: true
> +links: []
> +name: BSP_XILINX_ZYNQMP_USE_CGEM2
> +type: build
> diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optcgem3.yml 
> b/spec/build/bsps/aarch64/xilinx-zynqmp/optcgem3.yml
> new file mode 100644
> index 00..8275ad3440
> --- /dev/null
> +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optcgem3.yml
> @@ -0,0 +1,16 @@
> +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
> +actions:
> +- get-boolean: null
> +- env-enable: null
> +- define-condition: null
> +build-type: option
> +copyrights:
> +- Copyright (C) 2021 On-Line Applications Research
> +default: true
> +default-by-variant: []
> +description: |
> +  Enable support for CGEM3
> +enabled-by: true
> +links: []
> +name: BSP_XILINX_ZYNQMP_USE_CGEM3
> +type: build
> 
___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel


Question about Raspberry Pi bspstarthooks.c - potential patch

2021-06-28 Thread Alan Cudmore
Hi,
The current RTEMS 6/master branch does not seem to work on the
Raspberry Pi single core models, while the 5 branch does.

I was able to track it down to a commit where it stopped working:
272534eb725f2486b7a32b39d998202a101bd36e

In that commit, the call:
 /* Clear Secure or Non-secure Vector Base Address Register */
  arm_cp15_set_vector_base_address(bsp_vector_table_begin);

Was moved from bsp_start_hook_0 to rpi_start_rtems_on_secondary_processor.

If I add it back to bsp_start_hook_0, the single core models work again.

I added it here to make it work:
https://git.rtems.org/rtems/tree/bsps/arm/raspberrypi/start/bspstarthooks.c#n72
It seems like it would be called for both the primary and secondary CPUs.

Before Pranav submits a patch, I thought it would be worth seeing if
there was a reason it was moved in the first place.. No need to keep
moving it back and forth.

Also, it's worth mentioning that we still have to troubleshoot SMP on
the Pi 2 and Pi 3. The samples like ticker, hello, unlimited work on
the Pi 2 and Pi 3, but when I try SMP tests, I don't get console
output.

Thanks,
Alan
___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel


[PATCH] bsps/cadence-spi: Fix moduleid offset

2021-06-28 Thread Kinsey Moore
Move the moduleid register to the correct offset according to Cadence IP
documentation.
---
 bsps/include/dev/spi/cadence-spi-regs.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/bsps/include/dev/spi/cadence-spi-regs.h 
b/bsps/include/dev/spi/cadence-spi-regs.h
index b4b2366b3d..207d056fb1 100644
--- a/bsps/include/dev/spi/cadence-spi-regs.h
+++ b/bsps/include/dev/spi/cadence-spi-regs.h
@@ -78,6 +78,7 @@ typedef struct {
uint32_t slave_idle_count;
uint32_t txthreshold;
uint32_t rxthreshold;
+   uint32_t unused[51];
uint32_t moduleid;
 } cadence_spi;
 
-- 
2.20.1

___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel


[PATCH] bsps/zynq-uart: Make post baud change kick global

2021-06-28 Thread Kinsey Moore
The existing fix for the ZynqMP UART hardware bug only caught the vast
majority of instances where it could occur. To fully fix the data
corruption, this fix must be applied after every baud rate change. This
makes the logic reset and kick apply in any locations where the baud
rate could be changed.
---
 bsps/aarch64/xilinx-zynqmp/console/console.c | 5 -
 bsps/shared/dev/serial/zynq-uart-polled.c| 6 ++
 bsps/shared/dev/serial/zynq-uart.c   | 8 
 3 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/bsps/aarch64/xilinx-zynqmp/console/console.c 
b/bsps/aarch64/xilinx-zynqmp/console/console.c
index 9886a117dc..d1948f1a0c 100644
--- a/bsps/aarch64/xilinx-zynqmp/console/console.c
+++ b/bsps/aarch64/xilinx-zynqmp/console/console.c
@@ -113,11 +113,6 @@ static void zynqmp_debug_console_early_init(char c)
 
   zynq_uart_initialize(base);
   BSP_output_char = zynqmp_debug_console_out;
-  /*
-   * Some ZynqMP UARTs have a hardware bug that causes TX/RX logic restarts to
-   * require a kick after baud rate registers are initialized.
-   */
-  zynqmp_debug_console_out(0);
   zynqmp_debug_console_out(c);
 }
 
diff --git a/bsps/shared/dev/serial/zynq-uart-polled.c 
b/bsps/shared/dev/serial/zynq-uart-polled.c
index 74e7255ec2..95c51dea11 100644
--- a/bsps/shared/dev/serial/zynq-uart-polled.c
+++ b/bsps/shared/dev/serial/zynq-uart-polled.c
@@ -144,6 +144,12 @@ void zynq_uart_initialize(rtems_termios_device_context 
*base)
   regs->control = ZYNQ_UART_CONTROL_RXEN
 | ZYNQ_UART_CONTROL_TXEN
 | ZYNQ_UART_CONTROL_RSTTO;
+
+  /*
+   * Some ZynqMP UARTs have a hardware bug that causes TX/RX logic restarts to
+   * require a kick after baud rate registers are initialized.
+   */
+  zynq_uart_write_polled(base, 0);
 }
 
 int zynq_uart_read_polled(rtems_termios_device_context *base)
diff --git a/bsps/shared/dev/serial/zynq-uart.c 
b/bsps/shared/dev/serial/zynq-uart.c
index cd0d0e7584..8503e31d49 100644
--- a/bsps/shared/dev/serial/zynq-uart.c
+++ b/bsps/shared/dev/serial/zynq-uart.c
@@ -214,9 +214,17 @@ static bool zynq_uart_set_attributes(
   if (baud > 0) {
 regs->baud_rate_gen = ZYNQ_UART_BAUD_RATE_GEN_CD(brgr);
 regs->baud_rate_div = ZYNQ_UART_BAUD_RATE_DIV_BDIV(bauddiv);
+regs->control |= ZYNQ_UART_CONTROL_RXRES
+  | ZYNQ_UART_CONTROL_TXRES;
   }
   regs->control |= ZYNQ_UART_CONTROL_RXEN | ZYNQ_UART_CONTROL_TXEN;
 
+  /*
+   * Some ZynqMP UARTs have a hardware bug that causes TX/RX logic restarts to
+   * require a kick after baud rate registers are initialized.
+   */
+  zynq_uart_write_polled(context, 0);
+
   return true;
 }
 
-- 
2.20.1

___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel


Re: [PATCH 0/6] Add aarch64/xilinx-versal

2021-06-28 Thread Sebastian Huber

Hello Gedare,

I get linker errors with this BSP:

Waf: Entering directory `/tmp/sh/b-rtems/aarch64/xilinx_versal_ilp32_vck190'
10:51:14 runner 'git rev-parse HEAD'
[1334/4030] Compiling bsps/aarch64/shared/start/start.S
10:51:16 runner ['/opt/rtems/6/bin/aarch64-rtems6-gcc', '-MMD', 
'-mcpu=cortex-a72', '-DASM', '-g', '-Icpukit/include', 
'-I/home/EB/sebastian_h/src/rtems/cpukit/include', 
'-Icpukit/score/cpu/aarch64/include', 
'-I/home/EB/sebastian_h/src/rtems/cpukit/score/cpu/aarch64/include', 
'-Ibsps/include', '-I/home/EB/sebastian_h/src/rtems/bsps/include', 
'-Ibsps/aarch64/include', 
'-I/home/EB/sebastian_h/src/rtems/bsps/aarch64/include', 
'-Ibsps/aarch64/xilinx-versal/include', 
'-I/home/EB/sebastian_h/src/rtems/bsps/aarch64/xilinx-versal/include', 
'/home/EB/sebastian_h/src/rtems/bsps/aarch64/shared/start/start.S', 
'-c', '-ostart.o']
[1438/4030] Linking 
/tmp/sh/b-rtems/aarch64/xilinx_versal_ilp32_vck190/testsuites/benchmarks/dhrystone.exe
10:51:16 runner ['/opt/rtems/6/bin/aarch64-rtems6-gcc', 
'testsuites/benchmarks/dhrystone/dhry_1.c.85.o', 
'testsuites/benchmarks/dhrystone/dhry_2.c.85.o', 
'testsuites/benchmarks/dhrystone/init.c.85.o', 
'-o/tmp/sh/b-rtems/aarch64/xilinx_versal_ilp32_vck190/testsuites/benchmarks/dhrystone.exe', 
'-Wl,-Bstatic', '-L.', '-lrtemscpu', '-lrtemsbsp', '-lrtemstest', 
'-Wl,-Bdynamic', '-qrtems', '-mcpu=cortex-a72', '-Wl,--gc-sections', 
'-L/home/EB/sebastian_h/src/rtems/bsps/aarch64/shared/start', 
'-L/home/EB/sebastian_h/src/rtems/bsps/aarch64/xilinx-versal/start', 
'-Wl,--wrap=printf', '-Wl,--wrap=puts']
/opt/rtems/6/lib/gcc/aarch64-rtems6/10.3.1/../../../../aarch64-rtems6/bin/ld: 
skipping incompatible start.o when searching for start.o
/opt/rtems/6/lib/gcc/aarch64-rtems6/10.3.1/../../../../aarch64-rtems6/bin/ld: 
skipping incompatible ./start.o when searching for start.o
/opt/rtems/6/lib/gcc/aarch64-rtems6/10.3.1/../../../../aarch64-rtems6/bin/ld: 
cannot find start.o
/opt/rtems/6/lib/gcc/aarch64-rtems6/10.3.1/../../../../aarch64-rtems6/bin/ld: 
skipping incompatible start.o when searching for start.o
/opt/rtems/6/lib/gcc/aarch64-rtems6/10.3.1/../../../../aarch64-rtems6/bin/ld: 
skipping incompatible ./start.o when searching for start.o

collect2: error: ld returned 1 exit status


--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hu...@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax:   +49-89-18 94 741 - 08

Registergericht: Amtsgericht München
Registernummer: HRB 157899
Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
Unsere Datenschutzerklärung finden Sie hier:
https://embedded-brains.de/datenschutzerklaerung/
___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel