RE: [PATCH 0/3] aarch64: boot in to EL1NS

These changes look good. I'm glad you were able to simplify this a bit. As for the test failures, they all fall into that category of timing sensitive tests that QEMU breaks with large bursts of near-simultaneous timer ticks. Kinsey -Original Message- From: devel On Behalf Of Gedare Bl

Re: [PATCH 0/3] aarch64: boot in to EL1NS

rtems-test results for xilinx-zynqmp_lp64_qemu with RTEMS_SMP: Passed:632 Failed: 5 User Input: 5 Expected Fail: 0 Indeterminate: 3 Benchmark: 3 Timeout: 1 Test too long: 1 Invalid: 0 Wrong Version: 0 Wrong Build: 0 Wrong Tools: 0 Wrong H

[PATCH 3/3] aarch64: always boot into EL1NS

Always start the executive in Exception Level 1, Non-Secure mode. If we boot in EL3 Secure with GICv3 then we have to initialize the distributor and redistributor to set up G1NS interrupts early in the boot sequence before stepping down from EL3S to EL1NS. Now there is no need to distinguish betwe

[PATCH 2/3] arm/gicv3: refactor DIST initialization to helper

--- bsps/shared/dev/irq/arm-gicv3.c | 60 - 1 file changed, 29 insertions(+), 31 deletions(-) diff --git a/bsps/shared/dev/irq/arm-gicv3.c b/bsps/shared/dev/irq/arm-gicv3.c index ea123d325e..b2bd947dd4 100644 --- a/bsps/shared/dev/irq/arm-gicv3.c +++ b/bsps/shared/

[PATCH 0/3] aarch64: boot in to EL1NS

This patch series resolves a lingering problem with the aarch64 port for the versal, which uses gicv3, that it is not possible to initialize the GIC distributor and redistributor (cpuif) while in the non-secure world. Previously we added a configuration option to allow running RTEMS in secure world

[PATCH 1/3] bsps/aarch64: refactor register init and hooks

--- bsps/aarch64/shared/start/start.S | 81 ++- .../xilinx-zynqmp/start/bspstarthooks.c | 12 +-- 2 files changed, 48 insertions(+), 45 deletions(-) diff --git a/bsps/aarch64/shared/start/start.S b/bsps/aarch64/shared/start/start.S index f03c7921ca..d5c7bdc3d5 1

Re: Malloc tests

On Thu, Jan 6, 2022 at 2:55 PM Gedare Bloom wrote: > > On Tue, Jan 4, 2022 at 6:10 PM zack leung wrote: > > > > Helllo , > > I'm working on a patch for malloc_get_usable size right now so far i have > > this test case for malloc, I just make sure that the value is null and i > > just malloc an i

[PATCH v2 1/2] microblaze: Add support for libbsd.

From: Jennifer Averett --- .../microblaze_fpga/dts/microblaze-dtb.c | 962 ++ .../microblaze/microblaze_fpga/dts/system.dts | 452 bsps/microblaze/microblaze_fpga/fdt/bsp_fdt.c | 21 + bsps/microblaze/microblaze_fpga/include/bsp.h | 4 + .../bsps/microblaze/micro

[PATCH v2 2/2] microblaze: Add support for libbsd networking

This includes fixes and improvements necessary to get libbsd networking running. --- .../microblaze/microblaze_fpga/dts/system.dts | 4 +-- bsps/microblaze/microblaze_fpga/fdt/bsp_fdt.c | 3 ++ bsps/microblaze/microblaze_fpga/include/bsp.h | 5 .../bsp/microblaze-dtb.h}

[PATCH v2 0/2] microblaze: libbsd support

v2: - Added a new BSP configuration option, "BSP_MICROBLAZE_FPGA_DTB_HEADER_PATH", which allows the user to override the device tree to match their FPGA configuration. This patch set adds support for libbsd to the MicroBlaze BSPs and contains fixes for issues found while debugging the rt

Re: Malloc tests

On Tue, Jan 4, 2022 at 6:10 PM zack leung wrote: > > Helllo , > I'm working on a patch for malloc_get_usable size right now so far i have > this test case for malloc, I just make sure that the value is null and i > just malloc an int and then i make a call to the function malloc_usable > size an