On 19/7/2022 5:18 pm, Sebastian Huber wrote:
> On 13/07/2022 11:24, Sebastian Huber wrote:
>> This makes the --enable-newlib-reent-thread-local
>> (_REENT_THREAD_LOCAL_STORAGE)
>> Newlib configuration option available.
>
> Any comments with respect to using the Newlib thread-local storage
>
Thank you everyone for supporting the move!
On Tue, Jul 19, 2022 at 3:24 PM Chris Johns wrote:
>
> Thanks to everyone for this effort.
>
> Vijay, if you need a hand doing this please ping me on discord.
I have moved it to the top level and added the hooks using the doc I
wrote last time:
Thanks to everyone for this effort.
Vijay, if you need a hand doing this please ping me on discord.
Chris
On 20/7/2022 12:40 am, Gedare Bloom wrote:
> On Wed, Jul 13, 2022 at 11:27 PM Christian MAUDERER
> wrote:
>>
>> Am 13.07.22 um 04:51 schrieb Chris Johns:
>>> On 13/7/2022 10:08 am, Joel
On 20/7/2022 5:42 am, Kinsey Moore wrote:
> ---
> user/bsps/aarch64/xilinx-zynqmp.rst | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/user/bsps/aarch64/xilinx-zynqmp.rst
> b/user/bsps/aarch64/xilinx-zynqmp.rst
> index 78bff12..58954d6 100644
> ---
On 20/7/2022 2:58 am, Kinsey Moore wrote:
> This alters the AArch64 page table generation and mapping code and MMU
> configuration to use page table level 0 in addition to levels 1, 2, and
> 3. This allows the mapping of up to 48 bits of memory space and is the
> maximum that can be mapped without
---
user/bsps/aarch64/xilinx-zynqmp.rst | 9 +
1 file changed, 9 insertions(+)
diff --git a/user/bsps/aarch64/xilinx-zynqmp.rst
b/user/bsps/aarch64/xilinx-zynqmp.rst
index 78bff12..58954d6 100644
--- a/user/bsps/aarch64/xilinx-zynqmp.rst
+++ b/user/bsps/aarch64/xilinx-zynqmp.rst
@@
On 19/07/2022 20:10, Sam Price wrote:
Where would the ti->offset member be updated / initialized at?
The caller of __tls_get_addr() has to do this. On ARM, this is function
is normally not used.
--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email:
At one point I believe a company tested the sptls tests, unsure if they did
this on qemu or hardware.
I'll try running those tests on a recent hash, and back when the company
ran those tests.
Where would the ti->offset member be updated / initialized at?
Only the arm, and microblaze bsps have
This alters the AArch64 page table generation and mapping code and MMU
configuration to use page table level 0 in addition to levels 1, 2, and
3. This allows the mapping of up to 48 bits of memory space and is the
maximum that can be mapped without relying on additional processor
extensions.
On 19/07/2022 14:51, Sam Price wrote:
On microblaze i was getting a
ESR: Unaligned data access exception
I narrowed this down to this "ti->offset;" being uninitialized in the
following two bsps
https://git.rtems.org/rtems/tree/cpukit/score/cpu/microblaze/__tls_get_addr.c
On Wed, Jul 13, 2022 at 11:27 PM Christian MAUDERER
wrote:
>
> Am 13.07.22 um 04:51 schrieb Chris Johns:
> > On 13/7/2022 10:08 am, Joel Sherrill wrote:
> >> Vijay and Kinsey have made great progress in addressing the issues that
> >> were
> >> raised about the lwip tcpip stack that needed to be
Hello Prashanth,
Am 19.07.22 um 15:09 schrieb Prashanth S:
Hi Christian,
This is to reply to review comments.
first question: You also worked on a driver for beagle DCAN. Did you
already adapt that driver to this API? If yes, it would be usefull to
post that as a patch too so that the
Hi Christian,
This is to reply to review comments.
> first question: You also worked on a driver for beagle DCAN. Did you
> already adapt that driver to this API? If yes, it would be usefull to
> post that as a patch too so that the direction and the method how it
> will be used is more clear.
On microblaze i was getting a
ESR: Unaligned data access exception
I narrowed this down to this "ti->offset;" being uninitialized in the
following two bsps
https://git.rtems.org/rtems/tree/cpukit/score/cpu/microblaze/__tls_get_addr.c
Also this file
cpukit/score/cpu/arm/__tls_get_addr.c
I tried
Hello,
we should also consider to use existing APIs and implementations for
stuff we do not yet have in RTEMS, for example:
https://docs.zephyrproject.org/latest/hardware/peripherals/adc.html
The Zephyr project uses device trees to statically configure device drivers:
Hello,
I would like to propose an ADC API that aims to create an interface for
reading analog value conveniently with blocking/non-blocking styles and
support custom transfer function for each pin. The API depends on the
new GPIO API.
Here are some features of the ADC API:
-
Hello Prashanth,
first question: You also worked on a driver for beagle DCAN. Did you
already adapt that driver to this API? If yes, it would be usefull to
post that as a patch too so that the direction and the method how it
will be used is more clear.
Note that some of my comments might
The rtems_task_delete() directive is basically just a combined pthread_cancel()
and pthread_join(). In addition, it removes the PTHREAD_DETACHED state. The
exit value returned by pthread_join() of threads cancelled by
rtems_task_delete() should reflect this by getting a PTHREAD_CANCELED value
On 13/07/2022 11:24, Sebastian Huber wrote:
This makes the --enable-newlib-reent-thread-local (_REENT_THREAD_LOCAL_STORAGE)
Newlib configuration option available.
Any comments with respect to using the Newlib thread-local storage
configuration option for arm, i386, microblaze, nios2, powerpc,
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