Re: [libbsd 00/22] Remove FreeBSD file descriptors and avoid VFS
On 11/07/2022 15:04, Sebastian Huber wrote: On 24/06/2022 08:33, Sebastian Huber wrote: This patch set removes the FreeBSD file descriptors. The VFS is no longer used if only the USB, SD/MMC, network, PCI, and NVMe support is used by the application. This change significantly reduce the memory usage of LibBSD for these applications. Using the media01 test case for the arm/lpc32xx BSP as a benchmark, the heap usage dropped from 14.3MiB to 10.2MiB. The "_BSD bufdaemon", "_BSD vnlru", "_BSD syncer", and "_BSD bufspacedaemon-" tasks are no longer present in media01. The code size is reduced by about 8KiB. The data size is reduced by about 30KiB. The throughput with a simple FTP test increased by about 1%. The "Remove FreeBSD file descriptors" change removes more lines than there are added. This change makes it easier to port the NFS support to the master branch since now the changes are more localized. I have a target with only 8MiB of RAM (for code and data). So, this patch set is not just a micro optimization. This pending patch set is currently a blocker for me. I would like to work on the NTP daemon integration and an update of the libbsd master branch to a more recent FreeBSD version. This patch set just restores what worked well for several years. -- embedded brains GmbH Herr Sebastian HUBER Dornierstr. 4 82178 Puchheim Germany email: sebastian.hu...@embedded-brains.de phone: +49-89-18 94 741 - 16 fax: +49-89-18 94 741 - 08 Registergericht: Amtsgericht München Registernummer: HRB 157899 Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler Unsere Datenschutzerklärung finden Sie hier: https://embedded-brains.de/datenschutzerklaerung/ ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 1/2] basp/aarch64: Make the unexpected sections origin address 64bit
On 7/24/2022 17:04, Chris Johns wrote: On 22/7/2022 11:14 pm, Kinsey Moore wrote: Has this patch been tested with ILP32? I suspect that this line might need to get yanked out to a shared lp64 linkcmds.base and a shared ilp32 linkcmds.base or this line pulled up into the bsp-specific linkcmds variants. No it has not been tested with ILP32. What is the test, linking? Yes, linking with an unexpected section present should suffice. I would have already checked myself if I weren't completely distracted this weekend. Kinsey ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH v4 3/7] bsps: Add GPIO API
Hello, On Mon, 2022-07-25 at 11:42 +1000, Chris Johns wrote: > On 23/7/2022 1:53 pm, Duc Doan wrote: > > This is the new GPIO API. The header file is > > gpio2.h. > > --- > > bsps/include/bsp/gpio2.h | 526 > > > > bsps/shared/dev/gpio/gpio.c | 189 + > > spec/build/bsps/obj.yml | 2 +- > > 3 files changed, 716 insertions(+), 1 deletion(-) > > create mode 100644 bsps/include/bsp/gpio2.h > > create mode 100644 bsps/shared/dev/gpio/gpio.c > > > > diff --git a/bsps/include/bsp/gpio2.h b/bsps/include/bsp/gpio2.h > > new file mode 100644 > > index 00..e4a106da8b > > --- /dev/null > > +++ b/bsps/include/bsp/gpio2.h > > @@ -0,0 +1,526 @@ > > +/** > > + * @file > > + * > > + * @ingroup rtems_gpio2 > > + * > > + * @brief RTEMS GPIO new API definition. > > + */ > > + > > +/* > > +* Copyright (c) 2022 Duc Doan > > +* > > +* The license and distribution terms for this file may be > > +* found in the file LICENSE in this distribution or at > > +* http://www.rtems.org/license/LICENSE. > > Please consider using the BSD license. > > Chris This is fixed in my v5 patch set. Best, Duc ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH v4 3/7] bsps: Add GPIO API
On 23/7/2022 1:53 pm, Duc Doan wrote: > This is the new GPIO API. The header file is > gpio2.h. > --- > bsps/include/bsp/gpio2.h| 526 > bsps/shared/dev/gpio/gpio.c | 189 + > spec/build/bsps/obj.yml | 2 +- > 3 files changed, 716 insertions(+), 1 deletion(-) > create mode 100644 bsps/include/bsp/gpio2.h > create mode 100644 bsps/shared/dev/gpio/gpio.c > > diff --git a/bsps/include/bsp/gpio2.h b/bsps/include/bsp/gpio2.h > new file mode 100644 > index 00..e4a106da8b > --- /dev/null > +++ b/bsps/include/bsp/gpio2.h > @@ -0,0 +1,526 @@ > +/** > + * @file > + * > + * @ingroup rtems_gpio2 > + * > + * @brief RTEMS GPIO new API definition. > + */ > + > +/* > +* Copyright (c) 2022 Duc Doan > +* > +* The license and distribution terms for this file may be > +* found in the file LICENSE in this distribution or at > +* http://www.rtems.org/license/LICENSE. Please consider using the BSD license. Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: confdefs.h bintime undefined compile error
On Sun, Jul 24, 2022 at 11:20 AM Joel Sherrill wrote: > Hi > > Attached is a pretty simple RTEMS application that does not compile when > -std=c99 is included on the compile line. > > arm-rtems6-gcc -B > /home/joel/rtems-work/tools/6/bsp-install/arm-rtems6/xilinx_zynq_a9_qemu/lib/ > -qrtems -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard -mtune=cortex-a9 > -O0 -g -ffunction-sections -fdata-sections -g -Wall -std=c99 -pthread > -Wno-nonnull-compare -c /tmp/rtems_config.c -o /tmp/rtems_config.o > In file included from > /home/joel/rtems-work/tools/6/bsp-install/arm-rtems6/xilinx_zynq_a9_qemu/lib/include/rtems/confdefs/libio.h:135, > from > /home/joel/rtems-work/tools/6/bsp-install/arm-rtems6/xilinx_zynq_a9_qemu/lib/include/rtems/confdefs.h:70, > from /tmp/rtems_config.c:21: > /home/joel/rtems-work/tools/6/bsp-install/arm-rtems6/xilinx_zynq_a9_qemu/lib/include/rtems/imfs.h: > In function '_IMFS_get_time': > /home/joel/rtems-work/tools/6/bsp-install/arm-rtems6/xilinx_zynq_a9_qemu/lib/include/rtems/imfs.h:377:18: > error: storage size of 'now' isn't known > 377 | struct bintime now; > > Dropping -std=c99 resolves this. I'm guessing turning on some BSD > visibility flag would do the same but it shouldn't be needed. Any ideas for > a real fix? > > Do we have any test cases which ensure the headers compile as C99? All > published POSIX versions assume C99. > It isn't just c99. C11 and C17 also cause this. It is turning on the "standard" which turns off many extensions. Internally, this header needs to enable BSD extensions. > > --joel > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 1/2] basp/aarch64: Make the unexpected sections origin address 64bit
On 22/7/2022 11:14 pm, Kinsey Moore wrote: > Has this patch been tested with ILP32? I suspect that this line might need to > get yanked out to a shared lp64 linkcmds.base and a shared ilp32 linkcmds.base > or this line pulled up into the bsp-specific linkcmds variants. No it has not been tested with ILP32. What is the test, linking? Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 1/3] bsps/stm32h7: add board C files for nucleo-h7a3zi BSP
Besides C files for the BSP variant the patch also provides license
clarification on system_stm32h7xx.c file which is provided
in boards/stm/nucleo-h7a3zi directory.
The files comes from STM32CubeH7 project and references "root directory"
in its license comment and it's not clear where this points out.
Let's add clarification comment about it and also based on it
and resulting license let's add SPDX license identifier.
---
.../stm/nucleo-h7a3zi/stm32h7-bspstarthooks.c | 77
.../stm/nucleo-h7a3zi/stm32h7-config-clk.c| 45 ++
.../stm/nucleo-h7a3zi/stm32h7-config-osc.c| 49 +++
.../stm/nucleo-h7a3zi/stm32h7-config-per.c| 49 +++
.../stm/nucleo-h7a3zi/system_stm32h7xx.c | 391 ++
5 files changed, 611 insertions(+)
create mode 100644
bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/stm32h7-bspstarthooks.c
create mode 100644
bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/stm32h7-config-clk.c
create mode 100644
bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/stm32h7-config-osc.c
create mode 100644
bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/stm32h7-config-per.c
create mode 100644 bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/system_stm32h7xx.c
diff --git a/bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/stm32h7-bspstarthooks.c
b/bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/stm32h7-bspstarthooks.c
new file mode 100644
index 00..eda503925f
--- /dev/null
+++ b/bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/stm32h7-bspstarthooks.c
@@ -0,0 +1,77 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+void bsp_start_hook_0(void)
+{
+ if ((RCC->AHB3ENR & RCC_AHB3ENR_FMCEN) == 0) {
+/*
+ * Only perform the low-level initialization if necessary. An initialized
+ * FMC indicates that a boot loader already performed the low-level
+ * initialization.
+ */
+SystemInit();
+stm32h7_init_power();
+stm32h7_init_oscillator();
+stm32h7_init_clocks();
+stm32h7_init_peripheral_clocks();
+HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1);
+HAL_Init();
+ }
+
+#if __CORTEX_M == 0x07U
+ if ((SCB->CCR & SCB_CCR_IC_Msk) == 0) {
+SCB_EnableICache();
+ }
+
+ if ((SCB->CCR & SCB_CCR_DC_Msk) == 0) {
+SCB_EnableDCache();
+ }
+
+ _ARMV7M_MPU_Setup(stm32h7_config_mpu_region,
stm32h7_config_mpu_region_count);
+#endif
+}
+
+void bsp_start_hook_1(void)
+{
+ bsp_start_copy_sections_compact();
+#if __CORTEX_M == 0x07U
+ SCB_CleanDCache();
+ SCB_InvalidateICache();
+#endif
+ bsp_start_clear_bss();
+}
diff --git a/bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/stm32h7-config-clk.c
b/bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/stm32h7-config-clk.c
new file mode 100644
index 00..c7e62179ce
--- /dev/null
+++ b/bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/stm32h7-config-clk.c
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYR
[PATCH 3/3] bsps/stm32h7: disable Ethernet completely on nucleo-h7a3zi BSP
The board and hosted MCU do not provide any Ethernet support anyway.
---
bsps/arm/stm32h7/start/stm32h7-hal-eth.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
b/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
index 5fc75f0147..173d97c31f 100644
--- a/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
+++ b/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
@@ -33,7 +33,7 @@
#include
-#ifndef STM32H7B3xxQ
+#if !defined(STM32H7B3xxQ) && !defined(STM32H7A3xxQ)
static const stm32h7_gpio_config gpiog = {
.regs = GPIOG,
--
2.25.1
___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel
[PATCH 2/3] bsps/stm32h7: add configuration and enable build of nucleo-h7a3zi BSP
---
.../bsps/arm/stm32h7/bspnucleoh7a3zi.yml | 25 +++
spec/build/bsps/arm/stm32h7/opthse.yml| 1 +
spec/build/bsps/arm/stm32h7/optlinkcmds.yml | 1 +
.../bsps/arm/stm32h7/optmemflashlatency.yml | 1 +
.../build/bsps/arm/stm32h7/optmemsdram1sz.yml | 1 +
.../bsps/arm/stm32h7/optmemsramaxisz.yml | 1 +
.../bsps/arm/stm32h7/optprintkinstance.yml| 1 +
spec/build/bsps/arm/stm32h7/optpwrsupply.yml | 1 +
spec/build/bsps/arm/stm32h7/optvariant.yml| 3 +++
9 files changed, 35 insertions(+)
create mode 100644 spec/build/bsps/arm/stm32h7/bspnucleoh7a3zi.yml
diff --git a/spec/build/bsps/arm/stm32h7/bspnucleoh7a3zi.yml
b/spec/build/bsps/arm/stm32h7/bspnucleoh7a3zi.yml
new file mode 100644
index 00..d3e47a528a
--- /dev/null
+++ b/spec/build/bsps/arm/stm32h7/bspnucleoh7a3zi.yml
@@ -0,0 +1,25 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: nucleo-h7a3zi
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: stm32h7
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+- role: build-dependency
+ uid: tststm32h757i-eval
+source:
+- bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/stm32h7-bspstarthooks.c
+- bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/stm32h7-config-clk.c
+- bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/stm32h7-config-osc.c
+- bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/stm32h7-config-per.c
+- bsps/arm/stm32h7/boards/stm/nucleo-h7a3zi/system_stm32h7xx.c
+- bsps/arm/shared/cache/cache-v7m.c
+type: build
diff --git a/spec/build/bsps/arm/stm32h7/opthse.yml
b/spec/build/bsps/arm/stm32h7/opthse.yml
index e5feef1114..9fcdc4d4fb 100644
--- a/spec/build/bsps/arm/stm32h7/opthse.yml
+++ b/spec/build/bsps/arm/stm32h7/opthse.yml
@@ -9,6 +9,7 @@ default-by-variant:
- value: 800
variants:
- arm/nucleo-h743zi
+ - arm/nucleo-h7a3zi
- value: 2400
variants:
- arm/stm32h7b3i-dk
diff --git a/spec/build/bsps/arm/stm32h7/optlinkcmds.yml
b/spec/build/bsps/arm/stm32h7/optlinkcmds.yml
index 3103deef84..f28dfd78d3 100644
--- a/spec/build/bsps/arm/stm32h7/optlinkcmds.yml
+++ b/spec/build/bsps/arm/stm32h7/optlinkcmds.yml
@@ -12,6 +12,7 @@ default-by-variant:
- arm/stm32h747i-disco
- arm/stm32h747i-disco-m4
- arm/nucleo-h743zi
+ - arm/nucleo-h7a3zi
enabled-by: true
format: '{}'
links: []
diff --git a/spec/build/bsps/arm/stm32h7/optmemflashlatency.yml
b/spec/build/bsps/arm/stm32h7/optmemflashlatency.yml
index cf5422acb6..27d9b541d9 100644
--- a/spec/build/bsps/arm/stm32h7/optmemflashlatency.yml
+++ b/spec/build/bsps/arm/stm32h7/optmemflashlatency.yml
@@ -7,6 +7,7 @@ default-by-variant:
- value: FLASH_LATENCY_6
variants:
- arm/stm32h7b3i-dk
+ - arm/nucleo-h7a3zi
enabled-by: true
format: '{}'
links: []
diff --git a/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml
b/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml
index 9a29e9f04f..395d3fb904 100644
--- a/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml
+++ b/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml
@@ -12,6 +12,7 @@ default-by-variant:
- arm/stm32h747i-disco
- arm/stm32h747i-disco-m4
- arm/nucleo-h743zi
+ - arm/nucleo-h7a3zi
enabled-by: true
format: '{:#010x}'
links: []
diff --git a/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml
b/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml
index 89e116c1de..90fe7811a0 100644
--- a/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml
+++ b/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml
@@ -7,6 +7,7 @@ default-by-variant:
- value: 0xA
variants:
- arm/stm32h7b3i-dk
+ - arm/nucleo-h7a3zi
enabled-by: true
format: '{:#010x}'
links: []
diff --git a/spec/build/bsps/arm/stm32h7/optprintkinstance.yml
b/spec/build/bsps/arm/stm32h7/optprintkinstance.yml
index 5e87aaab1f..10b6786a1f 100644
--- a/spec/build/bsps/arm/stm32h7/optprintkinstance.yml
+++ b/spec/build/bsps/arm/stm32h7/optprintkinstance.yml
@@ -7,6 +7,7 @@ default-by-variant:
- value: stm32h7_usart3_instance
variants:
- arm/nucleo-h743zi
+ - arm/nucleo-h7a3zi
enabled-by: true
format: '{}'
links: []
diff --git a/spec/build/bsps/arm/stm32h7/optpwrsupply.yml
b/spec/build/bsps/arm/stm32h7/optpwrsupply.yml
index effdbbffe0..9b5461fac7 100644
--- a/spec/build/bsps/arm/stm32h7/optpwrsupply.yml
+++ b/spec/build/bsps/arm/stm32h7/optpwrsupply.yml
@@ -11,6 +11,7 @@ default-by-variant:
- arm/stm32h757i-eval-m4
- arm/stm32h747i-disco
- arm/stm32h747i-disco-m4
+ - arm/nucleo-h7a3zi
enabled-by: true
format: '{}'
links: []
diff --git a/spec/build/bsps/arm/stm32h7/optvariant.yml
b/spec/build/bsps/arm/stm32h7/optvariant.yml
index 720a40c63d..e2790a0f25 100644
--- a/spec/build/bsps/arm/stm32h7/optvariant.yml
+++ b/spec/build/bsps/arm/stm32h7/optvariant.yml
@@ -25,6 +25,9 @@ default-by-variant:
variants:
- arm/stm32h747i-disco
- arm/stm32h747i-disco-m4
+- value: STM32H7A3xxQ
+ variants:
+- arm/nucleo-h7a3zi
confdefs.h bintime undefined compile error
Hi Attached is a pretty simple RTEMS application that does not compile when -std=c99 is included on the compile line. arm-rtems6-gcc -B /home/joel/rtems-work/tools/6/bsp-install/arm-rtems6/xilinx_zynq_a9_qemu/lib/ -qrtems -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard -mtune=cortex-a9 -O0 -g -ffunction-sections -fdata-sections -g -Wall -std=c99 -pthread -Wno-nonnull-compare -c /tmp/rtems_config.c -o /tmp/rtems_config.o In file included from /home/joel/rtems-work/tools/6/bsp-install/arm-rtems6/xilinx_zynq_a9_qemu/lib/include/rtems/confdefs/libio.h:135, from /home/joel/rtems-work/tools/6/bsp-install/arm-rtems6/xilinx_zynq_a9_qemu/lib/include/rtems/confdefs.h:70, from /tmp/rtems_config.c:21: /home/joel/rtems-work/tools/6/bsp-install/arm-rtems6/xilinx_zynq_a9_qemu/lib/include/rtems/imfs.h: In function '_IMFS_get_time': /home/joel/rtems-work/tools/6/bsp-install/arm-rtems6/xilinx_zynq_a9_qemu/lib/include/rtems/imfs.h:377:18: error: storage size of 'now' isn't known 377 | struct bintime now; Dropping -std=c99 resolves this. I'm guessing turning on some BSD visibility flag would do the same but it shouldn't be needed. Any ideas for a real fix? Do we have any test cases which ensure the headers compile as C99? All published POSIX versions assume C99. --joel rtems_config.c Description: Binary data ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Fwd: [rtems-bsp-builder] 2022-07-23 23:03:59: Profile(s): everything
Looks like some tests are two big for some lpc BSPs. I haven't looked into all the bfin failures. Those are new. The Microblaze ones are the linker script issue a patch was posted for. I need to push that. -- Forwarded message - From: OAR Tester Date: Sun, Jul 24, 2022, 5:24 AM Subject: [rtems-bsp-builder] 2022-07-23 23:03:59: Profile(s): everything To: RTEMS Tools Project - RTEMS Kernel BSP Builder, 6.0.not_released Host: FreeBSD 12.2-RELEASE r366954 GENERIC command: /home/tester/rtems-cron-6/tools/6/bin/rtems-bsp-builder\ --rtems=/home/tester/rtems-cron-6/rtems --build-\ path=/home/tester/rtems-cron-6/build --prefix=/home/tester/rtems-\ cron-6/tools/6/bsps --log=/home/tester/rtems-cron-6/bsp-\ builder.log --warnings-report=warnings.log --mail --use-gitconfig\ --profiles=everything Total Time: 6:20:39.191204 for 1260 completed job(s) Average BSP Build Time: 0:00:18.126342 Builds == debug no-posix posix posix-debug posix-profiling profiling smp smp-debug Failures Report === 1 debug arm/lpc1768_mbed_ahb_ram_eth build: configure: /home/tester/rtems-cron-6/rtems/waf configure\ --prefix=/home/tester/rtems-cron-6/tools/6/bsps\ --top=/home/tester/rtems-cron-6/rtems --rtems-config=config-arm-\ lpc1768_mbed_ahb_ram_eth-debug.ini error: usr/home/tester/rtems-cron-6/tools/6/arm- rtems6/bin/ld:linkcmds.base:348 cannot move location counter backwards (from 20080b98 to 2008) error: ld/collect2:0 error: linkcmds.base:348 cannot move location counter backwards (from 20080b98 to 2008) 2 no-posix arm/lpc1768_mbed_ahb_ram_eth build: configure: /home/tester/rtems-cron-6/rtems/waf configure\ --prefix=/home/tester/rtems-cron-6/tools/6/bsps\ --top=/home/tester/rtems-cron-6/rtems --rtems-config=config-arm-\ lpc1768_mbed_ahb_ram_eth-no-posix.ini error: usr/home/tester/rtems-cron-6/tools/6/arm- rtems6/bin/ld:linkcmds.base:348 cannot move location counter backwards (from 20080a00 to 2008) error: ld/collect2:0 error: linkcmds.base:348 cannot move location counter backwards (from 20080a00 to 2008) 3 posix arm/lpc1768_mbed_ahb_ram_eth build: configure: /home/tester/rtems-cron-6/rtems/waf configure\ --prefix=/home/tester/rtems-cron-6/tools/6/bsps\ --top=/home/tester/rtems-cron-6/rtems --rtems-config=config-arm-\ lpc1768_mbed_ahb_ram_eth-posix.ini error: usr/home/tester/rtems-cron-6/tools/6/arm- rtems6/bin/ld:linkcmds.base:348 cannot move location counter backwards (from 20081288 to 2008) error: ld/collect2:0 error: linkcmds.base:348 cannot move location counter backwards (from 20081288 to 2008) 4 posix-debug arm/lpc1768_mbed_ahb_ram_eth build: configure: /home/tester/rtems-cron-6/rtems/waf configure\ --prefix=/home/tester/rtems-cron-6/tools/6/bsps\ --top=/home/tester/rtems-cron-6/rtems --rtems-config=config-arm-\ lpc1768_mbed_ahb_ram_eth-posix-debug.ini error: usr/home/tester/rtems-cron-6/tools/6/arm- rtems6/bin/ld:linkcmds.base:348 cannot move location counter backwards (from 20081420 to 2008) error: ld/collect2:0 error: linkcmds.base:348 cannot move location counter backwards (from 20081420 to 2008) 5 posix-profiling arm/lpc1768_mbed_ahb_ram_eth build: configure: /home/tester/rtems-cron-6/rtems/waf configure\ --prefix=/home/tester/rtems-cron-6/tools/6/bsps\ --top=/home/tester/rtems-cron-6/rtems --rtems-config=config-arm-\ lpc1768_mbed_ahb_ram_eth-posix-profiling.ini error: usr/home/tester/rtems-cron-6/tools/6/arm- rtems6/bin/ld:linkcmds.base:348 cannot move location counter backwards (from 20081288 to 2008) error: ld/collect2:0 error: linkcmds.base:348 cannot move location counter backwards (from 20081288 to 2008) 6 profiling arm/lpc1768_mbed_ahb_ram_eth build: configure: /home/tester/rtems-cron-6/rtems/waf configure\ --prefix=/home/tester/rtems-cron-6/tools/6/bsps\ --top=/home/tester/rtems-cron-6/rtems --rtems-config=config-arm-\ lpc1768_mbed_ahb_ram_eth-profiling.ini error: usr/home/tester/rtems-cron-6/tools/6/arm- rtems6/bin/ld:linkcmds.base:348 cannot move location counter backwards (from 20080a00 to 2008) error: ld/collect2:0 error: linkcmds.base:348 cannot move location counter backwards (from 20080a00 to 2008) 7 debug bfin/TLL6527M configure: configure: /home/tester/rtems-cr
Re: libbsd tests not linking
On Sun, Jul 24, 2022, 7:55 AM Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > On 24/07/2022 00:31, Joel Sherrill wrote: > > Binary file > > > build/arm-rtems6-xilinx_zynq_a9_qemu-default/freebsd/lib/libc/stdio/fgetln.c.12.o > > > matches > > Binary file build/arm-rtems6-xilinx_zynq_a9_qemu-default/libbsd.a matches > > > b.log:/home/joel/rtems-work/rtems-libbsd/build/arm-rtems6-xilinx_zynq_a9_qemu-default/../../freebsd/lib/libc/stdio/fgetln.c:150: > > > undefined reference to `__getreent' > > > > Looks like it is coming from here. > > > > freebsd/lib/libc/stdio/local.h:#define __srefill(_x) > > __srefill_r(__getreent(), _x) > > Sorry, I forgot to push the fix. It should work now. > Thanks. This will let me remove the hack I did to keep compiling. I think I have a case where confdef.h needs bintime which implies bsd stuff is visible but isn't. I'll get back to you on that. --joel > > -- > embedded brains GmbH > Herr Sebastian HUBER > Dornierstr. 4 > 82178 Puchheim > Germany > email: sebastian.hu...@embedded-brains.de > phone: +49-89-18 94 741 - 16 > fax: +49-89-18 94 741 - 08 > > Registergericht: Amtsgericht München > Registernummer: HRB 157899 > Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler > Unsere Datenschutzerklärung finden Sie hier: > https://embedded-brains.de/datenschutzerklaerung/ > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: libbsd tests not linking
On 24/07/2022 00:31, Joel Sherrill wrote: Binary file build/arm-rtems6-xilinx_zynq_a9_qemu-default/freebsd/lib/libc/stdio/fgetln.c.12.o matches Binary file build/arm-rtems6-xilinx_zynq_a9_qemu-default/libbsd.a matches b.log:/home/joel/rtems-work/rtems-libbsd/build/arm-rtems6-xilinx_zynq_a9_qemu-default/../../freebsd/lib/libc/stdio/fgetln.c:150: undefined reference to `__getreent' Looks like it is coming from here. freebsd/lib/libc/stdio/local.h:#define __srefill(_x) __srefill_r(__getreent(), _x) Sorry, I forgot to push the fix. It should work now. -- embedded brains GmbH Herr Sebastian HUBER Dornierstr. 4 82178 Puchheim Germany email: sebastian.hu...@embedded-brains.de phone: +49-89-18 94 741 - 16 fax: +49-89-18 94 741 - 08 Registergericht: Amtsgericht München Registernummer: HRB 157899 Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler Unsere Datenschutzerklärung finden Sie hier: https://embedded-brains.de/datenschutzerklaerung/ ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH v5 4/4] bsps/stm32f4: Implementation for GPIO and ADC
---
bsps/arm/stm32f4/adc/adc.c| 655 ++
bsps/arm/stm32f4/gpio/gpio.c | 542 +++
bsps/arm/stm32f4/include/bsp.h| 4 -
bsps/arm/stm32f4/include/bsp/stm32f4_adc.h| 209 ++
bsps/arm/stm32f4/include/bsp/stm32f4_gpio.h | 273
bsps/arm/stm32f4/include/bsp/stm32f4_hal.h| 17 +
bsps/arm/stm32f4/include/bsp/stm32f4_periph.h | 50 ++
bsps/arm/stm32f4/start/bspstart.c | 7 +-
bsps/arm/stm32f4/start/bspstarthook.c | 8 +
bsps/arm/stm32f4/start/periph.c | 58 ++
spec/build/bsps/arm/stm32f4/grp.yml | 6 +-
spec/build/bsps/arm/stm32f4/obj.yml | 5 +
spec/build/bsps/arm/stm32f4/optengpio.yml | 16 +
.../build/bsps/arm/stm32f4/optnumgpioctrl.yml | 16 +
14 files changed, 1856 insertions(+), 10 deletions(-)
create mode 100644 bsps/arm/stm32f4/adc/adc.c
create mode 100644 bsps/arm/stm32f4/gpio/gpio.c
create mode 100644 bsps/arm/stm32f4/include/bsp/stm32f4_adc.h
create mode 100644 bsps/arm/stm32f4/include/bsp/stm32f4_gpio.h
create mode 100644 bsps/arm/stm32f4/include/bsp/stm32f4_hal.h
create mode 100644 bsps/arm/stm32f4/include/bsp/stm32f4_periph.h
create mode 100644 bsps/arm/stm32f4/start/periph.c
create mode 100644 spec/build/bsps/arm/stm32f4/optengpio.yml
create mode 100644 spec/build/bsps/arm/stm32f4/optnumgpioctrl.yml
diff --git a/bsps/arm/stm32f4/adc/adc.c b/bsps/arm/stm32f4/adc/adc.c
new file mode 100644
index 00..21baa9ee2c
--- /dev/null
+++ b/bsps/arm/stm32f4/adc/adc.c
@@ -0,0 +1,655 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2022 Duc Doan (dtbpkmte at gmail.com)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include
+#include
+#include
+
+#if defined(ADC3)
+#define NUM_ADC 3
+#elif defined(ADC2)
+#define NUM_ADC 2
+#else
+#define NUM_ADC 1
+#endif
+
+/** Interrupt manager */
+typedef struct {
+void *arg;
+stm32f4_gpio *gpio;
+} stm32f4_interrupt_arg;
+
+typedef struct {
+stm32f4_interrupt_arg arg;
+rtems_gpio_isr isr;
+} stm32f4_interrupt;
+
+void adc_irq_handler(void *arg);
+
+static stm32f4_interrupt isr_table[NUM_ADC];
+
+/**
+ * This tells if there is already an ISR registered at each
+ * table index (element set to true).
+ */
+static bool isr_registered[NUM_ADC] = {0};
+
+typedef struct {
+uint32_t adc_value;
+rtems_adc_status status;
+} stm32f4_adc_data;
+static stm32f4_adc_data adc_data[NUM_ADC] = {0};
+
+static rtems_status_code stm32f4_adc_select_channel(
+rtems_gpio *base
+);
+
+/***/
+#ifdef ADC1
+static ADC_TypeDef_Protected _ADC1_protected = { ADC1, false };
+ADC_TypeDef_Protected *const ADC1_protected = &_ADC1_protected;
+#endif
+#ifdef ADC2
+static ADC_TypeDef_Protected _ADC2_protected = { ADC2, false };
+ADC_TypeDef_Protected *const ADC2_protected = &_ADC2_protected;
+#endif
+#ifdef ADC3
+static ADC_TypeDef_Protected _ADC3_protected = { ADC3, false };
+ADC_TypeDef_Protected *const ADC3_protected = &_ADC3_protected;
+#endif
+
+/* Helpers */
+#define STM32F4_GET_ADC_NUMBER(ADCx) \
+( (uintptr_t) ( ADCx ) == (uintptr_t) ADC1 ? 1 : \
+ (uintptr_t) ( ADCx ) == (uintptr_t) ADC2 ? 2 : \
+ (uintptr_t) ( ADCx ) == (uintptr_t) ADC3 ? 3 : \
+ 0 )
+#define STM32F4_GET_ADCx_FROM_NUMBER(num) (\
+( num ) == 1 ? ADC1 :\
+( num ) == 2 && NUM_ADC >= 2 ? ADC2 :\
+( num ) == 3 && NUM_ADC == 3 ? ADC3 :\
+ NULL)
+#define STM32F4_GET_ADCx_PROTECTED_FROM_NUMBER(num) (\
+( num ) == 1 ? ADC1_prot
[PATCH v5 3/4] bsps: Add ADC API
---
bsps/include/bsp/adc.h| 292 ++
bsps/shared/dev/adc/adc.c | 200 +++
spec/build/bsps/bspopts.yml | 4 +
spec/build/bsps/obj.yml | 2 +
spec/build/bsps/optenadc.yml | 16 ++
spec/build/bsps/optnumadc.yml | 16 ++
6 files changed, 530 insertions(+)
create mode 100644 bsps/include/bsp/adc.h
create mode 100644 bsps/shared/dev/adc/adc.c
create mode 100644 spec/build/bsps/optenadc.yml
create mode 100644 spec/build/bsps/optnumadc.yml
diff --git a/bsps/include/bsp/adc.h b/bsps/include/bsp/adc.h
new file mode 100644
index 00..d168e1b201
--- /dev/null
+++ b/bsps/include/bsp/adc.h
@@ -0,0 +1,292 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2022 Duc Doan (dtbpkmte at gmail.com)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LIBBSP_BSP_ADC_H
+#define LIBBSP_BSP_ADC_H
+
+#include
+#include
+#include
+#include
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+typedef enum {
+RTEMS_ADC_NOT_STARTED = 0,
+RTEMS_ADC_NOT_READY,
+RTEMS_ADC_READY
+} rtems_adc_status;
+
+typedef enum {
+RTEMS_ADC_ALIGN_LEFT,
+RTEMS_ADC_ALIGN_RIGHT
+} rtems_adc_align;
+
+typedef enum {
+RTEMS_ADC_NB_INTERRUPT,
+RTEMS_ADC_NB_DMA
+} rtems_adc_nb_mode;
+
+/**
+ * @brief Enumeration of reference voltages.
+ */
+typedef enum {
+RTEMS_ADC_REF_DEFAULT = 0,
+RTEMS_ADC_REF_INTERNAL,
+RTEMS_ADC_REF_EXTERNAL
+} rtems_adc_ref;
+
+#define RTEMS_ADC_NO_TIMEOUT 0xU
+
+typedef void (*rtems_adc_isr)(void *);
+typedef double (*rtems_adc_tf) (void *params, uint32_t raw_value);
+typedef struct rtems_adc_handlers rtems_adc_handlers;
+typedef struct rtems_adc_api rtems_adc_api;
+
+/**
+ * @brief Macro to help creating a rtems_adc_api object.
+ *
+ * Each BSP/driver must define its own handlers and create an object
+ * of this struct with pointers to those handlers.
+ */
+#define RTEMS_ADC_BUILD_API(\
+_init, \
+_read_raw, \
+_start_read_raw_nb, \
+_read_raw_nb, \
+_set_resolution,\
+_set_alignment, \
+_configure_interrupt, \
+_remove_interrupt, \
+_enable_interrupt, \
+_disable_interrupt) \
+{ \
+.base = { \
+.api_type = RTEMS_PERIPH_API_TYPE_ADC, \
+.init = _init \
+}, \
+.read_raw = ( _read_raw ), \
+.start_read_raw_nb = ( _start_read_raw_nb ),\
+.read_raw_nb = ( _read_raw_nb ),\
+.set_resolution = ( _set_resolution ), \
+.set_alignment = ( _set_alignment ),\
+.configure_interrupt = ( _configure_interrupt ),\
+.remove_interrupt = ( _remove_interrupt ), \
+.enable_interrupt = ( _enable_interrupt ), \
+.disable_interrupt = ( _disable_interrupt ),\
+};
+
+struct rtems_adc_api {
+/**
+ * @brief Contain base structure rtems_per
[PATCH v5 2/4] bsps: New GPIO API & peripherals API framework
---
bsps/include/bsp/gpio2.h| 528
bsps/include/bsp/periph_api.h | 142 +++
bsps/shared/dev/gpio/gpio.c | 212 ++
bsps/shared/dev/periph_api/periph_api.c | 101 +
spec/build/bsps/obj.yml | 4 +-
5 files changed, 986 insertions(+), 1 deletion(-)
create mode 100644 bsps/include/bsp/gpio2.h
create mode 100644 bsps/include/bsp/periph_api.h
create mode 100644 bsps/shared/dev/gpio/gpio.c
create mode 100644 bsps/shared/dev/periph_api/periph_api.c
diff --git a/bsps/include/bsp/gpio2.h b/bsps/include/bsp/gpio2.h
new file mode 100644
index 00..9cb1c720ab
--- /dev/null
+++ b/bsps/include/bsp/gpio2.h
@@ -0,0 +1,528 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2022 Duc Doan (dtbpkmte at gmail.com)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LIBBSP_BSP_GPIO2_H
+#define LIBBSP_BSP_GPIO2_H
+
+#include
+#include
+
+/**
+ * Configure the maximum number of GPIO controllers used in
+ * a application.
+ *
+ * The macro CONFIGURE_GPIO_MAXIMUM_CONTROLLERS can be
+ * defined in application code. If it is not defined,
+ * it will default to BSP_GPIO_NUM_CONTROLLERS. If BSP's
+ * number of controllers is not defined, it will default
+ * to 1.
+ */
+#ifndef CONFIGURE_GPIO_MAXIMUM_CONTROLLERS
+
+#ifndef BSP_GPIO_NUM_CONTROLLERS
+#define CONFIGURE_GPIO_MAXIMUM_CONTROLLERS 1
+#else
+#define CONFIGURE_GPIO_MAXIMUM_CONTROLLERS BSP_GPIO_NUM_CONTROLLERS
+#endif /* BSP_GPIO_NUM_CONTROLLERS */
+
+#endif /* CONFIGURE_GPIO_MAXIMUM_CONTROLLERS */
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/**
+ * @brief Macro to initialize rtems_gpio.
+ *
+ * @param gpioh pointer to GPIO handlers
+ */
+#define RTEMS_GPIO_BUILD_BASE(_gpio_handlers) \
+(rtems_gpio) { .virtual_pin = 0,\
+ .gpio_handlers = ( _gpio_handlers ), \
+ .api = NULL \
+};
+
+/**
+ * @name GPIO data structures
+ *
+ * @{
+ */
+
+/**
+ * @brief GPIO bit set and reset enumeration.
+ */
+typedef enum {
+RTEMS_GPIO_PIN_RESET = 0,
+RTEMS_GPIO_PIN_SET = 1
+} rtems_gpio_pin_state;
+
+/**
+ * @brief GPIO pin modes.
+ */
+typedef enum {
+RTEMS_GPIO_PINMODE_OUTPUT = 0,
+RTEMS_GPIO_PINMODE_OUTPUT_PP = 0,
+RTEMS_GPIO_PINMODE_OUTPUT_OD = 1,
+RTEMS_GPIO_PINMODE_INPUT = 2,
+RTEMS_GPIO_PINMODE_ANALOG = 3,
+RTEMS_GPIO_PINMODE_BSP_SPECIFIC = 4
+} rtems_gpio_pin_mode;
+
+/**
+ * @brief GPIO pull resistor configuration. Defines pull-up or
+ *pull-down activation.
+ */
+typedef enum {
+RTEMS_GPIO_NOPULL,
+RTEMS_GPIO_PULLUP,
+RTEMS_GPIO_PULLDOWN
+} rtems_gpio_pull;
+
+/**
+ * @brief Interrupt modes enumeration.
+ */
+typedef enum {
+RTEMS_GPIO_INT_TRIG_NONE = 0,
+RTEMS_GPIO_INT_TRIG_FALLING,
+RTEMS_GPIO_INT_TRIG_RISING,
+RTEMS_GPIO_INT_TRIG_BOTH_EDGES,
+RTEMS_GPIO_INT_TRIG_LOW,
+RTEMS_GPIO_INT_TRIG_HIGH
+} rtems_gpio_interrupt_trig;
+
+typedef struct rtems_gpio_handlers rtems_gpio_handlers;
+typedef struct rtems_gpio rtems_gpio;
+/**
+ * @brief Typedef of the function pointer of an ISR.
+ */
+typedef void (*rtems_gpio_isr)(void *);
+
+#include
+
+/**
+ * @brief Structure containing pointers to handlers of a
+ *BSP/driver. Each BSP/driver must define its own
+ *handlers and create an object of this structure
+ *with pointers to those handlers.
+ */
+struct rtems_gpio_handlers {
+/**
+ * @brief This member is the pointer to a handler for setting
+ *pin mode.
+ *
+ * Pin modes are from rt
[PATCH v5 1/4] bsps/stm32f4 Include STM32F4 HAL
This patch is too large so I cannot send via email. Please find it here: https://github.com/dtbpkmte/GSoC-2022-RTEMS/commit/6f1fbc7dd7a5e0877d8bff11e1b21558928dbc16 --- .gitignore| 1 + bsps/arm/include/cmsis_compiler.h | 266 + bsps/arm/include/cmsis_gcc.h | 3460 +-- bsps/arm/include/cmsis_version.h |39 + bsps/arm/include/core_cm4.h | 524 +- bsps/arm/include/core_cm7.h | 5186 ++-- bsps/arm/include/mpu_armv7.h | 270 + .../stm32f4/hal/Legacy/stm32f4xx_hal_can.c| 1679 ++ .../stm32f4/hal/Legacy/stm32f4xx_hal_eth.c| 2307 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal.c | 615 + bsps/arm/stm32f4/hal/stm32f4xx_hal_adc.c | 2110 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_adc_ex.c | 1112 + bsps/arm/stm32f4/hal/stm32f4xx_hal_can.c | 2462 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_cec.c | 996 + bsps/arm/stm32f4/hal/stm32f4xx_hal_cortex.c | 502 + bsps/arm/stm32f4/hal/stm32f4xx_hal_crc.c | 328 + bsps/arm/stm32f4/hal/stm32f4xx_hal_cryp.c | 7132 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_cryp_ex.c | 680 + bsps/arm/stm32f4/hal/stm32f4xx_hal_dac.c | 1341 + bsps/arm/stm32f4/hal/stm32f4xx_hal_dac_ex.c | 495 + bsps/arm/stm32f4/hal/stm32f4xx_hal_dcmi.c | 1161 + bsps/arm/stm32f4/hal/stm32f4xx_hal_dcmi_ex.c | 182 + bsps/arm/stm32f4/hal/stm32f4xx_hal_dfsdm.c| 4423 bsps/arm/stm32f4/hal/stm32f4xx_hal_dma.c | 1305 + bsps/arm/stm32f4/hal/stm32f4xx_hal_dma2d.c| 2126 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_dma_ex.c | 313 + bsps/arm/stm32f4/hal/stm32f4xx_hal_dsi.c | 2760 +++ bsps/arm/stm32f4/hal/stm32f4xx_hal_eth.c | 3220 +++ bsps/arm/stm32f4/hal/stm32f4xx_hal_exti.c | 547 + bsps/arm/stm32f4/hal/stm32f4xx_hal_flash.c| 775 + bsps/arm/stm32f4/hal/stm32f4xx_hal_flash_ex.c | 1347 + .../stm32f4/hal/stm32f4xx_hal_flash_ramfunc.c | 172 + bsps/arm/stm32f4/hal/stm32f4xx_hal_fmpi2c.c | 6864 ++ .../arm/stm32f4/hal/stm32f4xx_hal_fmpi2c_ex.c | 258 + bsps/arm/stm32f4/hal/stm32f4xx_hal_fmpsmbus.c | 2749 +++ .../stm32f4/hal/stm32f4xx_hal_fmpsmbus_ex.c | 145 + bsps/arm/stm32f4/hal/stm32f4xx_hal_gpio.c | 533 + bsps/arm/stm32f4/hal/stm32f4xx_hal_hash.c | 3514 +++ bsps/arm/stm32f4/hal/stm32f4xx_hal_hash_ex.c | 1040 + bsps/arm/stm32f4/hal/stm32f4xx_hal_hcd.c | 1728 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_i2c.c | 7524 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_i2c_ex.c | 182 + bsps/arm/stm32f4/hal/stm32f4xx_hal_i2s.c | 2094 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_i2s_ex.c | 1135 + bsps/arm/stm32f4/hal/stm32f4xx_hal_irda.c | 2687 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_iwdg.c | 262 + bsps/arm/stm32f4/hal/stm32f4xx_hal_lptim.c| 2484 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_ltdc.c | 2215 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_ltdc_ex.c | 151 + bsps/arm/stm32f4/hal/stm32f4xx_hal_mmc.c | 3201 +++ .../stm32f4/hal/stm32f4xx_hal_msp_template.c | 100 + bsps/arm/stm32f4/hal/stm32f4xx_hal_nand.c | 2405 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_nor.c | 1543 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_pccard.c | 946 + bsps/arm/stm32f4/hal/stm32f4xx_hal_pcd.c | 2387 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_pcd_ex.c | 341 + bsps/arm/stm32f4/hal/stm32f4xx_hal_pwr.c | 571 + bsps/arm/stm32f4/hal/stm32f4xx_hal_pwr_ex.c | 600 + bsps/arm/stm32f4/hal/stm32f4xx_hal_qspi.c | 2915 +++ bsps/arm/stm32f4/hal/stm32f4xx_hal_rcc.c | 1122 + bsps/arm/stm32f4/hal/stm32f4xx_hal_rcc_ex.c | 3784 +++ bsps/arm/stm32f4/hal/stm32f4xx_hal_rng.c | 867 + bsps/arm/stm32f4/hal/stm32f4xx_hal_rtc.c | 1896 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_rtc_ex.c | 1878 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_sai.c | 2554 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_sai_ex.c | 310 + bsps/arm/stm32f4/hal/stm32f4xx_hal_sd.c | 3277 +++ bsps/arm/stm32f4/hal/stm32f4xx_hal_sdram.c| 1308 + .../arm/stm32f4/hal/stm32f4xx_hal_smartcard.c | 2364 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_smbus.c| 2784 +++ bsps/arm/stm32f4/hal/stm32f4xx_hal_spdifrx.c | 1627 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_spi.c | 3915 +++ bsps/arm/stm32f4/hal/stm32f4xx_hal_sram.c | 1110 + bsps/arm/stm32f4/hal/stm32f4xx_hal_tim.c | 7621 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_tim_ex.c | 2428 ++ ...tm32f4xx_hal_timebase_rtc_alarm_template.c | 318 + ...m32f4xx_hal_timebase_rtc_wakeup_template.c | 293 + .../hal/stm32f4xx_hal_timebase_tim_template.c | 177 + bsps/arm/stm32f4/hal/stm32f4xx_hal_uart.c | 3751 +++ bsps/arm/stm32f4/hal/stm32f4xx_hal_usart.c| 2838 +++ bsps/arm/stm32f4/hal/stm32f4xx_hal_wwdg.c | 420 + bsps/arm/stm32f4/hal/stm32f4xx_ll_adc.c | 922 + bsps/arm/stm32f4/hal/stm32f4xx_ll_crc.c | 103 + bsps/arm/stm32f4/hal/stm3
[PATCH v5 0/4] *** New GPIO, ADC API and STM32F4 BSP implementation ***
Dear all, These patches add a new GPIO API and a framework for adding more peripheral APIs, with the example of ADC API. There is also implementation for these components for STM32F4 BSP. The core idea of my work on this peripherals API and new GPIO API is to add portability and simplify application code by using one identity for a GPIO pin that supports multiple types of operations. For example, a pin can be used as a basic GPIO, an ADC pin, a DAC pin or a PWM pin, but it's still represented by only one object (rtems_gpio). Different functionalities of the pin can be assigned through the peripherals API. In short, a pin can have 2 functions at the same time: digital GPIO and one extra function. In this system, an API is represented by a structure containing a member that identifies the API's type and other members being pointers to the API functions. A pointer to an object of this structure is stored inside a GPIO object to add functionalities to that pin. Application can change the pin's API pointer at runtime, which adds flexibility. An example application could be as follow: /**/ // Get pin object, same as before rtems_gpio *pin; rtems_gpio_get(&pin); // Digital mode rtems_gpio_set_pin_mode(pin, RTEMS_GPIO_PINMODE_OUTPUT); rtems_gpio_set_pull(pin, RTEMS_GPIO_NOPULL); // Set the pin to HIGH rtems_gpio_write(pin, RTEMS_GPIO_PIN_SET); // Set ADC mode rtems_gpio_set_pin_mode(pin, RTEMS_GPIO_PINMODE_ANALOG); rtems_periph_api_set_api(pin, RTEMS_PERIPH_TYPE_ADC); // Analog read uint32_t result; rtems_adc_read_raw(pin, &result); /**/ My repository is at: https://github.com/dtbpkmte/GSoC-2022-RTEMS (master branch). The sample application code for these APIs can be found at: https://github.com/dtbpkmte/GSoC-2022-RTEMS-Sample-Apps. STM32F4 HAL source code is taken from ST's repo at: https://github.com/STMicroelectronics/STM32CubeF4.git (Commit ID: 52757b5, Release v1.27.1). v2: - Made get_gpio_from_base() a macro instead of a function - Added missing cppflags in spec/build/bsps/arm/grp.yml - Optimized STM32F4_GET_HAL_GPIO_PIN() and STM32F4_GET_LL_EXTI_LINE() - Optimized functions by switching from HAL to LL - Made stm32f4_gpio_deinit() return RTEMS_NOT_IMPLEMENTED, because disabling clock might affect all pins in a port - Add const to static helper arrays to make sure they are placed on ROM v3: - Removed rtems_gpio_begin() - bsp_gpio_register_controllers() now needs to be called from hook1 (can be configured by option STM32F4_ENABLE_GENERIC_GPIO) - Updated license text for API files and STM32F4 GPIO files v4: - Fixed GPIO port guards - Fixed potential memory-leak bug of STM32F4 GPIO interrupt system - Added comments to STM32F4 GPIO functions and made them extern v5: - Replace old HAL source code with the one from official repository to remove CRLF - Added a peripherals API, which is a framework to add more APIs that operates on a GPIO pin - Changed GPIO API to comply with the peripherals API - Changed ADC API to comply with the peripherals API - Changed STM32F4 implementation Duc Doan (4): bsps/stm32f4 Include STM32F4 HAL bsps: New GPIO API & peripherals API framework bsps: Add ADC API bsps/stm32f4: Implementation for GPIO and ADC .gitignore| 1 + bsps/arm/include/cmsis_compiler.h | 266 + bsps/arm/include/cmsis_gcc.h | 3460 +-- bsps/arm/include/cmsis_version.h |39 + bsps/arm/include/core_cm4.h | 524 +- bsps/arm/include/core_cm7.h | 5186 ++-- bsps/arm/include/mpu_armv7.h | 270 + bsps/arm/stm32f4/adc/adc.c| 655 + bsps/arm/stm32f4/gpio/gpio.c | 542 + .../stm32f4/hal/Legacy/stm32f4xx_hal_can.c| 1679 ++ .../stm32f4/hal/Legacy/stm32f4xx_hal_eth.c| 2307 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal.c | 615 + bsps/arm/stm32f4/hal/stm32f4xx_hal_adc.c | 2110 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_adc_ex.c | 1112 + bsps/arm/stm32f4/hal/stm32f4xx_hal_can.c | 2462 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_cec.c | 996 + bsps/arm/stm32f4/hal/stm32f4xx_hal_cortex.c | 502 + bsps/arm/stm32f4/hal/stm32f4xx_hal_crc.c | 328 + bsps/arm/stm32f4/hal/stm32f4xx_hal_cryp.c | 7132 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_cryp_ex.c | 680 + bsps/arm/stm32f4/hal/stm32f4xx_hal_dac.c | 1341 + bsps/arm/stm32f4/hal/stm32f4xx_hal_dac_ex.c | 495 + bsps/arm/stm32f4/hal/stm32f4xx_hal_dcmi.c | 1161 + bsps/arm/stm32f4/hal/stm32f4xx_hal_dcmi_ex.c | 182 + bsps/arm/stm32f4/hal/stm32f4xx_hal_dfsdm.c| 4423 bsps/arm/stm32f4/hal/stm32f4xx_hal_dma.c | 1305 + bsps/arm/stm32f4/hal/stm32f4xx_hal_dma2d.c| 2126 ++ bsps/arm/stm32f4/hal/stm32f4xx_hal_dma_ex.c | 313 + bsps/arm/stm32f4/hal/stm32f4xx_hal_dsi.c | 2760 +++ bsps/arm/stm32f4/hal/stm32f4xx
