Re: [PATCH] cpukit/fdt: Free index before container

OK to push. Should 5 be updated? Consider OK for 5 as well. Thanks Chris On 29/9/2022 7:12 am, Kinsey Moore wrote: > Ensure that the index is released before the structure containing it is > freed and NULLed. > > Updates #4460 > --- > cpukit/libmisc/rtems-fdt/rtems-fdt.c | 4 ++-- > 1 file

Re: [PATCH] spec/pkgconfig: Allow builds to override headers

On 29/9/2022 7:13 am, Kinsey Moore wrote: > This allows any builds targeting an installed RTEMS BSP to override > headers in the installed BSP reliably, including headers previously > installed by that or other builds. This includes applications, network > stacks, libraries, and any other builds.

Re: [PATCH] cpukit/fdt: Check correct allocation

OK and thanks. Should this be fixed on 5 as well? If you think so consider it OK as well. Thanks Chris On 29/9/2022 7:12 am, Kinsey Moore wrote: > The second allocation check was mistakenly rechecking the first > allocation. It now checks the correct allocation and ensures that names > is not

Re: [rtems-source-builder commit] sb/setbuilder: Correctly create build set tar files

On 28/9/2022 11:42 pm, Christian MAUDERER wrote: > Hello, > > with this patch, I don't get a tar for devel/qemu and for the > 6/rtems-microblaze > anymore. All other 6/rtems-* toolchains work without problems. I haven't > tested > a lot of the other packages. > > The bset for microblaze is a

Re: [PATCH 0/1] GCC errors when building C++ Applications with libbsd

On 26.09.22 19:00, kho237...@gmx.de wrote: From: "Markus B. Moessner" Dear all, I am using the latest RTEMS 6 tools and sources. When building a C++ application including libbsd I receive an error from GCC. GCC complains about the macro BITSET_DEFINE within freebsd/sys/sys/_domainset.h. I

Re: [rtems-source-builder commit] sb/setbuilder: Correctly create build set tar files

Hello, with this patch, I don't get a tar for devel/qemu and for the 6/rtems-microblaze anymore. All other 6/rtems-* toolchains work without problems. I haven't tested a lot of the other packages. The bset for microblaze is a bit different from the other ones. But I'm not yet sure what the

[PATCH] spec/pkgconfig: Allow builds to override headers

This allows any builds targeting an installed RTEMS BSP to override headers in the installed BSP reliably, including headers previously installed by that or other builds. This includes applications, network stacks, libraries, and any other builds. --- spec/build/bsps/pkgconfig.yml | 2 +- 1 file

[PATCH] cpukit/fdt: Free index before container

Ensure that the index is released before the structure containing it is freed and NULLed. Updates #4460 --- cpukit/libmisc/rtems-fdt/rtems-fdt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cpukit/libmisc/rtems-fdt/rtems-fdt.c b/cpukit/libmisc/rtems-fdt/rtems-fdt.c

[PATCH] cpukit/fdt: Check correct allocation

The second allocation check was mistakenly rechecking the first allocation. It now checks the correct allocation and ensures that names is not NULL. Updates #4462 --- cpukit/libmisc/rtems-fdt/rtems-fdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH rtems-libbsd 4/4] rtemsbsd/arasan_sdhci: Improve board/eMMC compat

This improves the compatibility of this driver across board and memory variants by avoiding use of the HISPD mode. --- rtemsbsd/sys/dev/sdhci/arasan_sdhci.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c b/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c

[PATCH rtems-libbsd 2/4] rtemsbsd/arasan_sdhci: Update description

This driver works on both the Zynq 7000 chips as well as the Zynq Ultrascale+ MPSoC chips and targets the Arasan SDHCI IP that exists in both. --- rtemsbsd/sys/dev/sdhci/arasan_sdhci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c

[PATCH rtems-libbsd 3/4] rtemsbsd/arasan_sdhci: Remove redundant clock cap

The BSD SD subsystem enforces a 50MHz clock cap for devices which don't report their own maximum clock speed. This setting is unnecessary for the Zynq 7000 version of this IP and restricts the Zynq Ultrascale+ MPSoC version of this IP without need since it reports its maximum speed as 200MHz. ---

[PATCH rtems-libbsd 1/4] rtemsbsd/arasan_sdhci: Stop masking capabilities

The initial version of this driver was masking the capabilities register to hide 8 bit bus capability. This is not necessary since these devices report that capability correctly and the masking affects performance negatively on ZynqMP boards where the 8 bit bus is supported. This also removes two

[PATCH rtems-docs] user/bsps: Update riscv for PolarFire SoC

Update the riscv documentation for the Microchip PolarFire SoC BSP variant including information about SMP test procedure for the Microchip PolarFire Icicle Kit. --- user/bsps/bsps-riscv.rst | 114 ++- 1 file changed, 113 insertions(+), 1 deletion(-) diff